OMAP4: PM: Enable Device RET support

This patch configures VC on OMAP4 to enable Device
RET support.
The vc_config structure is updated to support additional
VDD on omap4. This structure needs cleanup to use an
ARRAY based on no of VDD's supported on platform.
The prescale and count settings are conservative and needs
a relook to optimize.
They are also assumed to be independent of PMIC, if found
otherwise they need to find a place in the vc_config struct
as well.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>

4 files changed, 76 insertions, 1 deletions

diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index effbf81db2b2..57a75e0034d6 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -1079,6 +1079,21 @@ static void enable_board_wakeup_source(void)
 	omap_writew(padconf, CONTROL_CORE_PAD1_GPMC_AD11);
 }
 
+static struct omap_volt_vc_data vc_config = {
+	.vdd0_on = 0x3a,        /* 1.35v */
+	.vdd0_onlp = 0x3a,      /* 1.35v */
+	.vdd0_ret = 0x14,       /* 0.8375v */
+	.vdd0_off = 0x01,       /* 0.6v */
+	.vdd1_on = 0x29,        /* 1.1v */
+	.vdd1_onlp = 0x29,      /* 1.1v */
+	.vdd1_ret = 0x14,       /* 0.8375v */
+	.vdd1_off = 0x01,       /* 0.6v */
+	.vdd2_on = 0x29,        /* 1.1v */
+	.vdd2_onlp = 0x29,      /* 1.1v */
+	.vdd2_ret = 0x14,       /* .8375v */
+	.vdd2_off = 0x01,       /* 0.6v */
+};
+
 static void __init omap_4430sdp_init(void)
 {
 	int status;
@@ -1122,6 +1137,7 @@ static void __init omap_4430sdp_init(void)
 	omap_cma3000accl_init();
 	omap_display_init(&sdp4430_dss_data);
 	enable_board_wakeup_source();
+	omap_voltage_init_vc(&vc_config);
 }
 
 static void __init omap_4430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 1adc94d4ca5d..8001ae300b7d 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -454,6 +454,18 @@ static void __init prcm_setup_regs(void)
 	/* Enable GLOBAL_WUEN */
 	prm_rmw_mod_reg_bits(OMAP4430_GLOBAL_WUEN_MASK, OMAP4430_GLOBAL_WUEN_MASK,
 		OMAP4430_PRM_DEVICE_MOD, OMAP4_PRM_IO_PMCTRL_OFFSET);
+
+	/* Enable all VDD transitions to RET */
+	prm_rmw_mod_reg_bits(OMAP4430_AUTO_CTRL_VDD_CORE_L_MASK,
+		0x2 << OMAP4430_AUTO_CTRL_VDD_CORE_L_SHIFT,
+		OMAP4430_PRM_DEVICE_MOD, OMAP4_PRM_VOLTCTRL_OFFSET);
+	prm_rmw_mod_reg_bits(OMAP4430_AUTO_CTRL_VDD_MPU_L_MASK,
+		0x2 << OMAP4430_AUTO_CTRL_VDD_MPU_L_SHIFT,
+		OMAP4430_PRM_DEVICE_MOD, OMAP4_PRM_VOLTCTRL_OFFSET);
+	prm_rmw_mod_reg_bits(OMAP4430_AUTO_CTRL_VDD_IVA_L_MASK,
+		0x2 << OMAP4430_AUTO_CTRL_VDD_IVA_L_SHIFT,
+		OMAP4430_PRM_DEVICE_MOD, OMAP4_PRM_VOLTCTRL_OFFSET);
+
 }
 
 /**
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index d0a983186342..504312278ea4 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -713,7 +713,45 @@ static void __init omap4_init_voltagecontroller(void)
 	voltage_write_reg(OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET,
 			(0x60 << OMAP4430_SCLL_SHIFT |
 			0x26 << OMAP4430_SCLH_SHIFT));
-	/* TODO: Configure setup times and CMD_VAL values*/
+
+	/* setup the VOLTSETUP* registers for RET and SLEEP */
+	/*
+	 * TODO: Relook at the prescal and count settings. For now conservative
+	 * values of 0x3 for prescal, translating to ramp-up/down counter being
+	 * incremented every 512 system clock cycles and a count value of 0xF is
+	 * used.
+	 */
+	voltage_write_reg(OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET,
+		(0x3 << OMAP4430_RAMP_DOWN_PRESCAL_SHIFT) |
+		(0x3 << OMAP4430_RAMP_UP_PRESCAL_SHIFT) |
+		(0xF << OMAP4430_RAMP_DOWN_COUNT_SHIFT) |
+		(0xF << OMAP4430_RAMP_UP_COUNT_SHIFT));
+	voltage_write_reg(OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET,
+		(0x3 << OMAP4430_RAMP_DOWN_PRESCAL_SHIFT) |
+		(0x3 << OMAP4430_RAMP_UP_PRESCAL_SHIFT) |
+		(0xF << OMAP4430_RAMP_DOWN_COUNT_SHIFT) |
+		(0xF << OMAP4430_RAMP_UP_COUNT_SHIFT));
+	voltage_write_reg(OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET,
+		(0x3 << OMAP4430_RAMP_DOWN_PRESCAL_SHIFT) |
+		(0x3 << OMAP4430_RAMP_UP_PRESCAL_SHIFT) |
+		(0xF << OMAP4430_RAMP_DOWN_COUNT_SHIFT) |
+		(0xF << OMAP4430_RAMP_UP_COUNT_SHIFT));
+
+	voltage_write_reg(OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET,
+			(vc_config.vdd0_on << OMAP4430_ON_SHIFT) |
+			(vc_config.vdd0_onlp << OMAP4430_ONLP_SHIFT) |
+			(vc_config.vdd0_ret << OMAP4430_RET_SHIFT) |
+			(vc_config.vdd0_off << OMAP4430_OFF_SHIFT));
+	voltage_write_reg(OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET,
+			(vc_config.vdd1_on << OMAP4430_ON_SHIFT) |
+			(vc_config.vdd1_onlp << OMAP4430_ONLP_SHIFT) |
+			(vc_config.vdd1_ret << OMAP4430_RET_SHIFT) |
+			(vc_config.vdd1_off << OMAP4430_OFF_SHIFT));
+	voltage_write_reg(OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET,
+			(vc_config.vdd2_on << OMAP4430_ON_SHIFT) |
+			(vc_config.vdd2_onlp << OMAP4430_ONLP_SHIFT) |
+			(vc_config.vdd2_ret << OMAP4430_RET_SHIFT) |
+			(vc_config.vdd2_off << OMAP4430_OFF_SHIFT));
 }
 
 /* Sets up all the VDD related info for OMAP4 */
@@ -1616,6 +1654,10 @@ void __init omap_voltage_init_vc(struct omap_volt_vc_data *setup_vc)
 	vc_config.vdd1_onlp = setup_vc->vdd1_onlp;
 	vc_config.vdd1_ret = setup_vc->vdd1_ret;
 	vc_config.vdd1_off = setup_vc->vdd1_off;
+	vc_config.vdd2_on = setup_vc->vdd1_on;
+	vc_config.vdd2_onlp = setup_vc->vdd1_onlp;
+	vc_config.vdd2_ret = setup_vc->vdd1_ret;
+	vc_config.vdd2_off = setup_vc->vdd1_off;
 }
 
 /**
diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-omap/include/plat/voltage.h
index 4f8342a9efdf..563d5bae448d 100644
--- a/arch/arm/plat-omap/include/plat/voltage.h
+++ b/arch/arm/plat-omap/include/plat/voltage.h
@@ -129,6 +129,11 @@ struct omap_volt_vc_data {
 	u16 vdd1_onlp;
 	u16 vdd1_ret;
 	u16 vdd1_off;
+/* PRM_VC_CMD_VAL_2 specific bits */
+	u16 vdd2_on;
+	u16 vdd2_onlp;
+	u16 vdd2_ret;
+	u16 vdd2_off;
 };
 
 struct voltagedomain *omap_voltage_domain_get(char *name);