diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2025-01-15 15:05:46 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-01-15 15:05:47 +0100 |
| commit | 71867d16d6b2cc6798a1989dddcb0676383ca41b (patch) | |
| tree | 5269cd2f5e500ee1a4a7a431cd893f63d1838d37 | |
| parent | 8dc9697921b38f2fb3d23c7a658506738f0e2a3a (diff) | |
| parent | 1fe6c70fec8fd8c823afee66467f85f028b0d22c (diff) | |
Merge tag 'qcom-arm64-defconfig-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig
Qualcomm Arm64 defconfig updates for v6.14
Enable core drivers for SM8750, QCS8300, SA8775P, and QCS615. Enable the
IPQ CMD PLL driver. Drop the 8650 display clock option, now that the
driver has been consolidated with 8550.
* tag 'qcom-arm64-defconfig-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: Enable Qualcomm IPQ CMN PLL clock controller
arm64: defconfig: Enable basic Qualcomm SM8750 SoC drivers
arm64: defconfig: remove obsolete CONFIG_SM_DISPCC_8650
arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS8300
arm64: defconfig: Enable sa8775p clock controllers
arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS615
Link: https://lore.kernel.org/r/20250111173306.392204-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/arm64/configs/defconfig | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 161553dfce21..ffdd405d0fcf 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -612,6 +612,8 @@ CONFIG_PINCTRL_MSM8996=y CONFIG_PINCTRL_MSM8998=y CONFIG_PINCTRL_QCM2290=y CONFIG_PINCTRL_QCS404=y +CONFIG_PINCTRL_QCS615=y +CONFIG_PINCTRL_QCS8300=y CONFIG_PINCTRL_QDF2XXX=y CONFIG_PINCTRL_QDU1000=y CONFIG_PINCTRL_SA8775P=y @@ -634,6 +636,7 @@ CONFIG_PINCTRL_SM8350=y CONFIG_PINCTRL_SM8450=y CONFIG_PINCTRL_SM8550=y CONFIG_PINCTRL_SM8650=y +CONFIG_PINCTRL_SM8750=y CONFIG_PINCTRL_X1E80100=y CONFIG_PINCTRL_QCOM_SPMI_PMIC=y CONFIG_PINCTRL_LPASS_LPI=m @@ -1322,6 +1325,7 @@ CONFIG_QCOM_CLK_SMD_RPM=y CONFIG_QCOM_CLK_RPMH=y CONFIG_IPQ_APSS_6018=y CONFIG_IPQ_APSS_5018=y +CONFIG_IPQ_CMN_PLL=m CONFIG_IPQ_GCC_5018=y CONFIG_IPQ_GCC_5332=y CONFIG_IPQ_GCC_6018=y @@ -1337,11 +1341,15 @@ CONFIG_MSM_MMCC_8998=m CONFIG_QCM_GCC_2290=y CONFIG_QCM_DISPCC_2290=m CONFIG_QCS_GCC_404=y +CONFIG_QCS_GCC_615=y +CONFIG_QCS_GCC_8300=y CONFIG_SC_CAMCC_7280=m +CONFIG_SA_CAMCC_8775P=m CONFIG_QDU_GCC_1000=y CONFIG_SC_CAMCC_8280XP=m CONFIG_SC_DISPCC_7280=m CONFIG_SC_DISPCC_8280XP=m +CONFIG_SA_DISPCC_8775P=m CONFIG_SA_GCC_8775P=y CONFIG_SA_GPUCC_8775P=m CONFIG_SC_GCC_7180=y @@ -1364,13 +1372,14 @@ CONFIG_SM_DISPCC_6115=m CONFIG_SM_DISPCC_8250=y CONFIG_SM_DISPCC_8450=m CONFIG_SM_DISPCC_8550=m -CONFIG_SM_DISPCC_8650=m +CONFIG_SM_DISPCC_8750=m CONFIG_SM_GCC_4450=y CONFIG_SM_GCC_6115=y CONFIG_SM_GCC_8350=y CONFIG_SM_GCC_8450=y CONFIG_SM_GCC_8550=y CONFIG_SM_GCC_8650=y +CONFIG_SM_GCC_8750=y CONFIG_SM_GPUCC_6115=m CONFIG_SM_GPUCC_8150=y CONFIG_SM_GPUCC_8250=y @@ -1380,6 +1389,8 @@ CONFIG_SM_GPUCC_8550=m CONFIG_SM_GPUCC_8650=m CONFIG_SM_TCSRCC_8550=y CONFIG_SM_TCSRCC_8650=y +CONFIG_SM_TCSRCC_8750=m +CONFIG_SA_VIDEOCC_8775P=m CONFIG_SM_VIDEOCC_8250=y CONFIG_QCOM_HFPLL=y CONFIG_CLK_GFM_LPASS_SM8250=m @@ -1646,6 +1657,8 @@ CONFIG_INTERCONNECT_QCOM_MSM8996=y CONFIG_INTERCONNECT_QCOM_OSM_L3=m CONFIG_INTERCONNECT_QCOM_QCM2290=y CONFIG_INTERCONNECT_QCOM_QCS404=m +CONFIG_INTERCONNECT_QCOM_QCS615=y +CONFIG_INTERCONNECT_QCOM_QCS8300=y CONFIG_INTERCONNECT_QCOM_QDU1000=y CONFIG_INTERCONNECT_QCOM_SA8775P=y CONFIG_INTERCONNECT_QCOM_SC7180=y @@ -1661,6 +1674,7 @@ CONFIG_INTERCONNECT_QCOM_SM8350=y CONFIG_INTERCONNECT_QCOM_SM8450=y CONFIG_INTERCONNECT_QCOM_SM8550=y CONFIG_INTERCONNECT_QCOM_SM8650=y +CONFIG_INTERCONNECT_QCOM_SM8750=y CONFIG_INTERCONNECT_QCOM_X1E80100=y CONFIG_COUNTER=m CONFIG_RZ_MTU3_CNT=m |