diff options
| author | Sander Vanheule <sander@svanheule.net> | 2025-01-19 19:34:23 +0100 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2025-02-21 15:10:22 +0100 |
| commit | b3992b82ad9e288d773f8bb604299ffc546811b7 (patch) | |
| tree | 66a23e9daade9c7b641fcdc7760ad9d74e7cdc5d | |
| parent | 4b7785dd43b8eeae3534da4a13922a361eace8ff (diff) | |
mips: dts: realtek: Add RTL838x SoC peripherals
Add some of the SoC's CPU peripherals currently supported:
- GPIO controller with support for 24 GPIO lines, although not all
lines are brought out to pads on the SoC package. These lines can
generate interrupts from external sources.
- Watchdog which can be used to restart the SoC if no external restart
logic is present.
- SPI controller, primarily used to access NOR flash
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| -rw-r--r-- | arch/mips/boot/dts/realtek/rtl838x.dtsi | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/realtek/rtl838x.dtsi b/arch/mips/boot/dts/realtek/rtl838x.dtsi index 246f4f607128..ce522a6af262 100644 --- a/arch/mips/boot/dts/realtek/rtl838x.dtsi +++ b/arch/mips/boot/dts/realtek/rtl838x.dtsi @@ -46,6 +46,14 @@ #size-cells = <1>; ranges = <0x0 0x18000000 0x10000>; + spi0: spi@1200 { + compatible = "realtek,rtl8380-spi"; + reg = <0x1200 0x100>; + + #address-cells = <1>; + #size-cells = <0>; + }; + uart0: serial@2000 { compatible = "ns16550a"; reg = <0x2000 0x100>; @@ -89,5 +97,33 @@ interrupt-parent = <&cpuintc>; interrupts = <2>, <3>, <4>, <5>, <6>; }; + + watchdog: watchdog@3150 { + compatible = "realtek,rtl8380-wdt"; + reg = <0x3150 0xc>; + + realtek,reset-mode = "soc"; + + clocks = <&lx_clk>; + timeout-sec = <20>; + + interrupt-parent = <&intc>; + interrupt-names = "phase1", "phase2"; + interrupts = <19>, <18>; + }; + + gpio0: gpio@3500 { + compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio"; + reg = <0x3500 0x1c>; + + gpio-controller; + #gpio-cells = <2>; + ngpios = <24>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupts = <23>; + }; }; }; |