diff options
author | Stephen Rothwell <sfr@canb.auug.org.au> | 2013-09-03 18:11:40 +1000 |
---|---|---|
committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2013-09-03 18:11:40 +1000 |
commit | 01208e2c469ecc52999df7d7fa795e9a4b5f3314 (patch) | |
tree | 2af60347aba58bae6502bbdb2dd43391258b6ec7 | |
parent | 06c3c07b741b99affc423fd3f999563d6abd6d33 (diff) |
Revert "ARM: 7804/2: Add check for Cortex-A15 errata 798181 ECO"
This reverts commit 34905a33184af10e0704b3a575cd35872c411761.
Conflicts:
arch/arm/kernel/smp_tlb.c
-rw-r--r-- | arch/arm/include/asm/cputype.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/tlbflush.h | 34 | ||||
-rw-r--r-- | arch/arm/kernel/setup.c | 2 | ||||
-rw-r--r-- | arch/arm/kernel/smp_tlb.c | 39 | ||||
-rw-r--r-- | arch/arm/mm/context.c | 3 |
5 files changed, 31 insertions, 48 deletions
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index acdde76b39bb..9672e978d50d 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h @@ -10,7 +10,6 @@ #define CPUID_TLBTYPE 3 #define CPUID_MPUIR 4 #define CPUID_MPIDR 5 -#define CPUID_REVIDR 6 #ifdef CONFIG_CPU_V7M #define CPUID_EXT_PFR0 0x40 diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h index 87a9d9a5b6fb..34b848c5af63 100644 --- a/arch/arm/include/asm/tlbflush.h +++ b/arch/arm/include/asm/tlbflush.h @@ -560,16 +560,36 @@ static inline void __flush_bp_all(void) asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero)); } -extern void erratum_a15_798181_init(void); -extern bool (*erratum_a15_798181_handler)(void); +#include <asm/cputype.h> +#ifdef CONFIG_ARM_ERRATA_798181 +static inline int erratum_a15_798181(void) +{ + unsigned int midr = read_cpuid_id(); + + /* Cortex-A15 r0p0..r3p2 affected */ + if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2) + return 0; + return 1; +} + +static inline void dummy_flush_tlb_a15_erratum(void) +{ + /* + * Dummy TLBIMVAIS. Using the unmapped address 0 and ASID 0. + */ + asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0)); + dsb(); +} +#else +static inline int erratum_a15_798181(void) +{ + return 0; +} -static inline bool erratum_a15_798181(void) +static inline void dummy_flush_tlb_a15_erratum(void) { - if (unlikely(IS_ENABLED(CONFIG_ARM_ERRATA_798181) && - erratum_a15_798181_handler)) - return erratum_a15_798181_handler(); - return false; } +#endif /* * flush_pmd_entry diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index a4852dea088b..0e1e2b3afa45 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -599,8 +599,6 @@ static void __init setup_processor(void) elf_hwcap &= ~(HWCAP_THUMB | HWCAP_IDIVT); #endif - erratum_a15_798181_init(); - feat_v6_fixup(); cacheid_init(); diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c index 3bb055d6c13c..83ccca303df8 100644 --- a/arch/arm/kernel/smp_tlb.c +++ b/arch/arm/kernel/smp_tlb.c @@ -70,43 +70,6 @@ static inline void ipi_flush_bp_all(void *ignored) local_flush_bp_all(); } -bool (*erratum_a15_798181_handler)(void); - -static bool erratum_a15_798181_partial(void) -{ - asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0)); - dsb(ish); - return false; -} - -static bool erratum_a15_798181_broadcast(void) -{ - asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0)); - dsb(ish); - return true; -} - -bool (*erratum_a15_798181_handler)(void); - -void erratum_a15_798181_init(void) -{ - unsigned int midr = read_cpuid_id(); - unsigned int revidr = read_cpuid(CPUID_REVIDR); - - if (!IS_ENABLED(CONFIG_ARM_ERRATA_798181)) - return; - - /* Cortex-A15 r0p0..r3p2 w/o ECO fix affected */ - if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2 || - (revidr & 0x210) == 0x210) { - return; - } - if (revidr & 0x10) - erratum_a15_798181_handler = erratum_a15_798181_partial; - else - erratum_a15_798181_handler = erratum_a15_798181_broadcast; -} - static void ipi_flush_tlb_a15_erratum(void *arg) { dmb(); @@ -117,6 +80,7 @@ static void broadcast_tlb_a15_erratum(void) if (!erratum_a15_798181()) return; + dummy_flush_tlb_a15_erratum(); smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1); } @@ -128,6 +92,7 @@ static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm) if (!erratum_a15_798181()) return; + dummy_flush_tlb_a15_erratum(); this_cpu = get_cpu(); a15_erratum_get_cpumask(this_cpu, mm, &mask); smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1); diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c index acb571ec2be8..fce737afe4aa 100644 --- a/arch/arm/mm/context.c +++ b/arch/arm/mm/context.c @@ -242,7 +242,8 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk) if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) { local_flush_bp_all(); local_flush_tlb_all(); - erratum_a15_798181(); + if (erratum_a15_798181()) + dummy_flush_tlb_a15_erratum(); } atomic64_set(&per_cpu(active_asids, cpu), asid); |