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authorRoger Quadros <rogerq@ti.com>2012-11-12 16:32:01 +0200
committerVincent Stehlé <v-stehle@ti.com>2012-11-26 15:32:01 +0100
commitd0b54ca75851ac000f5b13575fa512955f18f60d (patch)
treefedd65c57b8a866cf03ace33584afb1c3807c4e0
parent9f1d8755148882acc878a949a3bb3650e8128c06 (diff)
mfd: omap-usb-host: Intialize all available ports
OMAPs till date can have upto 3 ports. We need to initialize the port mode in HOSTCONFIG register for all of them. Signed-off-by: Roger Quadros <rogerq@ti.com>
-rw-r--r--drivers/mfd/omap-usb-host.c31
1 files changed, 12 insertions, 19 deletions
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index c20234bef6ec..0d39bd73787c 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -67,12 +67,9 @@
#define OMAP4_UHH_SYSCONFIG_NOSTDBY (1 << 4)
#define OMAP4_UHH_SYSCONFIG_SOFTRESET (1 << 0)
-#define OMAP4_P1_MODE_CLEAR (3 << 16)
+#define OMAP4_P1_MODE_MASK (3 << 16)
#define OMAP4_P1_MODE_TLL (1 << 16)
#define OMAP4_P1_MODE_HSIC (3 << 16)
-#define OMAP4_P2_MODE_CLEAR (3 << 18)
-#define OMAP4_P2_MODE_TLL (1 << 18)
-#define OMAP4_P2_MODE_HSIC (3 << 18)
#define OMAP_UHH_DEBUG_CSR (0x44)
@@ -343,6 +340,7 @@ static void omap_usbhs_init(struct device *dev)
struct usbhs_omap_platform_data *pdata = omap->pdata;
unsigned long flags;
unsigned reg;
+ int i;
dev_dbg(dev, "starting TI HSUSB Controller\n");
@@ -403,21 +401,16 @@ static void omap_usbhs_init(struct device *dev)
reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
}
} else if (is_omap_usbhs_rev2(omap)) {
- /* Clear port mode fields for PHY mode*/
- reg &= ~OMAP4_P1_MODE_CLEAR;
- reg &= ~OMAP4_P2_MODE_CLEAR;
-
- if (is_ehci_tll_mode(pdata->port_mode[0]) ||
- (is_ohci_port(pdata->port_mode[0])))
- reg |= OMAP4_P1_MODE_TLL;
- else if (is_ehci_hsic_mode(pdata->port_mode[0]))
- reg |= OMAP4_P1_MODE_HSIC;
-
- if (is_ehci_tll_mode(pdata->port_mode[1]) ||
- (is_ohci_port(pdata->port_mode[1])))
- reg |= OMAP4_P2_MODE_TLL;
- else if (is_ehci_hsic_mode(pdata->port_mode[1]))
- reg |= OMAP4_P2_MODE_HSIC;
+ for (i = 0; i < omap->nports; i++) {
+ /* Clear port mode fields for PHY mode*/
+ reg &= ~(OMAP4_P1_MODE_MASK << 2*i);
+
+ if (is_ehci_tll_mode(pdata->port_mode[i]) ||
+ (is_ohci_port(pdata->port_mode[i])))
+ reg |= OMAP4_P1_MODE_TLL << 2*i;
+ else if (is_ehci_hsic_mode(pdata->port_mode[i]))
+ reg |= OMAP4_P1_MODE_HSIC << 2*i;
+ }
}
usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);