diff options
author | Stephen Rothwell <sfr@canb.auug.org.au> | 2010-04-28 15:56:11 +1000 |
---|---|---|
committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2010-04-28 16:06:44 +1000 |
commit | b086de54482934a7883ca9c273cca13acd9d4426 (patch) | |
tree | 9144f28c0f9c3ef22d9ad562d916f2460c568041 | |
parent | b7d6f3aaef41b9f93e320c792d38609e41f59b7a (diff) | |
parent | 4f923d004396ef272600d381a365cac9d832486d (diff) |
Merge remote branch 'staging-next/staging-next'
Conflicts:
drivers/staging/arlan/arlan-main.c
drivers/staging/comedi/drivers/cb_das16_cs.c
drivers/staging/cx25821/cx25821-alsa.c
drivers/staging/dt3155/dt3155_drv.c
drivers/staging/netwave/netwave_cs.c
175 files changed, 18354 insertions, 6476 deletions
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 5589616082e7..fc6ef5f26e4a 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -59,8 +59,6 @@ source "drivers/staging/wlan-ng/Kconfig" source "drivers/staging/echo/Kconfig" -source "drivers/staging/poch/Kconfig" - source "drivers/staging/otus/Kconfig" source "drivers/staging/rt2860/Kconfig" @@ -113,6 +111,8 @@ source "drivers/staging/vme/Kconfig" source "drivers/staging/rar_register/Kconfig" +source "drivers/staging/memrar/Kconfig" + source "drivers/staging/sep/Kconfig" source "drivers/staging/iio/Kconfig" @@ -141,5 +141,7 @@ source "drivers/staging/dt3155/Kconfig" source "drivers/staging/crystalhd/Kconfig" +source "drivers/staging/cxt1e1/Kconfig" + endif # !STAGING_EXCLUDE_BUILD endif # STAGING diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index ec45d4bb8c11..307ca3a49ef0 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -12,7 +12,6 @@ obj-$(CONFIG_USB_IP_COMMON) += usbip/ obj-$(CONFIG_W35UND) += winbond/ obj-$(CONFIG_PRISM2_USB) += wlan-ng/ obj-$(CONFIG_ECHO) += echo/ -obj-$(CONFIG_POCH) += poch/ obj-$(CONFIG_OTUS) += otus/ obj-$(CONFIG_RT2860) += rt2860/ obj-$(CONFIG_RT2870) += rt2870/ @@ -37,6 +36,7 @@ obj-$(CONFIG_FB_UDL) += udlfb/ obj-$(CONFIG_HYPERV) += hv/ obj-$(CONFIG_VME_BUS) += vme/ obj-$(CONFIG_RAR_REGISTER) += rar_register/ +obj-$(CONFIG_MRST_RAR_HANDLER) += memrar/ obj-$(CONFIG_DX_SEP) += sep/ obj-$(CONFIG_IIO) += iio/ obj-$(CONFIG_RAMZSWAP) += ramzswap/ @@ -52,3 +52,4 @@ obj-$(CONFIG_PCMCIA_NETWAVE) += netwave/ obj-$(CONFIG_FB_SM7XX) += sm7xx/ obj-$(CONFIG_DT3155) += dt3155/ obj-$(CONFIG_CRYSTALHD) += crystalhd/ +obj-$(CONFIG_CXT1E1) += cxt1e1/ diff --git a/drivers/staging/arlan/arlan-main.c b/drivers/staging/arlan/arlan-main.c index 80284522c42b..06ac5b200617 100644 --- a/drivers/staging/arlan/arlan-main.c +++ b/drivers/staging/arlan/arlan-main.c @@ -80,15 +80,14 @@ static int arlan_open(struct net_device *dev); static netdev_tx_t arlan_tx(struct sk_buff *skb, struct net_device *dev); static irqreturn_t arlan_interrupt(int irq, void *dev_id); static int arlan_close(struct net_device *dev); -static struct net_device_stats * - arlan_statistics (struct net_device *dev); -static void arlan_set_multicast (struct net_device *dev); -static int arlan_hw_tx (struct net_device* dev, char *buf, int length ); -static int arlan_hw_config (struct net_device * dev); -static void arlan_tx_done_interrupt (struct net_device * dev, int status); -static void arlan_rx_interrupt (struct net_device * dev, u_char rxStatus, u_short, u_short); -static void arlan_process_interrupt (struct net_device * dev); -static void arlan_tx_timeout (struct net_device *dev); +static struct net_device_stats *arlan_statistics(struct net_device *dev); +static void arlan_set_multicast(struct net_device *dev); +static int arlan_hw_tx(struct net_device *dev, char *buf, int length); +static int arlan_hw_config(struct net_device *dev); +static void arlan_tx_done_interrupt(struct net_device *dev, int status); +static void arlan_rx_interrupt(struct net_device *dev, u_char rxStatus, u_short, u_short); +static void arlan_process_interrupt(struct net_device *dev); +static void arlan_tx_timeout(struct net_device *dev); static inline long us2ticks(int us) { @@ -102,14 +101,14 @@ static inline long us2ticks(int us) struct timeval timev;\ do_gettimeofday(&timev);\ if (arlan_entry_debug || arlan_entry_and_exit_debug)\ - printk("--->>>" name " %ld " "\n",((long int) timev.tv_sec * 1000000 + timev.tv_usec));\ + printk("--->>>" name " %ld " "\n", ((long int) timev.tv_sec * 1000000 + timev.tv_usec));\ } #define ARLAN_DEBUG_EXIT(name) \ {\ struct timeval timev;\ do_gettimeofday(&timev);\ if (arlan_exit_debug || arlan_entry_and_exit_debug)\ - printk("<<<---" name " %ld " "\n",((long int) timev.tv_sec * 1000000 + timev.tv_usec) );\ + printk("<<<---" name " %ld " "\n", ((long int) timev.tv_sec * 1000000 + timev.tv_usec));\ } #else #define ARLAN_DEBUG_ENTRY(name) @@ -118,8 +117,8 @@ static inline long us2ticks(int us) #define arlan_interrupt_ack(dev)\ - clearClearInterrupt(dev);\ - setClearInterrupt(dev); + clearClearInterrupt(dev);\ + setClearInterrupt(dev); static inline int arlan_drop_tx(struct net_device *dev) { @@ -127,18 +126,15 @@ static inline int arlan_drop_tx(struct net_device *dev) dev->stats.tx_errors++; if (priv->Conf->tx_delay_ms) - { priv->tx_done_delayed = jiffies + priv->Conf->tx_delay_ms * HZ / 1000 + 1; - } - else - { + else { priv->waiting_command_mask &= ~ARLAN_COMMAND_TX; TXHEAD(dev).offset = 0; TXTAIL(dev).offset = 0; priv->txLast = 0; priv->bad = 0; if (!priv->under_reset && !priv->under_config) - netif_wake_queue (dev); + netif_wake_queue(dev); } return 1; } @@ -169,13 +165,11 @@ int arlan_command(struct net_device *dev, int command_p) if (time_after(jiffies, priv->lastReset + 5 * HZ)) priv->waiting_command_mask &= ~ARLAN_COMMAND_RESET; - if (priv->waiting_command_mask & ARLAN_COMMAND_INT_ACK) - { + if (priv->waiting_command_mask & ARLAN_COMMAND_INT_ACK) { arlan_interrupt_ack(dev); priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_ACK; } - if (priv->waiting_command_mask & ARLAN_COMMAND_INT_ENABLE) - { + if (priv->waiting_command_mask & ARLAN_COMMAND_INT_ENABLE) { setInterruptEnable(dev); priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_ENABLE; } @@ -185,12 +179,10 @@ int arlan_command(struct net_device *dev, int command_p) /* Check cards status and waiting */ - if (priv->waiting_command_mask & (ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW)) - { - while (priv->waiting_command_mask & (ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW)) - { + if (priv->waiting_command_mask & (ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW)) { + while (priv->waiting_command_mask & (ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW)) { if (READSHMB(arlan->resetFlag) || - READSHMB(arlan->commandByte)) /* || + READSHMB(arlan->commandByte)) /* || (readControlRegister(dev) & ARLAN_ACCESS)) */ udelay(40); @@ -199,27 +191,20 @@ int arlan_command(struct net_device *dev, int command_p) udelayed++; - if (priv->waiting_command_mask & ARLAN_COMMAND_LONG_WAIT_NOW) - { - if (udelayed * 40 > 1000000) - { + if (priv->waiting_command_mask & ARLAN_COMMAND_LONG_WAIT_NOW) { + if (udelayed * 40 > 1000000) { printk(KERN_ERR "%s long wait too long \n", dev->name); priv->waiting_command_mask |= ARLAN_COMMAND_RESET; break; } - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_WAIT_NOW) - { - if (udelayed * 40 > 1000) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_WAIT_NOW) { + if (udelayed * 40 > 1000) { printk(KERN_ERR "%s short wait too long \n", dev->name); goto bad_end; } } } - } - else - { + } else { i = 0; while ((READSHMB(arlan->resetFlag) || READSHMB(arlan->commandByte)) && @@ -230,9 +215,7 @@ int arlan_command(struct net_device *dev, int command_p) if ((READSHMB(arlan->resetFlag) || READSHMB(arlan->commandByte)) && !(priv->waiting_command_mask & ARLAN_COMMAND_RESET)) - { goto card_busy_end; - } } if (priv->waiting_command_mask & ARLAN_COMMAND_RESET) priv->under_reset = 1; @@ -241,55 +224,43 @@ int arlan_command(struct net_device *dev, int command_p) /* Issuing command */ arlan_lock_card_access(dev); - if (priv->waiting_command_mask & ARLAN_COMMAND_POWERUP) - { - // if (readControlRegister(dev) & (ARLAN_ACCESS && ARLAN_POWER)) + if (priv->waiting_command_mask & ARLAN_COMMAND_POWERUP) { + /* if (readControlRegister(dev) & (ARLAN_ACCESS && ARLAN_POWER)) */ setPowerOn(dev); arlan_interrupt_lancpu(dev); priv->waiting_command_mask &= ~ARLAN_COMMAND_POWERUP; priv->waiting_command_mask |= ARLAN_COMMAND_RESET; priv->card_polling_interval = HZ / 10; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_ACTIVATE) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_ACTIVATE) { WRITESHMB(arlan->commandByte, ARLAN_COM_ACTIVATE); arlan_interrupt_lancpu(dev); priv->waiting_command_mask &= ~ARLAN_COMMAND_ACTIVATE; priv->card_polling_interval = HZ / 10; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_RX_ABORT) - { - if (priv->rx_command_given) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_RX_ABORT) { + if (priv->rx_command_given) { WRITESHMB(arlan->commandByte, ARLAN_COM_RX_ABORT); arlan_interrupt_lancpu(dev); priv->rx_command_given = 0; } priv->waiting_command_mask &= ~ARLAN_COMMAND_RX_ABORT; priv->card_polling_interval = 1; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_TX_ABORT) - { - if (priv->tx_command_given) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_TX_ABORT) { + if (priv->tx_command_given) { WRITESHMB(arlan->commandByte, ARLAN_COM_TX_ABORT); arlan_interrupt_lancpu(dev); priv->tx_command_given = 0; } priv->waiting_command_mask &= ~ARLAN_COMMAND_TX_ABORT; priv->card_polling_interval = 1; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_RESET) - { - priv->under_reset=1; - netif_stop_queue (dev); + } else if (priv->waiting_command_mask & ARLAN_COMMAND_RESET) { + priv->under_reset = 1; + netif_stop_queue(dev); arlan_drop_tx(dev); if (priv->tx_command_given || priv->rx_command_given) - { printk(KERN_ERR "%s: Reset under tx or rx command \n", dev->name); - } - netif_stop_queue (dev); + + netif_stop_queue(dev); if (arlan_debug & ARLAN_DEBUG_RESET) printk(KERN_ERR "%s: Doing chip reset\n", dev->name); priv->lastReset = jiffies; @@ -303,11 +274,9 @@ int arlan_command(struct net_device *dev, int command_p) priv->card_polling_interval = HZ / 4; priv->waiting_command_mask &= ~ARLAN_COMMAND_RESET; priv->waiting_command_mask |= ARLAN_COMMAND_INT_RACK; -// priv->waiting_command_mask |= ARLAN_COMMAND_INT_RENABLE; -// priv->waiting_command_mask |= ARLAN_COMMAND_RX; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_INT_RACK) - { + /* priv->waiting_command_mask |= ARLAN_COMMAND_INT_RENABLE; */ + /* priv->waiting_command_mask |= ARLAN_COMMAND_RX; */ + } else if (priv->waiting_command_mask & ARLAN_COMMAND_INT_RACK) { clearHardwareReset(dev); clearClearInterrupt(dev); setClearInterrupt(dev); @@ -316,126 +285,94 @@ int arlan_command(struct net_device *dev, int command_p) priv->waiting_command_mask |= ARLAN_COMMAND_CONF; priv->under_config = 1; priv->under_reset = 0; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_INT_RENABLE) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_INT_RENABLE) { setInterruptEnable(dev); priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_RENABLE; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_CONF) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_CONF) { if (priv->tx_command_given || priv->rx_command_given) - { printk(KERN_ERR "%s: Reset under tx or rx command \n", dev->name); - } + arlan_drop_tx(dev); setInterruptEnable(dev); arlan_hw_config(dev); arlan_interrupt_lancpu(dev); priv->waiting_command_mask &= ~ARLAN_COMMAND_CONF; priv->card_polling_interval = HZ / 10; -// priv->waiting_command_mask |= ARLAN_COMMAND_INT_RACK; -// priv->waiting_command_mask |= ARLAN_COMMAND_INT_ENABLE; + /* priv->waiting_command_mask |= ARLAN_COMMAND_INT_RACK; */ + /* priv->waiting_command_mask |= ARLAN_COMMAND_INT_ENABLE; */ priv->waiting_command_mask |= ARLAN_COMMAND_CONF_WAIT; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_CONF_WAIT) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_CONF_WAIT) { if (READSHMB(arlan->configuredStatusFlag) != 0 && - READSHMB(arlan->diagnosticInfo) == 0xff) - { + READSHMB(arlan->diagnosticInfo) == 0xff) { priv->waiting_command_mask &= ~ARLAN_COMMAND_CONF_WAIT; priv->waiting_command_mask |= ARLAN_COMMAND_RX; priv->waiting_command_mask |= ARLAN_COMMAND_TBUSY_CLEAR; priv->card_polling_interval = HZ / 10; priv->tx_command_given = 0; priv->under_config = 0; - } - else - { + } else { priv->card_polling_interval = 1; if (arlan_debug & ARLAN_DEBUG_TIMING) printk(KERN_ERR "configure delayed \n"); } - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_RX) - { - if (!registrationBad(dev)) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_RX) { + if (!registrationBad(dev)) { setInterruptEnable(dev); memset_io(arlan->commandParameter, 0, 0xf); WRITESHMB(arlan->commandByte, ARLAN_COM_INT | ARLAN_COM_RX_ENABLE); WRITESHMB(arlan->commandParameter[0], conf->rxParameter); arlan_interrupt_lancpu(dev); - priv->rx_command_given = 0; // mnjah, bad + priv->rx_command_given = 0; /* mnjah, bad */ priv->waiting_command_mask &= ~ARLAN_COMMAND_RX; priv->card_polling_interval = 1; - } - else + } else priv->card_polling_interval = 2; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_TBUSY_CLEAR) - { - if ( !registrationBad(dev) && - (netif_queue_stopped(dev) || !netif_running(dev)) ) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_TBUSY_CLEAR) { + if (!registrationBad(dev) && + (netif_queue_stopped(dev) || !netif_running(dev))) { priv->waiting_command_mask &= ~ARLAN_COMMAND_TBUSY_CLEAR; - netif_wake_queue (dev); + netif_wake_queue(dev); } - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_TX) - { - if (!test_and_set_bit(0, (void *) &priv->tx_command_given)) - { - if (time_after(jiffies, + } else if (priv->waiting_command_mask & ARLAN_COMMAND_TX) { + if (!test_and_set_bit(0, (void *) &priv->tx_command_given)) { + if (time_after(jiffies, priv->tx_last_sent + us2ticks(conf->rx_tweak1)) || time_before(jiffies, - priv->last_rx_int_ack_time + us2ticks(conf->rx_tweak2))) - { + priv->last_rx_int_ack_time + us2ticks(conf->rx_tweak2))) { setInterruptEnable(dev); memset_io(arlan->commandParameter, 0, 0xf); WRITESHMB(arlan->commandByte, ARLAN_COM_TX_ENABLE | ARLAN_COM_INT); memcpy_toio(arlan->commandParameter, &TXLAST(dev), 14); -// for ( i=1 ; i < 15 ; i++) printk("%02x:",READSHMB(arlan->commandParameter[i])); + /* for ( i=1 ; i < 15 ; i++) printk("%02x:",READSHMB(arlan->commandParameter[i])); */ priv->tx_last_sent = jiffies; arlan_interrupt_lancpu(dev); priv->tx_command_given = 1; priv->waiting_command_mask &= ~ARLAN_COMMAND_TX; priv->card_polling_interval = 1; - } - else - { + } else { priv->tx_command_given = 0; priv->card_polling_interval = 1; } - } - else if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS) + } else if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS) printk(KERN_ERR "tx command when tx chain locked \n"); - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_NOOPINT) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_NOOPINT) { { WRITESHMB(arlan->commandByte, ARLAN_COM_NOP | ARLAN_COM_INT); } arlan_interrupt_lancpu(dev); priv->waiting_command_mask &= ~ARLAN_COMMAND_NOOPINT; priv->card_polling_interval = HZ / 3; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_NOOP) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_NOOP) { WRITESHMB(arlan->commandByte, ARLAN_COM_NOP); arlan_interrupt_lancpu(dev); priv->waiting_command_mask &= ~ARLAN_COMMAND_NOOP; priv->card_polling_interval = HZ / 3; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_SLOW_POLL) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_SLOW_POLL) { WRITESHMB(arlan->commandByte, ARLAN_COM_GOTO_SLOW_POLL); arlan_interrupt_lancpu(dev); priv->waiting_command_mask &= ~ARLAN_COMMAND_SLOW_POLL; priv->card_polling_interval = HZ / 3; - } - else if (priv->waiting_command_mask & ARLAN_COMMAND_POWERDOWN) - { + } else if (priv->waiting_command_mask & ARLAN_COMMAND_POWERDOWN) { setPowerOff(dev); if (arlan_debug & ARLAN_DEBUG_CARD_STATE) printk(KERN_WARNING "%s: Arlan Going Standby\n", dev->name); @@ -478,10 +415,8 @@ static inline void arlan_command_process(struct net_device *dev) struct arlan_private *priv = netdev_priv(dev); int times = 0; - while (priv->waiting_command_mask && times < 8) - { - if (priv->waiting_command_mask) - { + while (priv->waiting_command_mask && times < 8) { + if (priv->waiting_command_mask) { if (arlan_command(dev, 0)) break; times++; @@ -500,24 +435,17 @@ static inline void arlan_retransmit_now(struct net_device *dev) ARLAN_DEBUG_ENTRY("arlan_retransmit_now"); - if (TXLAST(dev).offset == 0) - { - if (TXHEAD(dev).offset) - { + if (TXLAST(dev).offset == 0) { + if (TXHEAD(dev).offset) { priv->txLast = 0; IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_DEBUG "TX buff switch to head \n"); - - } - else if (TXTAIL(dev).offset) - { + } else if (TXTAIL(dev).offset) { IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_DEBUG "TX buff switch to tail \n"); priv->txLast = 1; - } - else + } else IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "ReTransmit buff empty"); - netif_wake_queue (dev); + netif_wake_queue(dev); return; - } arlan_command(dev, ARLAN_COMMAND_TX); @@ -540,78 +468,71 @@ static void arlan_registration_timer(unsigned long data) long lostTime = ((long)jiffies - (long)priv->registrationLastSeen) * (1000/HZ); - if (registrationBad(dev)) - { + if (registrationBad(dev)) { priv->registrationLostCount++; if (lostTime > 7000 && lostTime < 7200) - { printk(KERN_NOTICE "%s registration Lost \n", dev->name); - } + if (lostTime / priv->reRegisterExp > 2000) arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_CONF); if (lostTime / (priv->reRegisterExp) > 3500) arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET); if (priv->reRegisterExp < 400) priv->reRegisterExp += 2; - if (lostTime > 7200) - { + if (lostTime > 7200) { next_tick = HZ; arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET); } - } - else - { + } else { if (priv->Conf->registrationMode && lostTime > 10000 && - priv->registrationLostCount) - { + priv->registrationLostCount) { printk(KERN_NOTICE "%s registration is back after %ld milliseconds\n", dev->name, lostTime); } priv->registrationLastSeen = jiffies; priv->registrationLostCount = 0; priv->reRegisterExp = 1; - if (!netif_running(dev) ) + if (!netif_running(dev)) netif_wake_queue(dev); - if (time_after(priv->tx_last_sent,priv->tx_last_cleared) && - time_after(jiffies, priv->tx_last_sent * 5*HZ) ){ - arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET); + if (time_after(priv->tx_last_sent, priv->tx_last_cleared) && + time_after(jiffies, priv->tx_last_sent * 5*HZ)) { + arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET); priv->tx_last_cleared = jiffies; } } - if (!registrationBad(dev) && priv->ReTransmitRequested) - { + if (!registrationBad(dev) && priv->ReTransmitRequested) { IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "Retransmit from timer \n"); priv->ReTransmitRequested = 0; arlan_retransmit_now(dev); } + if (!registrationBad(dev) && time_after(jiffies, priv->tx_done_delayed) && - priv->tx_done_delayed != 0) - { + priv->tx_done_delayed != 0) { TXLAST(dev).offset = 0; + if (priv->txLast) priv->txLast = 0; else if (TXTAIL(dev).offset) priv->txLast = 1; - if (TXLAST(dev).offset) - { + if (TXLAST(dev).offset) { arlan_retransmit_now(dev); dev->trans_start = jiffies; } + if (!(TXHEAD(dev).offset && TXTAIL(dev).offset)) - { - netif_wake_queue (dev); - } + netif_wake_queue(dev); + priv->tx_done_delayed = 0; bh_mark_needed = 1; } + if (bh_mark_needed) - { - netif_wake_queue (dev); - } + netif_wake_queue(dev); + arlan_process_interrupt(dev); if (next_tick < priv->card_polling_interval) @@ -672,8 +593,7 @@ static int arlan_hw_tx(struct net_device *dev, char *buf, int length) tailStarts = 0x800 - (((TXTAIL(dev).offset - offsetof(struct arlan_shmem, txBuffer)) / 64) + 2) * 64; - if (!TXHEAD(dev).offset && length < tailStarts) - { + if (!TXHEAD(dev).offset && length < tailStarts) { IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "TXHEAD insert, tailStart %d\n", tailStarts); @@ -687,9 +607,7 @@ static int arlan_hw_tx(struct net_device *dev, char *buf, int length) TXHEAD(dev).routing = conf->txRouting; TXHEAD(dev).scrambled = conf->txScrambled; memcpy_toio((char __iomem *)arlan + TXHEAD(dev).offset, buf + ARLAN_FAKE_HDR_LEN, TXHEAD(dev).length); - } - else if (!TXTAIL(dev).offset && length < (0x800 - headEnds)) - { + } else if (!TXTAIL(dev).offset && length < (0x800 - headEnds)) { IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "TXTAIL insert, headEnd %d\n", headEnds); @@ -703,10 +621,8 @@ static int arlan_hw_tx(struct net_device *dev, char *buf, int length) TXTAIL(dev).routing = conf->txRouting; TXTAIL(dev).scrambled = conf->txScrambled; memcpy_toio(((char __iomem *)arlan + TXTAIL(dev).offset), buf + ARLAN_FAKE_HDR_LEN, TXTAIL(dev).length); - } - else - { - netif_stop_queue (dev); + } else { + netif_stop_queue(dev); IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "TX TAIL & HEAD full, return, tailStart %d headEnd %d\n", tailStarts, headEnds); return -1; @@ -715,26 +631,23 @@ static int arlan_hw_tx(struct net_device *dev, char *buf, int length) priv->out_bytes10 += length; if (conf->measure_rate < 1) conf->measure_rate = 1; - if (time_after(jiffies, priv->out_time + conf->measure_rate * HZ)) - { + if (time_after(jiffies, priv->out_time + conf->measure_rate * HZ)) { conf->out_speed = priv->out_bytes / conf->measure_rate; priv->out_bytes = 0; priv->out_time = jiffies; } - if (time_after(jiffies, priv->out_time10 + conf->measure_rate * 10*HZ)) - { + + if (time_after(jiffies, priv->out_time10 + conf->measure_rate * 10*HZ)) { conf->out_speed10 = priv->out_bytes10 / (10 * conf->measure_rate); priv->out_bytes10 = 0; priv->out_time10 = jiffies; } - if (TXHEAD(dev).offset && TXTAIL(dev).offset) - { - netif_stop_queue (dev); - return 0; - } - else - netif_start_queue (dev); + if (TXHEAD(dev).offset && TXTAIL(dev).offset) { + netif_stop_queue(dev); + return 0; + } else + netif_start_queue(dev); IFDEBUG(ARLAN_DEBUG_HEADER_DUMP) printk(KERN_WARNING "%s Transmit t %2x:%2x:%2x:%2x:%2x:%2x f %2x:%2x:%2x:%2x:%2x:%2x \n", dev->name, @@ -817,11 +730,11 @@ static int arlan_hw_config(struct net_device *dev) WRITESHMB(arlan->commandByte, ARLAN_COM_INT | ARLAN_COM_CONF); /* do configure */ memset_io(arlan->commandParameter, 0, 0xf); /* 0xf */ memset_io(arlan->commandParameter + 1, 0, 2); - if (conf->writeEEPROM) - { - memset_io(arlan->commandParameter, conf->writeEEPROM, 1); -// conf->writeEEPROM=0; + if (conf->writeEEPROM) { + memset_io(arlan->commandParameter, conf->writeEEPROM, 1); + /* conf->writeEEPROM=0; */ } + if (conf->registrationMode && conf->registrationInterrupts) memset_io(arlan->commandParameter + 3, 1, 1); else @@ -847,47 +760,46 @@ static int arlan_read_card_configuration(struct net_device *dev) ARLAN_DEBUG_ENTRY("arlan_read_card_configuration"); - if (radioNodeId == radioNodeIdUNKNOWN) - { + + if (radioNodeId == radioNodeIdUNKNOWN) { + /* multiline macro, cannot remove braces */ READSHM(conf->radioNodeId, arlan->radioNodeId, u_short); - } - else + } else conf->radioNodeId = radioNodeId; - - if (SID == SIDUNKNOWN) - { + + if (SID == SIDUNKNOWN) { + /* multiline macro, cannot remove braces */ READSHM(conf->SID, arlan->SID, u_int); - } - else conf->SID = SID; - - if (spreadingCode == spreadingCodeUNKNOWN) - { - READSHM(conf->spreadingCode, arlan->spreadingCode, u_char); - } - else + } else + conf->SID = SID; + + if (spreadingCode == spreadingCodeUNKNOWN) { + /* multiline macro, cannot remove braces */ + READSHM(conf->spreadingCode, arlan->spreadingCode, u_char); + } else conf->spreadingCode = spreadingCode; - - if (channelSet == channelSetUNKNOWN) - { + + if (channelSet == channelSetUNKNOWN) { + /* multiline macro, cannot remove braces */ READSHM(conf->channelSet, arlan->channelSet, u_char); - } - else conf->channelSet = channelSet; + } else + conf->channelSet = channelSet; - if (channelNumber == channelNumberUNKNOWN) - { + if (channelNumber == channelNumberUNKNOWN) { + /* multiline macro, cannot remove braces */ READSHM(conf->channelNumber, arlan->channelNumber, u_char); - } - else conf->channelNumber = channelNumber; - + } else + conf->channelNumber = channelNumber; + READSHM(conf->scramblingDisable, arlan->scramblingDisable, u_char); READSHM(conf->txAttenuation, arlan->txAttenuation, u_char); - - if (systemId == systemIdUNKNOWN) - { + + if (systemId == systemIdUNKNOWN) { + /* multiline macro, cannot remove braces */ READSHM(conf->systemId, arlan->systemId, u_int); - } - else conf->systemId = systemId; - + } else + conf->systemId = systemId; + READSHM(conf->maxDatagramSize, arlan->maxDatagramSize, u_short); READSHM(conf->maxFrameSize, arlan->maxFrameSize, u_short); READSHM(conf->maxRetries, arlan->maxRetries, u_char); @@ -895,18 +807,18 @@ static int arlan_read_card_configuration(struct net_device *dev) READSHM(conf->priority, arlan->priority, u_char); READSHM(conf->rootOrRepeater, arlan->rootOrRepeater, u_char); - if (SID == SIDUNKNOWN) - { + if (SID == SIDUNKNOWN) { + /* multiline macro, cannot remove braces */ READSHM(conf->SID, arlan->SID, u_int); - } - else conf->SID = SID; - - if (registrationMode == registrationModeUNKNOWN) - { + } else + conf->SID = SID; + + if (registrationMode == registrationModeUNKNOWN) { + /* multiline macro, cannot remove braces */ READSHM(conf->registrationMode, arlan->registrationMode, u_char); - } - else conf->registrationMode = registrationMode; - + } else + conf->registrationMode = registrationMode; + READSHM(conf->registrationFill, arlan->registrationFill, u_char); READSHM(conf->localTalkAddress, arlan->localTalkAddress, u_char); READSHM(conf->codeFormat, arlan->codeFormat, u_char); @@ -921,16 +833,16 @@ static int arlan_read_card_configuration(struct net_device *dev) READSHM(conf->headerSize, arlan->headerSize, u_short); READSHM(conf->hardwareType, arlan->hardwareType, u_char); READSHM(conf->radioType, arlan->radioModule, u_char); - + if (conf->radioType == 0) conf->radioType = 0xc; WRITESHM(arlan->configStatus, 0xA5, u_char); READSHM(tlx415, arlan->configStatus, u_char); - + if (tlx415 != 0xA5) printk(KERN_INFO "%s tlx415 chip \n", dev->name); - + conf->txClear = 0; conf->txRetries = 1; conf->txRouting = 1; @@ -973,7 +885,7 @@ static int __init arlan_check_fingerprint(unsigned long memaddr) ARLAN_DEBUG_ENTRY("arlan_check_fingerprint"); if (!request_mem_region(paddr, ARLAN_SHMEM_SIZE, "arlan")) { - // printk(KERN_WARNING "arlan: memory region %lx excluded from probing \n",paddr); + /* printk(KERN_WARNING "arlan: memory region %lx excluded from probing \n",paddr); */ return -ENODEV; } @@ -981,12 +893,12 @@ static int __init arlan_check_fingerprint(unsigned long memaddr) tempBuf[30] = 0; /* check for card at this address */ - if (0 != strncmp(tempBuf, probeText, 29)){ - release_mem_region(paddr, ARLAN_SHMEM_SIZE); + if (0 != strncmp(tempBuf, probeText, 29)) { + release_mem_region(paddr, ARLAN_SHMEM_SIZE); return -ENODEV; } -// printk(KERN_INFO "arlan found at 0x%x \n",memaddr); + /* printk(KERN_INFO "arlan found at 0x%x \n",memaddr); */ ARLAN_DEBUG_EXIT("arlan_check_fingerprint"); return 0; @@ -1054,7 +966,7 @@ static int __init arlan_setup_device(struct net_device *dev, int num) dev->tx_queue_len = tx_queue_len; dev->netdev_ops = &arlan_netdev_ops; dev->watchdog_timeo = 3*HZ; - + ap->irq_test_done = 0; ap->Conf = &arlan_conf[num]; @@ -1065,7 +977,7 @@ static int __init arlan_setup_device(struct net_device *dev, int num) err = register_netdev(dev); if (err) { - release_mem_region(virt_to_phys((void *) dev->mem_start), + release_mem_region(virt_to_phys((void *) dev->mem_start), ARLAN_SHMEM_SIZE); free_netdev(dev); return err; @@ -1075,7 +987,7 @@ static int __init arlan_setup_device(struct net_device *dev, int num) return 0; } -static int __init arlan_probe_here(struct net_device *dev, +static int __init arlan_probe_here(struct net_device *dev, unsigned long memaddr) { struct arlan_private *ap = netdev_priv(dev); @@ -1085,15 +997,15 @@ static int __init arlan_probe_here(struct net_device *dev, if (arlan_check_fingerprint(memaddr)) return -ENODEV; - printk(KERN_NOTICE "%s: Arlan found at %llx, \n ", dev->name, - (u64) virt_to_phys((void*)memaddr)); + printk(KERN_NOTICE "%s: Arlan found at %llx, \n ", dev->name, + (u64) virt_to_phys((void *)memaddr)); ap->card = (void *) memaddr; dev->mem_start = memaddr; dev->mem_end = memaddr + ARLAN_SHMEM_SIZE-1; - if (dev->irq < 2) - { + if (dev->irq < 2) { + /* multiline macro, cannot remove braces */ READSHM(dev->irq, ap->card->irqLevel, u_char); } else if (dev->irq == 2) dev->irq = 9; @@ -1114,14 +1026,12 @@ static int arlan_open(struct net_device *dev) ARLAN_DEBUG_ENTRY("arlan_open"); ret = request_irq(dev->irq, &arlan_interrupt, 0, dev->name, dev); - if (ret) - { + if (ret) { printk(KERN_ERR "%s: unable to get IRQ %d .\n", dev->name, dev->irq); return ret; } - priv->bad = 0; priv->lastReset = 0; priv->reset = 0; @@ -1131,14 +1041,14 @@ static int arlan_open(struct net_device *dev) priv->interrupt_processing_active = 0; spin_lock_init(&priv->lock); - netif_start_queue (dev); + netif_start_queue(dev); priv->registrationLostCount = 0; priv->registrationLastSeen = jiffies; priv->txLast = 0; priv->tx_command_given = 0; priv->rx_command_given = 0; - + priv->reRegisterExp = 1; priv->tx_last_sent = jiffies - 1; priv->tx_last_cleared = jiffies; @@ -1159,13 +1069,13 @@ static int arlan_open(struct net_device *dev) } -static void arlan_tx_timeout (struct net_device *dev) +static void arlan_tx_timeout(struct net_device *dev) { printk(KERN_ERR "%s: arlan transmit timed out, kernel decided\n", dev->name); /* Try to restart the adaptor. */ arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET); - // dev->trans_start = jiffies; - // netif_start_queue (dev); + /* dev->trans_start = jiffies; */ + /* netif_start_queue (dev); */ } @@ -1175,13 +1085,13 @@ static netdev_tx_t arlan_tx(struct sk_buff *skb, struct net_device *dev) unsigned char *buf; ARLAN_DEBUG_ENTRY("arlan_tx"); - + length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN; buf = skb->data; if (length + 0x12 > 0x800) { printk(KERN_ERR "TX RING overflow \n"); - netif_stop_queue (dev); + netif_stop_queue(dev); } if (arlan_hw_tx(dev, buf, length) == -1) @@ -1197,7 +1107,7 @@ static netdev_tx_t arlan_tx(struct sk_buff *skb, struct net_device *dev) bad_end: arlan_process_interrupt(dev); - netif_stop_queue (dev); + netif_stop_queue(dev); ARLAN_DEBUG_EXIT("arlan_tx"); return NETDEV_TX_BUSY; } @@ -1229,9 +1139,8 @@ static inline void arlan_queue_retransmit(struct net_device *dev) ARLAN_DEBUG_ENTRY("arlan_queue_retransmit"); if (DoNotWaitReTransmitCrap(dev)) - { - arlan_drop_tx(dev); - } else + arlan_drop_tx(dev); + else priv->ReTransmitRequested++; ARLAN_DEBUG_EXIT("arlan_queue_retransmit"); @@ -1245,14 +1154,11 @@ static inline void RetryOrFail(struct net_device *dev) if (priv->retransmissions > priv->Conf->retries || DoNotReTransmitCrap(dev)) - { arlan_drop_tx(dev); - } else if (priv->bad <= priv->Conf->fastReTransCount) - { arlan_retransmit_now(dev); - } - else arlan_queue_retransmit(dev); + else + arlan_queue_retransmit(dev); ARLAN_DEBUG_EXIT("RetryOrFail"); } @@ -1266,131 +1172,126 @@ static void arlan_tx_done_interrupt(struct net_device *dev, int status) priv->tx_last_cleared = jiffies; priv->tx_command_given = 0; - switch (status) + switch (status) { + case 1: { - case 1: - { - IFDEBUG(ARLAN_DEBUG_TX_CHAIN) - printk("arlan intr: transmit OK\n"); - dev->stats.tx_packets++; - priv->bad = 0; - priv->reset = 0; - priv->retransmissions = 0; - if (priv->Conf->tx_delay_ms) - { - priv->tx_done_delayed = jiffies + (priv->Conf->tx_delay_ms * HZ) / 1000 + 1; - } - else - { - TXLAST(dev).offset = 0; - if (priv->txLast) - priv->txLast = 0; - else if (TXTAIL(dev).offset) - priv->txLast = 1; - if (TXLAST(dev).offset) - { - arlan_retransmit_now(dev); - dev->trans_start = jiffies; - } - if (!TXHEAD(dev).offset || !TXTAIL(dev).offset) - { - netif_wake_queue (dev); - } + IFDEBUG(ARLAN_DEBUG_TX_CHAIN) + printk("arlan intr: transmit OK\n"); + dev->stats.tx_packets++; + priv->bad = 0; + priv->reset = 0; + priv->retransmissions = 0; + if (priv->Conf->tx_delay_ms) + priv->tx_done_delayed = jiffies + (priv->Conf->tx_delay_ms * HZ) / 1000 + 1; + else { + TXLAST(dev).offset = 0; + if (priv->txLast) + priv->txLast = 0; + else if (TXTAIL(dev).offset) + priv->txLast = 1; + + if (TXLAST(dev).offset) { + arlan_retransmit_now(dev); + dev->trans_start = jiffies; } - } - break; - - case 2: - { - IFDEBUG(ARLAN_DEBUG_TX_CHAIN) - printk("arlan intr: transmit timed out\n"); - priv->bad += 1; - //arlan_queue_retransmit(dev); - RetryOrFail(dev); - } - break; - case 3: - { - IFDEBUG(ARLAN_DEBUG_TX_CHAIN) - printk("arlan intr: transmit max retries\n"); - priv->bad += 1; - priv->reset = 0; - //arlan_queue_retransmit(dev); - RetryOrFail(dev); + if (!TXHEAD(dev).offset || !TXTAIL(dev).offset) + netif_wake_queue(dev); } - break; - - case 4: - { - IFDEBUG(ARLAN_DEBUG_TX_CHAIN) - printk("arlan intr: transmit aborted\n"); - priv->bad += 1; - arlan_queue_retransmit(dev); - //RetryOrFail(dev); - } - break; + } + break; - case 5: - { - IFDEBUG(ARLAN_DEBUG_TX_CHAIN) - printk("arlan intr: transmit not registered\n"); - priv->bad += 1; - //debug=101; - arlan_queue_retransmit(dev); - } - break; + case 2: + { + IFDEBUG(ARLAN_DEBUG_TX_CHAIN) + printk("arlan intr: transmit timed out\n"); + priv->bad += 1; + /* arlan_queue_retransmit(dev); */ + RetryOrFail(dev); + } + break; - case 6: - { - IFDEBUG(ARLAN_DEBUG_TX_CHAIN) - printk("arlan intr: transmit destination full\n"); - priv->bad += 1; - priv->reset = 0; - //arlan_drop_tx(dev); - arlan_queue_retransmit(dev); - } - break; + case 3: + { + IFDEBUG(ARLAN_DEBUG_TX_CHAIN) + printk("arlan intr: transmit max retries\n"); + priv->bad += 1; + priv->reset = 0; + /* arlan_queue_retransmit(dev); */ + RetryOrFail(dev); + } + break; - case 7: - { - IFDEBUG(ARLAN_DEBUG_TX_CHAIN) - printk("arlan intr: transmit unknown ack\n"); - priv->bad += 1; - priv->reset = 0; - arlan_queue_retransmit(dev); - } - break; - - case 8: - { - IFDEBUG(ARLAN_DEBUG_TX_CHAIN) - printk("arlan intr: transmit dest mail box full\n"); - priv->bad += 1; - priv->reset = 0; - //arlan_drop_tx(dev); - arlan_queue_retransmit(dev); - } - break; + case 4: + { + IFDEBUG(ARLAN_DEBUG_TX_CHAIN) + printk("arlan intr: transmit aborted\n"); + priv->bad += 1; + arlan_queue_retransmit(dev); + /* RetryOrFail(dev); */ + } + break; - case 9: - { - IFDEBUG(ARLAN_DEBUG_TX_CHAIN) - printk("arlan intr: transmit root dest not reg.\n"); - priv->bad += 1; - priv->reset = 1; - //arlan_drop_tx(dev); - arlan_queue_retransmit(dev); - } - break; + case 5: + { + IFDEBUG(ARLAN_DEBUG_TX_CHAIN) + printk("arlan intr: transmit not registered\n"); + priv->bad += 1; + /* debug=101; */ + arlan_queue_retransmit(dev); + } + break; - default: - { - printk(KERN_ERR "arlan intr: transmit status unknown\n"); - priv->bad += 1; - priv->reset = 1; - arlan_drop_tx(dev); - } + case 6: + { + IFDEBUG(ARLAN_DEBUG_TX_CHAIN) + printk("arlan intr: transmit destination full\n"); + priv->bad += 1; + priv->reset = 0; + /* arlan_drop_tx(dev); */ + arlan_queue_retransmit(dev); + } + break; + + case 7: + { + IFDEBUG(ARLAN_DEBUG_TX_CHAIN) + printk("arlan intr: transmit unknown ack\n"); + priv->bad += 1; + priv->reset = 0; + arlan_queue_retransmit(dev); + } + break; + + case 8: + { + IFDEBUG(ARLAN_DEBUG_TX_CHAIN) + printk("arlan intr: transmit dest mail box full\n"); + priv->bad += 1; + priv->reset = 0; + /* arlan_drop_tx(dev); */ + arlan_queue_retransmit(dev); + } + break; + + case 9: + { + IFDEBUG(ARLAN_DEBUG_TX_CHAIN) + printk("arlan intr: transmit root dest not reg.\n"); + priv->bad += 1; + priv->reset = 1; + /* arlan_drop_tx(dev); */ + arlan_queue_retransmit(dev); + } + break; + + default: + { + printk(KERN_ERR "arlan intr: transmit status unknown\n"); + priv->bad += 1; + priv->reset = 1; + arlan_drop_tx(dev); + } } ARLAN_DEBUG_EXIT("arlan_tx_done_interrupt"); @@ -1408,135 +1309,126 @@ static void arlan_rx_interrupt(struct net_device *dev, u_char rxStatus, u_short ARLAN_DEBUG_ENTRY("arlan_rx_interrupt"); - // by spec, not WRITESHMB(arlan->rxStatus,0x00); - // prohibited here arlan_command(dev, ARLAN_COMMAND_RX); + /* by spec, not WRITESHMB(arlan->rxStatus,0x00); */ + /* prohibited here arlan_command(dev, ARLAN_COMMAND_RX); */ - if (pkt_len < 10 || pkt_len > 2048) - { + if (pkt_len < 10 || pkt_len > 2048) { printk(KERN_WARNING "%s: got too short or long packet, len %d \n", dev->name, pkt_len); return; } - if (rxOffset + pkt_len > 0x2000) - { + if (rxOffset + pkt_len > 0x2000) { printk("%s: got too long packet, len %d offset %x\n", dev->name, pkt_len, rxOffset); return; } + priv->in_bytes += pkt_len; priv->in_bytes10 += pkt_len; if (conf->measure_rate < 1) conf->measure_rate = 1; - if (time_after(jiffies, priv->in_time + conf->measure_rate * HZ)) - { + if (time_after(jiffies, priv->in_time + conf->measure_rate * HZ)) { conf->in_speed = priv->in_bytes / conf->measure_rate; priv->in_bytes = 0; priv->in_time = jiffies; } - if (time_after(jiffies, priv->in_time10 + conf->measure_rate * 10*HZ)) - { + if (time_after(jiffies, priv->in_time10 + conf->measure_rate * 10*HZ)) { conf->in_speed10 = priv->in_bytes10 / (10 * conf->measure_rate); priv->in_bytes10 = 0; priv->in_time10 = jiffies; } DEBUGSHM(1, "arlan rcv pkt rxStatus= %d ", arlan->rxStatus, u_char); - switch (rxStatus) + switch (rxStatus) { + case 1: + case 2: + case 3: { - case 1: - case 2: - case 3: - { - /* Malloc up new buffer. */ - struct sk_buff *skb; + /* Malloc up new buffer. */ + struct sk_buff *skb; - DEBUGSHM(50, "arlan recv pkt offs=%d\n", arlan->rxOffset, u_short); - DEBUGSHM(1, "arlan rxFrmType = %d \n", arlan->rxFrmType, u_char); - DEBUGSHM(1, KERN_INFO "arlan rx scrambled = %d \n", arlan->scrambled, u_char); + DEBUGSHM(50, "arlan recv pkt offs=%d\n", arlan->rxOffset, u_short); + DEBUGSHM(1, "arlan rxFrmType = %d \n", arlan->rxFrmType, u_char); + DEBUGSHM(1, KERN_INFO "arlan rx scrambled = %d \n", arlan->scrambled, u_char); - /* here we do multicast filtering to avoid slow 8-bit memcopy */ + /* here we do multicast filtering to avoid slow 8-bit memcopy */ #ifdef ARLAN_MULTICAST - if (!(dev->flags & IFF_ALLMULTI) && - !(dev->flags & IFF_PROMISC) && - !netdev_mc_empty(dev)) - { - char hw_dst_addr[6]; - struct netdev_hw_addr *ha; - int i; - - memcpy_fromio(hw_dst_addr, arlan->ultimateDestAddress, 6); - if (hw_dst_addr[0] == 0x01) - { - if (mdebug) - if (hw_dst_addr[1] == 0x00) - printk(KERN_ERR "%s mcast 0x0100 \n", dev->name); - else if (hw_dst_addr[1] == 0x40) - printk(KERN_ERR "%s m/bcast 0x0140 \n", dev->name); - netdev_for_each_mc_entry(ha, dev) { - if (arlan_debug & ARLAN_DEBUG_HEADER_DUMP) - printk(KERN_ERR "%s mcl %pM\n", - dev->name, - ha->addr); - for (i = 0; i < 6; i++) - if (ha->addr[i] != hw_dst_addr[i]) - break; - if (i == 6) + if (!(dev->flags & IFF_ALLMULTI) && + !(dev->flags & IFF_PROMISC) && + !netdev_mc_empty(dev)) { + char hw_dst_addr[6]; + struct netdev_hw_addr *ha; + int i; + + memcpy_fromio(hw_dst_addr, arlan->ultimateDestAddress, 6); + if (hw_dst_addr[0] == 0x01) { + if (mdebug) + if (hw_dst_addr[1] == 0x00) + printk(KERN_ERR "%s mcast 0x0100 \n", dev->name); + else if (hw_dst_addr[1] == 0x40) + printk(KERN_ERR "%s m/bcast 0x0140 \n", dev->name); + netdev_for_each_mc_entry(ha, dev) { + if (arlan_debug & ARLAN_DEBUG_HEADER_DUMP) + printk(KERN_ERR "%s mcl %pM\n", + dev->name, ha->addr); + for (i = 0; i < 6; i++) + if (ha->addr[i] != hw_dst_addr[i]) break; - } - /* we reach here if multicast filtering is on and packet - * is multicast and not for receive */ - goto end_of_interrupt; + if (i == 6) + break; } + /* we reach here if multicast filtering is on and packet */ + /* is multicast and not for receive */ + goto end_of_interrupt; } -#endif // ARLAN_MULTICAST - /* multicast filtering ends here */ - pkt_len += ARLAN_FAKE_HDR_LEN; - - skb = dev_alloc_skb(pkt_len + 4); - if (skb == NULL) - { - printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n", dev->name); - dev->stats.rx_dropped++; - break; - } - skb_reserve(skb, 2); - skbtmp = skb_put(skb, pkt_len); + } +#endif /* ARLAN_MULTICAST */ + /* multicast filtering ends here */ + pkt_len += ARLAN_FAKE_HDR_LEN; + + skb = dev_alloc_skb(pkt_len + 4); + if (skb == NULL) { + printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n", dev->name); + dev->stats.rx_dropped++; + break; + } + skb_reserve(skb, 2); + skbtmp = skb_put(skb, pkt_len); - memcpy_fromio(skbtmp + ARLAN_FAKE_HDR_LEN, ((char __iomem *) arlan) + rxOffset, pkt_len - ARLAN_FAKE_HDR_LEN); - memcpy_fromio(skbtmp, arlan->ultimateDestAddress, 6); - memcpy_fromio(skbtmp + 6, arlan->rxSrc, 6); - WRITESHMB(arlan->rxStatus, 0x00); - arlan_command(dev, ARLAN_COMMAND_RX); + memcpy_fromio(skbtmp + ARLAN_FAKE_HDR_LEN, ((char __iomem *) arlan) + rxOffset, pkt_len - ARLAN_FAKE_HDR_LEN); + memcpy_fromio(skbtmp, arlan->ultimateDestAddress, 6); + memcpy_fromio(skbtmp + 6, arlan->rxSrc, 6); + WRITESHMB(arlan->rxStatus, 0x00); + arlan_command(dev, ARLAN_COMMAND_RX); - IFDEBUG(ARLAN_DEBUG_HEADER_DUMP) - { - char immedDestAddress[6]; - char immedSrcAddress[6]; - memcpy_fromio(immedDestAddress, arlan->immedDestAddress, 6); - memcpy_fromio(immedSrcAddress, arlan->immedSrcAddress, 6); - - printk(KERN_WARNING "%s t %pM f %pM imd %pM ims %pM\n", - dev->name, skbtmp, - &skbtmp[6], - immedDestAddress, - immedSrcAddress); - } - skb->protocol = eth_type_trans(skb, dev); - IFDEBUG(ARLAN_DEBUG_HEADER_DUMP) - if (skb->protocol != 0x608 && skb->protocol != 0x8) - { - for (i = 0; i <= 22; i++) - printk("%02x:", (u_char) skbtmp[i + 12]); - printk(KERN_ERR "\n"); - printk(KERN_WARNING "arlan kernel pkt type trans %x \n", skb->protocol); - } - netif_rx(skb); - dev->stats.rx_packets++; - dev->stats.rx_bytes += pkt_len; + IFDEBUG(ARLAN_DEBUG_HEADER_DUMP) + { + char immedDestAddress[6]; + char immedSrcAddress[6]; + memcpy_fromio(immedDestAddress, arlan->immedDestAddress, 6); + memcpy_fromio(immedSrcAddress, arlan->immedSrcAddress, 6); + + printk(KERN_WARNING "%s t %pM f %pM imd %pM ims %pM\n", + dev->name, skbtmp, + &skbtmp[6], + immedDestAddress, + immedSrcAddress); } + skb->protocol = eth_type_trans(skb, dev); + IFDEBUG(ARLAN_DEBUG_HEADER_DUMP) + if (skb->protocol != 0x608 && skb->protocol != 0x8) { + for (i = 0; i <= 22; i++) + printk("%02x:", (u_char) skbtmp[i + 12]); + printk(KERN_ERR "\n"); + printk(KERN_WARNING "arlan kernel pkt type trans %x \n", skb->protocol); + } + netif_rx(skb); + dev->stats.rx_packets++; + dev->stats.rx_bytes += pkt_len; + } + break; + + default: + printk(KERN_ERR "arlan intr: received unknown status\n"); + dev->stats.rx_crc_errors++; break; - - default: - printk(KERN_ERR "arlan intr: received unknown status\n"); - dev->stats.rx_crc_errors++; - break; } ARLAN_DEBUG_EXIT("arlan_rx_interrupt"); } @@ -1553,30 +1445,26 @@ static void arlan_process_interrupt(struct net_device *dev) ARLAN_DEBUG_ENTRY("arlan_process_interrupt"); - if (test_and_set_bit(0, (void *) &priv->interrupt_processing_active)) - { + if (test_and_set_bit(0, (void *) &priv->interrupt_processing_active)) { if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS) printk(KERN_ERR "interrupt chain reentering \n"); goto end_int_process; } while ((rxStatus || txStatus || priv->interrupt_ack_requested) - && (interrupt_count < 5)) - { + && (interrupt_count < 5)) { if (rxStatus) priv->last_rx_int_ack_time = jiffies; arlan_command(dev, ARLAN_COMMAND_INT_ACK); arlan_command(dev, ARLAN_COMMAND_INT_ENABLE); - + IFDEBUG(ARLAN_DEBUG_INTERRUPT) printk(KERN_ERR "%s: got IRQ rx %x tx %x comm %x rxOff %x rxLen %x \n", dev->name, rxStatus, txStatus, READSHMB(arlan->commandByte), rxOffset, pkt_len); - if (rxStatus == 0 && txStatus == 0) - { - if (priv->irq_test_done) - { + if (rxStatus == 0 && txStatus == 0) { + if (priv->irq_test_done) { if (!registrationBad(dev)) IFDEBUG(ARLAN_DEBUG_INTERRUPT) printk(KERN_ERR "%s unknown interrupt(nop? regLost ?) reason tx %d rx %d ", dev->name, txStatus, rxStatus); @@ -1588,35 +1476,35 @@ static void arlan_process_interrupt(struct net_device *dev) priv->interrupt_ack_requested = 0; goto ends; } - if (txStatus != 0) - { + + if (txStatus != 0) { WRITESHMB(arlan->txStatus, 0x00); arlan_tx_done_interrupt(dev, txStatus); goto ends; } - if (rxStatus == 1 || rxStatus == 2) - { /* a packet waiting */ + + if (rxStatus == 1 || rxStatus == 2) { + /* a packet waiting */ arlan_rx_interrupt(dev, rxStatus, rxOffset, pkt_len); goto ends; } - if (rxStatus > 2 && rxStatus < 0xff) - { + + if (rxStatus > 2 && rxStatus < 0xff) { WRITESHMB(arlan->rxStatus, 0x00); printk(KERN_ERR "%s unknown rxStatus reason tx %d rx %d ", dev->name, txStatus, rxStatus); goto ends; } - if (rxStatus == 0xff) - { + + if (rxStatus == 0xff) { WRITESHMB(arlan->rxStatus, 0x00); arlan_command(dev, ARLAN_COMMAND_RX); if (registrationBad(dev)) netif_device_detach(dev); - if (!registrationBad(dev)) - { + if (!registrationBad(dev)) { priv->registrationLastSeen = jiffies; if (!netif_queue_stopped(dev) && !priv->under_reset && !priv->under_config) - netif_wake_queue (dev); + netif_wake_queue(dev); } goto ends; } @@ -1658,7 +1546,7 @@ static irqreturn_t arlan_interrupt(int irq, void *dev_id) priv->interrupt_ack_requested++; arlan_process_interrupt(dev); - + priv->irq_test_done = 1; ARLAN_DEBUG_EXIT("arlan_interrupt"); @@ -1688,7 +1576,7 @@ static int arlan_close(struct net_device *dev) } #ifdef ARLAN_DEBUGGING -static long alignLong(volatile u_char * ptr) +static long alignLong(volatile u_char *ptr) { long ret; memcpy_fromio(&ret, (void *) ptr, 4); @@ -1741,16 +1629,13 @@ static void arlan_set_multicast(struct net_device *dev) ARLAN_DEBUG_ENTRY("arlan_set_multicast"); - if (dev->flags & IFF_PROMISC) - { + if (dev->flags & IFF_PROMISC) { unsigned char recMode; READSHM(recMode, arlan->receiveMode, u_char); conf->receiveMode = (ARLAN_RCV_PROMISC | ARLAN_RCV_CONTROL); if (conf->receiveMode != recMode) board_conf_needed = 1; - } - else - { + } else { /* turn off promiscuous mode */ unsigned char recMode; READSHM(recMode, arlan->receiveMode, u_char); @@ -1758,6 +1643,7 @@ static void arlan_set_multicast(struct net_device *dev) if (conf->receiveMode != recMode) board_conf_needed = 1; } + if (board_conf_needed) arlan_command(dev, ARLAN_COMMAND_CONF); @@ -1776,7 +1662,7 @@ struct net_device * __init arlan_probe(int unit) if (arlans_found == MAX_ARLANS) return ERR_PTR(-ENODEV); - /* + /* * Reserve space for local data and a copy of the shared memory * that is used by the /proc interface. */ @@ -1788,23 +1674,20 @@ struct net_device * __init arlan_probe(int unit) if (unit >= 0) { sprintf(dev->name, "eth%d", unit); netdev_boot_setup_check(dev); - + if (dev->mem_start) { if (arlan_probe_here(dev, dev->mem_start) == 0) goto found; goto not_found; } - } - for (m = (int)phys_to_virt(lastFoundAt) + ARLAN_SHMEM_SIZE; - m <= (int)phys_to_virt(0xDE000); - m += ARLAN_SHMEM_SIZE) - { - if (arlan_probe_here(dev, m) == 0) - { - lastFoundAt = (int)virt_to_phys((void*)m); + for (m = (int)phys_to_virt(lastFoundAt) + ARLAN_SHMEM_SIZE; + m <= (int)phys_to_virt(0xDE000); + m += ARLAN_SHMEM_SIZE) { + if (arlan_probe_here(dev, m) == 0) { + lastFoundAt = (int)virt_to_phys((void *)m); goto found; } } @@ -1826,7 +1709,7 @@ struct net_device * __init arlan_probe(int unit) return dev; } -#ifdef MODULE +#ifdef MODULE int __init init_module(void) { int i = 0; @@ -1839,7 +1722,7 @@ int __init init_module(void) for (i = 0; i < MAX_ARLANS; i++) { struct net_device *dev = arlan_probe(i); - if (IS_ERR(dev)) + if (IS_ERR(dev)) return PTR_ERR(dev); } init_arlan_proc(); @@ -1861,14 +1744,13 @@ void __exit cleanup_module(void) cleanup_arlan_proc(); - for (i = 0; i < MAX_ARLANS; i++) - { + for (i = 0; i < MAX_ARLANS; i++) { dev = arlan_device[i]; if (dev) { - arlan_command(dev, ARLAN_COMMAND_POWERDOWN ); + arlan_command(dev, ARLAN_COMMAND_POWERDOWN); unregister_netdev(dev); - release_mem_region(virt_to_phys((void *) dev->mem_start), + release_mem_region(virt_to_phys((void *) dev->mem_start), ARLAN_SHMEM_SIZE); free_netdev(dev); arlan_device[i] = NULL; diff --git a/drivers/staging/arlan/arlan-proc.c b/drivers/staging/arlan/arlan-proc.c index b22983e6c0cf..62cd1d0b59ef 100644 --- a/drivers/staging/arlan/arlan-proc.c +++ b/drivers/staging/arlan/arlan-proc.c @@ -9,48 +9,55 @@ -#define ARLAN_STR_SIZE 0x2ff0 -#define DEV_ARLAN_INFO 1 -#define DEV_ARLAN 1 -#define SARLG(type,var) {\ - pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n", #var, READSHMB(priva->card->var)); \ +#define ARLAN_STR_SIZE 0x2ff0 +#define DEV_ARLAN_INFO 1 +#define DEV_ARLAN 1 +#define SARLG(type, var) {\ + pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n", #var,\ + READSHMB(priva->card->var));\ } -#define SARLBN(type,var,nn) {\ - pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x",#var);\ - for (i=0; i < nn; i++ ) pos += sprintf(arlan_drive_info+pos, "%02x",READSHMB(priva->card->var[i]));\ - pos += sprintf(arlan_drive_info+pos, "\n"); \ +#define SARLBN(type, var, nn) {\ + pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x", #var);\ + for (i = 0; i < nn; i++)\ + pos += sprintf(arlan_drive_info+pos, "%02x",\ + READSHMB(priva->card->var[i]));\ + pos += sprintf(arlan_drive_info+pos, "\n");\ } -#define SARLBNpln(type,var,nn) {\ - for (i=0; i < nn; i++ ) pos += sprintf(arlan_drive_info+pos, "%02x",READSHMB(priva->card->var[i]));\ +#define SARLBNpln(type, var, nn) {\ + for (i = 0; i < nn; i++)\ + pos += sprintf(arlan_drive_info+pos, "%02x",\ + READSHMB(priva->card->var[i]));\ } -#define SARLSTR(var,nn) {\ +#define SARLSTR(var, nn) {\ char tmpStr[400];\ int tmpLn = nn;\ - if (nn > 399 ) tmpLn = 399; \ - memcpy(tmpStr,(char *) priva->conf->var,tmpLn);\ + if (nn > 399)\ + tmpLn = 399;\ + memcpy(tmpStr, (char *) priva->conf->var, tmpLn);\ tmpStr[tmpLn] = 0; \ - pos += sprintf(arlan_drive_info+pos, "%s\t=\t%s \n",#var,priva->conf->var);\ + pos += sprintf(arlan_drive_info+pos, "%s\t=\t%s\n",\ + #var, priva->conf->var);\ } -#define SARLUC(var) SARLG(u_char, var) -#define SARLUCN(var,nn) SARLBN(u_char,var, nn) +#define SARLUC(var) SARLG(u_char, var) +#define SARLUCN(var, nn) SARLBN(u_char, var, nn) #define SARLUS(var) SARLG(u_short, var) -#define SARLUSN(var,nn) SARLBN(u_short,var, nn) +#define SARLUSN(var, nn) SARLBN(u_short, var, nn) #define SARLUI(var) SARLG(u_int, var) #define SARLUSA(var) {\ u_short tmpVar;\ - memcpy(&tmpVar, (short *) priva->conf->var,2); \ - pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n",#var, tmpVar);\ + memcpy(&tmpVar, (short *) priva->conf->var, 2); \ + pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n", #var, tmpVar);\ } #define SARLUIA(var) {\ u_int tmpVar;\ - memcpy(&tmpVar, (int* )priva->conf->var,4); \ - pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n",#var, tmpVar);\ + memcpy(&tmpVar, (int *)priva->conf->var, 4); \ + pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n", #var, tmpVar);\ } @@ -63,51 +70,51 @@ static const char *arlan_diagnostic_info_string(struct net_device *dev) READSHM(diagnosticInfo, arlan->diagnosticInfo, u_char); - switch (diagnosticInfo) - { - case 0xFF: + switch (diagnosticInfo) { + + case 0xFF: return "Diagnostic info is OK"; - case 0xFE: - return "ERROR EPROM Checksum error "; - case 0xFD: - return "ERROR Local Ram Test Failed "; - case 0xFC: - return "ERROR SCC failure "; - case 0xFB: - return "ERROR BackBone failure "; - case 0xFA: - return "ERROR transceiver not found "; - case 0xF9: - return "ERROR no more address space "; - case 0xF8: - return "ERROR Checksum error "; - case 0xF7: - return "ERROR Missing SS Code"; - case 0xF6: - return "ERROR Invalid config format"; - case 0xF5: - return "ERROR Reserved errorcode F5"; - case 0xF4: - return "ERROR Invalid spreading code/channel number"; - case 0xF3: - return "ERROR Load Code Error"; - case 0xF2: - return "ERROR Reserver errorcode F2 "; - case 0xF1: - return "ERROR Invalid command receivec by LAN card "; - case 0xF0: - return "ERROR Invalid parameter found in command "; - case 0xEF: - return "ERROR On-chip timer failure "; - case 0xEE: - return "ERROR T410 timer failure "; - case 0xED: - return "ERROR Too Many TxEnable commands "; - case 0xEC: - return "ERROR EEPROM error on radio module "; - default: - return "ERROR unknown Diagnostic info reply code "; - } + case 0xFE: + return "ERROR EPROM Checksum error "; + case 0xFD: + return "ERROR Local Ram Test Failed "; + case 0xFC: + return "ERROR SCC failure "; + case 0xFB: + return "ERROR BackBone failure "; + case 0xFA: + return "ERROR transceiver not found "; + case 0xF9: + return "ERROR no more address space "; + case 0xF8: + return "ERROR Checksum error "; + case 0xF7: + return "ERROR Missing SS Code"; + case 0xF6: + return "ERROR Invalid config format"; + case 0xF5: + return "ERROR Reserved errorcode F5"; + case 0xF4: + return "ERROR Invalid spreading code/channel number"; + case 0xF3: + return "ERROR Load Code Error"; + case 0xF2: + return "ERROR Reserver errorcode F2 "; + case 0xF1: + return "ERROR Invalid command receivec by LAN card "; + case 0xF0: + return "ERROR Invalid parameter found in command "; + case 0xEF: + return "ERROR On-chip timer failure "; + case 0xEE: + return "ERROR T410 timer failure "; + case 0xED: + return "ERROR Too Many TxEnable commands "; + case 0xEC: + return "ERROR EEPROM error on radio module "; + default: + return "ERROR unknown Diagnostic info reply code "; + } } static const char *arlan_hardware_type_string(struct net_device *dev) @@ -117,70 +124,69 @@ static const char *arlan_hardware_type_string(struct net_device *dev) volatile struct arlan_shmem __iomem *arlan = priv->card; READSHM(hardwareType, arlan->hardwareType, u_char); - switch (hardwareType) - { - case 0x00: - return "type A450"; - case 0x01: - return "type A650 "; - case 0x04: - return "type TMA coproc"; - case 0x0D: - return "type A650E "; - case 0x18: - return "type TMA coproc Australian"; - case 0x19: - return "type A650A "; - case 0x26: - return "type TMA coproc European"; - case 0x2E: - return "type A655 "; - case 0x2F: - return "type A655A "; - case 0x30: - return "type A655E "; - case 0x0B: - return "type A670 "; - case 0x0C: - return "type A670E "; - case 0x2D: - return "type A670A "; - case 0x0F: - return "type A411T"; - case 0x16: - return "type A411TA"; - case 0x1B: - return "type A440T"; - case 0x1C: - return "type A412T"; - case 0x1E: - return "type A412TA"; - case 0x22: - return "type A411TE"; - case 0x24: - return "type A412TE"; - case 0x27: - return "type A671T "; - case 0x29: - return "type A671TA "; - case 0x2B: - return "type A671TE "; - case 0x31: - return "type A415T "; - case 0x33: - return "type A415TA "; - case 0x35: - return "type A415TE "; - case 0x37: - return "type A672"; - case 0x39: - return "type A672A "; - case 0x3B: - return "type A672T"; - case 0x6B: - return "type IC2200"; - default: - return "type A672T"; + switch (hardwareType) { + case 0x00: + return "type A450"; + case 0x01: + return "type A650 "; + case 0x04: + return "type TMA coproc"; + case 0x0D: + return "type A650E "; + case 0x18: + return "type TMA coproc Australian"; + case 0x19: + return "type A650A "; + case 0x26: + return "type TMA coproc European"; + case 0x2E: + return "type A655 "; + case 0x2F: + return "type A655A "; + case 0x30: + return "type A655E "; + case 0x0B: + return "type A670 "; + case 0x0C: + return "type A670E "; + case 0x2D: + return "type A670A "; + case 0x0F: + return "type A411T"; + case 0x16: + return "type A411TA"; + case 0x1B: + return "type A440T"; + case 0x1C: + return "type A412T"; + case 0x1E: + return "type A412TA"; + case 0x22: + return "type A411TE"; + case 0x24: + return "type A412TE"; + case 0x27: + return "type A671T "; + case 0x29: + return "type A671TA "; + case 0x2B: + return "type A671TE "; + case 0x31: + return "type A415T "; + case 0x33: + return "type A415TA "; + case 0x35: + return "type A415TE "; + case 0x37: + return "type A672"; + case 0x39: + return "type A672A "; + case 0x3B: + return "type A672T"; + case 0x6B: + return "type IC2200"; + default: + return "type A672T"; } } #ifdef ARLAN_DEBUGGING @@ -193,12 +199,12 @@ static void arlan_print_diagnostic_info(struct net_device *dev) struct arlan_private *priv = netdev_priv(dev); volatile struct arlan_shmem __iomem *arlan = priv->card; - // ARLAN_DEBUG_ENTRY("arlan_print_diagnostic_info"); + /* ARLAN_DEBUG_ENTRY("arlan_print_diagnostic_info"); */ if (READSHMB(arlan->configuredStatusFlag) == 0) - printk("Arlan: Card NOT configured\n"); + printk(KERN_WARNING "Arlan: Card NOT configured\n"); else - printk("Arlan: Card is configured\n"); + printk(KERN_INFO "Arlan: Card is configured\n"); READSHM(diagnosticInfo, arlan->diagnosticInfo, u_char); READSHM(diagnosticOffset, arlan->diagnosticOffset, u_short); @@ -206,14 +212,15 @@ static void arlan_print_diagnostic_info(struct net_device *dev) printk(KERN_INFO "%s\n", arlan_diagnostic_info_string(dev)); if (diagnosticInfo != 0xff) - printk("%s arlan: Diagnostic Offset %d \n", dev->name, diagnosticOffset); + printk(KERN_INFO "%s arlan: Diagnostic Offset %d\n",\ + dev->name, diagnosticOffset); - printk("arlan: LAN CODE ID = "); + printk(KERN_INFO "arlan: LAN CODE ID = "); for (i = 0; i < 6; i++) DEBUGSHM(1, "%03d:", arlan->lanCardNodeId[i], u_char); printk("\n"); - printk("arlan: Arlan BroadCast address = "); + printk(KERN_INFO "arlan: Arlan BroadCast address = "); for (i = 0; i < 6; i++) DEBUGSHM(1, "%03d:", arlan->broadcastAddress[i], u_char); printk("\n"); @@ -229,13 +236,13 @@ static void arlan_print_diagnostic_info(struct net_device *dev) DEBUGSHM(1, "arlan: SID =%d\n", arlan->SID, u_short); DEBUGSHM(1, "arlan: rxOffset=%d\n", arlan->rxOffset, u_short); - DEBUGSHM(1, "arlan: registration mode is %d\n", arlan->registrationMode, u_char); + DEBUGSHM(1, "arlan: registration mode is %d\n",\ + arlan->registrationMode, u_char); - printk("arlan: name= "); + printk(KERN_INFO "arlan: name= "); IFDEBUG(1) - - for (i = 0; i < 16; i++) - { + + for (i = 0; i < 16; i++) { char c; READSHM(c, arlan->name[i], char); if (c) @@ -243,18 +250,19 @@ static void arlan_print_diagnostic_info(struct net_device *dev) } printk("\n"); -// ARLAN_DEBUG_EXIT("arlan_print_diagnostic_info"); + /* ARLAN_DEBUG_EXIT("arlan_print_diagnostic_info"); */ } -/****************************** TEST MEMORY **************/ +/****************************** TEST MEMORY **************/ static int arlan_hw_test_memory(struct net_device *dev) { u_char *ptr; int i; - int memlen = sizeof(struct arlan_shmem) - 0xF; /* avoid control register */ + int memlen = sizeof(struct arlan_shmem) - 0xF; /* avoid + control register */ volatile char *arlan_mem = (char *) (dev->mem_start); struct arlan_private *priv = netdev_priv(dev); volatile struct arlan_shmem __iomem *arlan = priv->card; @@ -271,13 +279,11 @@ static int arlan_hw_test_memory(struct net_device *dev) WRITESHM(arlan_mem[i], ((u_char) pattern++), u_char); pattern = 0; - for (i = 0; i < memlen; i++) - { + for (i = 0; i < memlen; i++) { char res; READSHM(res, arlan_mem[i], char); - if (res != pattern++) - { - printk(KERN_ERR "Arlan driver memory test 1 failed \n"); + if (res != pattern++) { + printk(KERN_ERR "Arlan driver memory test 1 failed\n"); return -1; } } @@ -287,13 +293,11 @@ static int arlan_hw_test_memory(struct net_device *dev) WRITESHM(arlan_mem[i], ~(pattern++), char); pattern = 0; - for (i = 0; i < memlen; i++) - { + for (i = 0; i < memlen; i++) { char res; READSHM(res, arlan_mem[i], char); - if (res != ~(pattern++)) - { - printk(KERN_ERR "Arlan driver memory test 2 failed \n"); + if (res != ~(pattern++)) { + printk(KERN_ERR "Arlan driver memory test 2 failed\n"); return -1; } } @@ -311,9 +315,9 @@ static int arlan_hw_test_memory(struct net_device *dev) clearHardwareReset(dev); /* wait for reset flag to become zero, we'll wait for two seconds */ - if (arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW)) - { - printk(KERN_ERR "%s arlan: failed to come back from memory test\n", dev->name); + if (arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW)) { + printk(KERN_ERR "%s arlan: failed to come\ + back from memory test\n", dev->name); return -1; } return 0; @@ -325,29 +329,32 @@ static int arlan_setup_card_by_book(struct net_device *dev) struct arlan_private *priv = netdev_priv(dev); volatile struct arlan_shmem __iomem *arlan = priv->card; -// ARLAN_DEBUG_ENTRY("arlan_setup_card"); + /* ARLAN_DEBUG_ENTRY("arlan_setup_card"); */ READSHM(configuredStatusFlag, arlan->configuredStatusFlag, u_char); IFDEBUG(10) if (configuredStatusFlag != 0) - IFDEBUG(10) printk("arlan: CARD IS CONFIGURED\n"); + IFDEBUG(10) printk(KERN_INFO "arlan: CARD IS CONFIGURED\n"); else - IFDEBUG(10) printk("arlan: card is NOT configured\n"); + IFDEBUG(10) printk(KERN_WARNING\ + "arlan: card is NOT configured\n"); if (testMemory || (READSHMB(arlan->diagnosticInfo) != 0xff)) if (arlan_hw_test_memory(dev)) return -1; - DEBUGSHM(4, "arlan configuredStatus = %d \n", arlan->configuredStatusFlag, u_char); - DEBUGSHM(4, "arlan driver diagnostic: 0x%2x\n", arlan->diagnosticInfo, u_char); + DEBUGSHM(4, "arlan configuredStatus = %d\n",\ + arlan->configuredStatusFlag, u_char); + DEBUGSHM(4, "arlan driver diagnostic: 0x%2x\n",\ + arlan->diagnosticInfo, u_char); /* issue nop command - no interrupt */ arlan_command(dev, ARLAN_COMMAND_NOOP); if (arlan_command(dev, ARLAN_COMMAND_WAIT_NOW) != 0) return -1; - IFDEBUG(50) printk("1st Noop successfully executed !!\n"); + IFDEBUG(50) printk(KERN_INFO "1st Noop successfully executed !!\n"); /* try to turn on the arlan interrupts */ clearClearInterrupt(dev); @@ -361,18 +368,18 @@ static int arlan_setup_card_by_book(struct net_device *dev) return -1; - IFDEBUG(50) printk("2nd Noop successfully executed !!\n"); + IFDEBUG(50) printk(KERN_INFO "2nd Noop successfully executed !!\n"); READSHM(irqLevel, arlan->irqLevel, u_char) - - if (irqLevel != dev->irq) - { - IFDEBUG(1) printk(KERN_WARNING "arlan dip switches set irq to %d\n", irqLevel); - printk(KERN_WARNING "device driver irq set to %d - does not match\n", dev->irq); + + if (irqLevel != dev->irq) { + IFDEBUG(1) printk(KERN_WARNING "arlan dip switches\ + set irq to %d\n", irqLevel); + printk(KERN_WARNING "device driver irq set to %d-\ + does not match\n", dev->irq); dev->irq = irqLevel; - } - else - IFDEBUG(2) printk("irq level is OK\n"); + } else + IFDEBUG(2) printk(KERN_INFO "irq level is OK\n"); IFDEBUG(3) arlan_print_diagnostic_info(dev); @@ -380,8 +387,7 @@ static int arlan_setup_card_by_book(struct net_device *dev) arlan_command(dev, ARLAN_COMMAND_CONF); READSHM(configuredStatusFlag, arlan->configuredStatusFlag, u_char); - if (configuredStatusFlag == 0) - { + if (configuredStatusFlag == 0) { printk(KERN_WARNING "arlan configure failed\n"); return -1; } @@ -391,7 +397,7 @@ static int arlan_setup_card_by_book(struct net_device *dev) printk(KERN_NOTICE "%s: arlan driver version %s loaded\n", dev->name, arlan_version); -// ARLAN_DEBUG_EXIT("arlan_setup_card"); + /* ARLAN_DEBUG_EXIT("arlan_setup_card"); */ return 0; /* no errors */ } @@ -402,7 +408,7 @@ static int arlan_setup_card_by_book(struct net_device *dev) static char arlan_drive_info[ARLAN_STR_SIZE] = "A655\n\0"; -static int arlan_sysctl_info(ctl_table * ctl, int write, +static int arlan_sysctl_info(ctl_table *ctl, int write, void __user *buffer, size_t * lenp, loff_t *ppos) { int i; @@ -410,35 +416,30 @@ static int arlan_sysctl_info(ctl_table * ctl, int write, struct arlan_private *priva = NULL; struct net_device *dev; pos = 0; - if (write) - { - printk("wrirte: "); + if (write) { + printk(KERN_INFO "wrirte: "); for (i = 0; i < 100; i++) - printk("adi %x \n", arlan_drive_info[i]); + printk("adi %x\n", arlan_drive_info[i]); } - if (ctl->procname == NULL || arlan_drive_info == NULL) - { - printk(KERN_WARNING " procname is NULL in sysctl_table or arlan_drive_info is NULL \n at arlan module\n "); + if (ctl->procname == NULL || arlan_drive_info == NULL) { + printk(KERN_WARNING " procname is NULL in sysctl_table or arlan_drive_info is NULL\n at arlan module\n "); return -1; } devnum = ctl->procname[5] - '0'; - if (devnum < 0 || devnum > MAX_ARLANS - 1) - { + if (devnum < 0 || devnum > MAX_ARLANS - 1) { printk(KERN_WARNING "too strange devnum in procfs parse\n "); return -1; - } - else if (arlan_device[devnum] == NULL) - { + } else if (arlan_device[devnum] == NULL) { if (ctl->procname) - pos += sprintf(arlan_drive_info + pos, "\t%s\n\n", ctl->procname); - pos += sprintf(arlan_drive_info + pos, "No device found here \n"); + pos += sprintf(arlan_drive_info + pos,\ + "\t%s\n\n", ctl->procname); + pos += sprintf(arlan_drive_info + pos,\ + "No device found here\n"); goto final; - } - else + } else priva = netdev_priv(arlan_device[devnum]); - if (priva == NULL) - { + if (priva == NULL) { printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n "); return -1; } @@ -446,17 +447,19 @@ static int arlan_sysctl_info(ctl_table * ctl, int write, memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem)); - pos = sprintf(arlan_drive_info, "Arlan info \n"); + pos = sprintf(arlan_drive_info, "Arlan info\n"); /* Header Signature */ SARLSTR(textRegion, 48); SARLUC(resetFlag); - pos += sprintf(arlan_drive_info + pos, "diagnosticInfo\t=\t%s \n", arlan_diagnostic_info_string(dev)); + pos += sprintf(arlan_drive_info + pos,\ + "diagnosticInfo\t=\t%s\n", arlan_diagnostic_info_string(dev)); SARLUC(diagnosticInfo); SARLUS(diagnosticOffset); SARLUCN(_1, 12); SARLUCN(lanCardNodeId, 6); SARLUCN(broadcastAddress, 6); - pos += sprintf(arlan_drive_info + pos, "hardwareType =\t %s \n", arlan_hardware_type_string(dev)); + pos += sprintf(arlan_drive_info + pos,\ + "hardwareType =\t %s\n", arlan_hardware_type_string(dev)); SARLUC(hardwareType); SARLUC(majorHardwareVersion); SARLUC(minorHardwareVersion); @@ -602,17 +605,18 @@ static int arlan_sysctl_info(ctl_table * ctl, int write, SARLUCN(dumpPtr, 4); SARLUC(dumpVal); SARLUC(wireTest); - + /* next 4 seems too long for procfs, over single page ? SARLUCN( _17, 0x86); SARLUCN( txBuffer, 0x800); - SARLUCN( rxBuffer, 0x800); + SARLUCN( rxBuffer, 0x800); SARLUCN( _18, 0x0bff); */ pos += sprintf(arlan_drive_info + pos, "rxRing\t=\t0x"); for (i = 0; i < 0x50; i++) - pos += sprintf(arlan_drive_info + pos, "%02x", ((char *) priva->conf)[priva->conf->rxOffset + i]); + pos += sprintf(arlan_drive_info + pos, "%02x",\ + ((char *) priva->conf)[priva->conf->rxOffset + i]); pos += sprintf(arlan_drive_info + pos, "\n"); SARLUC(configStatus); @@ -624,14 +628,14 @@ static int arlan_sysctl_info(ctl_table * ctl, int write, pos += sprintf(arlan_drive_info + pos, " total %d chars\n", pos); if (ctl) if (ctl->procname) - pos += sprintf(arlan_drive_info + pos, " driver name : %s\n", ctl->procname); + pos += sprintf(arlan_drive_info + pos,\ + " driver name : %s\n", ctl->procname); final: *lenp = pos; if (!write) retv = proc_dostring(ctl, write, buffer, lenp, ppos); - else - { + else { *lenp = 0; return -1; } @@ -639,7 +643,7 @@ final: } -static int arlan_sysctl_info161719(ctl_table * ctl, int write, +static int arlan_sysctl_info161719(ctl_table *ctl, int write, void __user *buffer, size_t * lenp, loff_t *ppos) { int i; @@ -648,16 +652,16 @@ static int arlan_sysctl_info161719(ctl_table * ctl, int write, pos = 0; devnum = ctl->procname[5] - '0'; - if (arlan_device[devnum] == NULL) - { - pos += sprintf(arlan_drive_info + pos, "No device found here \n"); + if (arlan_device[devnum] == NULL) { + pos += sprintf(arlan_drive_info + pos,\ + "No device found here\n"); goto final; - } - else + } else priva = netdev_priv(arlan_device[devnum]); - if (priva == NULL) - { - printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n "); + + if (priva == NULL) { + printk(KERN_WARNING " Could not find the device\ + private in arlan procsys, bad\n "); return -1; } memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem)); @@ -673,7 +677,7 @@ final: return retv; } -static int arlan_sysctl_infotxRing(ctl_table * ctl, int write, +static int arlan_sysctl_infotxRing(ctl_table *ctl, int write, void __user *buffer, size_t * lenp, loff_t *ppos) { int i; @@ -682,15 +686,14 @@ static int arlan_sysctl_infotxRing(ctl_table * ctl, int write, pos = 0; devnum = ctl->procname[5] - '0'; - if (arlan_device[devnum] == NULL) - { - pos += sprintf(arlan_drive_info + pos, "No device found here \n"); - goto final; - } - else + if (arlan_device[devnum] == NULL) { + pos += sprintf(arlan_drive_info + pos,\ + "No device found here\n"); + goto final; + } else priva = netdev_priv(arlan_device[devnum]); - if (priva == NULL) - { + + if (priva == NULL) { printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n "); return -1; } @@ -702,7 +705,7 @@ final: return retv; } -static int arlan_sysctl_inforxRing(ctl_table * ctl, int write, +static int arlan_sysctl_inforxRing(ctl_table *ctl, int write, void __user *buffer, size_t * lenp, loff_t *ppos) { int i; @@ -711,14 +714,13 @@ static int arlan_sysctl_inforxRing(ctl_table * ctl, int write, pos = 0; devnum = ctl->procname[5] - '0'; - if (arlan_device[devnum] == NULL) - { - pos += sprintf(arlan_drive_info + pos, "No device found here \n"); - goto final; + if (arlan_device[devnum] == NULL) { + pos += sprintf(arlan_drive_info + pos,\ + "No device found here\n"); + goto final; } else priva = netdev_priv(arlan_device[devnum]); - if (priva == NULL) - { + if (priva == NULL) { printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n "); return -1; } @@ -730,7 +732,7 @@ final: return retv; } -static int arlan_sysctl_info18(ctl_table * ctl, int write, +static int arlan_sysctl_info18(ctl_table *ctl, int write, void __user *buffer, size_t * lenp, loff_t *ppos) { int i; @@ -739,18 +741,18 @@ static int arlan_sysctl_info18(ctl_table * ctl, int write, pos = 0; devnum = ctl->procname[5] - '0'; - if (arlan_device[devnum] == NULL) - { - pos += sprintf(arlan_drive_info + pos, "No device found here \n"); + if (arlan_device[devnum] == NULL) { + pos += sprintf(arlan_drive_info + pos,\ + "No device found here\n"); goto final; - } - else + } else priva = netdev_priv(arlan_device[devnum]); - if (priva == NULL) - { + + if (priva == NULL) { printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n "); return -1; } + memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem)); SARLBNpln(u_char, _18, 0x800); @@ -766,74 +768,73 @@ final: static char conf_reset_result[200]; -static int arlan_configure(ctl_table * ctl, int write, +static int arlan_configure(ctl_table *ctl, int write, void __user *buffer, size_t * lenp, loff_t *ppos) { int pos = 0; int devnum = ctl->procname[6] - '0'; struct arlan_private *priv; - if (devnum < 0 || devnum > MAX_ARLANS - 1) - { - printk(KERN_WARNING "too strange devnum in procfs parse\n "); + if (devnum < 0 || devnum > MAX_ARLANS - 1) { + printk(KERN_WARNING "too strange devnum in procfs parse\n"); return -1; - } - else if (arlan_device[devnum] != NULL) - { - priv = netdev_priv(arlan_device[devnum]); - - arlan_command(arlan_device[devnum], ARLAN_COMMAND_CLEAN_AND_CONF); - } - else + } else if (arlan_device[devnum] != NULL) { + priv = netdev_priv(arlan_device[devnum]); + arlan_command(arlan_device[devnum],\ + ARLAN_COMMAND_CLEAN_AND_CONF); + } else return -1; *lenp = pos; return proc_dostring(ctl, write, buffer, lenp, ppos); } -static int arlan_sysctl_reset(ctl_table * ctl, int write, +static int arlan_sysctl_reset(ctl_table *ctl, int write, void __user *buffer, size_t * lenp, loff_t *ppos) { int pos = 0; int devnum = ctl->procname[5] - '0'; struct arlan_private *priv; - if (devnum < 0 || devnum > MAX_ARLANS - 1) - { - printk(KERN_WARNING "too strange devnum in procfs parse\n "); + if (devnum < 0 || devnum > MAX_ARLANS - 1) { + printk(KERN_WARNING "too strange devnum in procfs parse\n"); return -1; - } - else if (arlan_device[devnum] != NULL) - { + + } else if (arlan_device[devnum] != NULL) { priv = netdev_priv(arlan_device[devnum]); - arlan_command(arlan_device[devnum], ARLAN_COMMAND_CLEAN_AND_RESET); + arlan_command(arlan_device[devnum], \ + ARLAN_COMMAND_CLEAN_AND_RESET); } else return -1; + *lenp = pos + 3; return proc_dostring(ctl, write, buffer, lenp, ppos); } /* Place files in /proc/sys/dev/arlan */ -#define CTBLN(card,nam) \ - { .procname = #nam,\ - .data = &(arlan_conf[card].nam),\ - .maxlen = sizeof(int), .mode = 0600, .proc_handler = proc_dointvec} +#define CTBLN(card, nam) \ + { .procname = #nam,\ + .data = &(arlan_conf[card].nam),\ + .maxlen = sizeof(int), .mode = 0600, .proc_handler = proc_dointvec} #ifdef ARLAN_DEBUGGING -#define ARLAN_PROC_DEBUG_ENTRIES \ - { .procname = "entry_exit_debug",\ - .data = &arlan_entry_and_exit_debug,\ - .maxlen = sizeof(int), .mode = 0600, .proc_handler = proc_dointvec},\ +#define ARLAN_PROC_DEBUG_ENTRIES do {\ + + { .procname = "entry_exit_debug",\ + .data = &arlan_entry_and_exit_debug,\ + .maxlen = sizeof(int), .mode = 0600, .proc_handler = proc_dointvec},\ { .procname = "debug", .data = &arlan_debug,\ - .maxlen = sizeof(int), .mode = 0600, .proc_handler = proc_dointvec}, -#else + .maxlen = sizeof(int), .mode = 0600, .proc_handler = proc_dointvec}, + + } while (0) +#else #define ARLAN_PROC_DEBUG_ENTRIES #endif #define ARLAN_SYSCTL_TABLE_TOTAL(cardNo)\ - CTBLN(cardNo,spreadingCode),\ + CTBLN(cardNo, spreadingCode),\ CTBLN(cardNo, channelNumber),\ CTBLN(cardNo, scramblingDisable),\ CTBLN(cardNo, txAttenuation),\ @@ -861,43 +862,40 @@ static int arlan_sysctl_reset(ctl_table * ctl, int write, CTBLN(cardNo, rxParameter),\ CTBLN(cardNo, txTimeoutMs),\ CTBLN(cardNo, waitCardTimeout),\ - CTBLN(cardNo, channelSet), \ + CTBLN(cardNo, channelSet),\ { .procname = "name",\ .data = arlan_conf[cardNo].siteName,\ - .maxlen = 16, .mode = 0600, .proc_handler = proc_dostring},\ - CTBLN(cardNo,waitTime),\ - CTBLN(cardNo,lParameter),\ - CTBLN(cardNo,_15),\ - CTBLN(cardNo,headerSize),\ - CTBLN(cardNo,tx_delay_ms),\ - CTBLN(cardNo,retries),\ - CTBLN(cardNo,ReTransmitPacketMaxSize),\ - CTBLN(cardNo,waitReTransmitPacketMaxSize),\ - CTBLN(cardNo,fastReTransCount),\ - CTBLN(cardNo,driverRetransmissions),\ - CTBLN(cardNo,txAckTimeoutMs),\ - CTBLN(cardNo,registrationInterrupts),\ - CTBLN(cardNo,hardwareType),\ - CTBLN(cardNo,radioType),\ - CTBLN(cardNo,writeEEPROM),\ - CTBLN(cardNo,writeRadioType),\ + .maxlen = 16, .mode = 0600, .proc_handler = proc_dostring },\ + CTBLN(cardNo, waitTime),\ + CTBLN(cardNo, lParameter),\ + CTBLN(cardNo, _15),\ + CTBLN(cardNo, headerSize),\ + CTBLN(cardNo, tx_delay_ms),\ + CTBLN(cardNo, retries),\ + CTBLN(cardNo, ReTransmitPacketMaxSize),\ + CTBLN(cardNo, waitReTransmitPacketMaxSize),\ + CTBLN(cardNo, fastReTransCount),\ + CTBLN(cardNo, driverRetransmissions),\ + CTBLN(cardNo, txAckTimeoutMs),\ + CTBLN(cardNo, registrationInterrupts),\ + CTBLN(cardNo, hardwareType),\ + CTBLN(cardNo, radioType),\ + CTBLN(cardNo, writeEEPROM),\ + CTBLN(cardNo, writeRadioType),\ ARLAN_PROC_DEBUG_ENTRIES\ - CTBLN(cardNo,in_speed),\ - CTBLN(cardNo,out_speed),\ - CTBLN(cardNo,in_speed10),\ - CTBLN(cardNo,out_speed10),\ - CTBLN(cardNo,in_speed_max),\ - CTBLN(cardNo,out_speed_max),\ - CTBLN(cardNo,measure_rate),\ - CTBLN(cardNo,pre_Command_Wait),\ - CTBLN(cardNo,rx_tweak1),\ - CTBLN(cardNo,rx_tweak2),\ - CTBLN(cardNo,tx_queue_len),\ - - - -static ctl_table arlan_conf_table0[] = -{ + CTBLN(cardNo, in_speed),\ + CTBLN(cardNo, out_speed),\ + CTBLN(cardNo, in_speed10),\ + CTBLN(cardNo, out_speed10),\ + CTBLN(cardNo, in_speed_max),\ + CTBLN(cardNo, out_speed_max),\ + CTBLN(cardNo, measure_rate),\ + CTBLN(cardNo, pre_Command_Wait),\ + CTBLN(cardNo, rx_tweak1),\ + CTBLN(cardNo, rx_tweak2),\ + CTBLN(cardNo, tx_queue_len),\ + +static ctl_table arlan_conf_table0[] = { ARLAN_SYSCTL_TABLE_TOTAL(0) #ifdef ARLAN_PROC_SHM_DUMP @@ -954,8 +952,7 @@ static ctl_table arlan_conf_table0[] = { } }; -static ctl_table arlan_conf_table1[] = -{ +static ctl_table arlan_conf_table1[] = { ARLAN_SYSCTL_TABLE_TOTAL(1) @@ -1013,8 +1010,7 @@ static ctl_table arlan_conf_table1[] = { } }; -static ctl_table arlan_conf_table2[] = -{ +static ctl_table arlan_conf_table2[] = { ARLAN_SYSCTL_TABLE_TOTAL(2) @@ -1072,8 +1068,7 @@ static ctl_table arlan_conf_table2[] = { } }; -static ctl_table arlan_conf_table3[] = -{ +static ctl_table arlan_conf_table3[] = { ARLAN_SYSCTL_TABLE_TOTAL(3) @@ -1133,8 +1128,7 @@ static ctl_table arlan_conf_table3[] = -static ctl_table arlan_table[] = -{ +static ctl_table arlan_table[] = { { .procname = "arlan0", .maxlen = 0, @@ -1164,17 +1158,15 @@ static ctl_table arlan_table[] = #else -static ctl_table arlan_table[] = -{ +static ctl_table arlan_table[] = { { } }; #endif -// static int mmtu = 1234; +/* static int mmtu = 1234; */ -static ctl_table arlan_root_table[] = -{ +static ctl_table arlan_root_table[] = { { .procname = "arlan", .maxlen = 0, @@ -1189,8 +1181,6 @@ static struct ctl_table_header *arlan_device_sysctl_header; int __init init_arlan_proc(void) { - - int i = 0; if (arlan_device_sysctl_header) return 0; arlan_device_sysctl_header = register_sysctl_table(arlan_root_table); @@ -1198,7 +1188,6 @@ int __init init_arlan_proc(void) return -1; return 0; - } void __exit cleanup_arlan_proc(void) diff --git a/drivers/staging/asus_oled/asus_oled.c b/drivers/staging/asus_oled/asus_oled.c index 7ebecc92c61b..5b279fb30f3f 100644 --- a/drivers/staging/asus_oled/asus_oled.c +++ b/drivers/staging/asus_oled/asus_oled.c @@ -771,7 +771,7 @@ static struct usb_driver oled_driver = { }; static CLASS_ATTR_STRING(version, S_IRUGO, - ASUS_OLED_UNDERSCORE_NAME " " ASUS_OLED_VERSION); + ASUS_OLED_UNDERSCORE_NAME " " ASUS_OLED_VERSION); static int __init asus_oled_init(void) { diff --git a/drivers/staging/batman-adv/send.c b/drivers/staging/batman-adv/send.c index 2a9fac8c240e..ff7b1f10684f 100644 --- a/drivers/staging/batman-adv/send.c +++ b/drivers/staging/batman-adv/send.c @@ -134,7 +134,8 @@ static void send_packet_to_if(struct forw_packet *forw_packet, if (batman_if->if_active != IF_ACTIVE) return; - packet_num = buff_pos = 0; + packet_num = 0; + buff_pos = 0; batman_packet = (struct batman_packet *) (forw_packet->packet_buff); diff --git a/drivers/staging/comedi/comedi.h b/drivers/staging/comedi/comedi.h index b559a9c2f857..1251e074cb2b 100644 --- a/drivers/staging/comedi/comedi.h +++ b/drivers/staging/comedi/comedi.h @@ -490,7 +490,8 @@ I8254_BINARY = 0 }; - static inline unsigned NI_USUAL_PFI_SELECT(unsigned pfi_channel) { + static inline unsigned NI_USUAL_PFI_SELECT(unsigned pfi_channel) + { if (pfi_channel < 10) return 0x1 + pfi_channel; else @@ -590,14 +591,17 @@ NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000, /* divide source by 8 */ NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000 }; - static inline unsigned NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(unsigned n) { + static inline unsigned NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(unsigned n) + { /* NI 660x-specific */ return 0x10 + n; } - static inline unsigned NI_GPCT_RTSI_CLOCK_SRC_BITS(unsigned n) { + static inline unsigned NI_GPCT_RTSI_CLOCK_SRC_BITS(unsigned n) + { return 0x18 + n; } - static inline unsigned NI_GPCT_PFI_CLOCK_SRC_BITS(unsigned n) { + static inline unsigned NI_GPCT_PFI_CLOCK_SRC_BITS(unsigned n) + { /* no pfi on NI 660x */ return 0x20 + n; } @@ -625,16 +629,20 @@ May be bitwise-or'd with CR_EDGE or CR_INVERT. */ we should add them here with an offset of 0x300 when known. */ NI_GPCT_DISABLED_GATE_SELECT = 0x8000, }; - static inline unsigned NI_GPCT_GATE_PIN_GATE_SELECT(unsigned n) { + static inline unsigned NI_GPCT_GATE_PIN_GATE_SELECT(unsigned n) + { return 0x102 + n; } - static inline unsigned NI_GPCT_RTSI_GATE_SELECT(unsigned n) { + static inline unsigned NI_GPCT_RTSI_GATE_SELECT(unsigned n) + { return NI_USUAL_RTSI_SELECT(n); } - static inline unsigned NI_GPCT_PFI_GATE_SELECT(unsigned n) { + static inline unsigned NI_GPCT_PFI_GATE_SELECT(unsigned n) + { return NI_USUAL_PFI_SELECT(n); } - static inline unsigned NI_GPCT_UP_DOWN_PIN_GATE_SELECT(unsigned n) { + static inline unsigned NI_GPCT_UP_DOWN_PIN_GATE_SELECT(unsigned n) + { return 0x202 + n; } @@ -650,7 +658,8 @@ INSN_CONFIG_SET_OTHER_SRC when using NI general-purpose counters. */ /* Still unknown, probably only need NI_GPCT_PFI_OTHER_SELECT */ NI_GPCT_DISABLED_OTHER_SELECT = 0x8000, }; - static inline unsigned NI_GPCT_PFI_OTHER_SELECT(unsigned n) { + static inline unsigned NI_GPCT_PFI_OTHER_SELECT(unsigned n) + { return NI_USUAL_PFI_SELECT(n); } @@ -699,7 +708,8 @@ INSN_CONFIG_ARM */ NI_MIO_PLL_PXI10_CLOCK = 3, NI_MIO_PLL_RTSI0_CLOCK = 4 }; - static inline unsigned NI_MIO_PLL_RTSI_CLOCK(unsigned rtsi_channel) { + static inline unsigned NI_MIO_PLL_RTSI_CLOCK(unsigned rtsi_channel) + { return NI_MIO_PLL_RTSI0_CLOCK + rtsi_channel; } @@ -719,7 +729,8 @@ INSN_CONFIG_ARM */ NI_RTSI_OUTPUT_RTSI_OSC = 12 /* pre-m-series always have RTSI clock on line 7 */ }; - static inline unsigned NI_RTSI_OUTPUT_RTSI_BRD(unsigned n) { + static inline unsigned NI_RTSI_OUTPUT_RTSI_BRD(unsigned n) + { return NI_RTSI_OUTPUT_RTSI_BRD_0 + n; } @@ -754,7 +765,8 @@ INSN_CONFIG_ARM */ NI_PFI_OUTPUT_CDI_SAMPLE = 29, NI_PFI_OUTPUT_CDO_UPDATE = 30 }; - static inline unsigned NI_PFI_OUTPUT_RTSI(unsigned rtsi_channel) { + static inline unsigned NI_PFI_OUTPUT_RTSI(unsigned rtsi_channel) + { return NI_PFI_OUTPUT_RTSI0 + rtsi_channel; } @@ -772,10 +784,12 @@ INSN_CONFIG_ARM */ /* NI External Trigger lines. These values are not arbitrary, but are related * to the bits required to program the board (offset by 1 for historical * reasons). */ - static inline unsigned NI_EXT_PFI(unsigned pfi_channel) { + static inline unsigned NI_EXT_PFI(unsigned pfi_channel) + { return NI_USUAL_PFI_SELECT(pfi_channel) - 1; } - static inline unsigned NI_EXT_RTSI(unsigned rtsi_channel) { + static inline unsigned NI_EXT_RTSI(unsigned rtsi_channel) + { return NI_USUAL_RTSI_SELECT(rtsi_channel) - 1; } @@ -801,21 +815,24 @@ INSN_CONFIG_ARM */ NI_CDIO_SCAN_BEGIN_SRC_FREQ_OUT = 32, NI_CDIO_SCAN_BEGIN_SRC_DIO_CHANGE_DETECT_IRQ = 33 }; - static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel) { + static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel) + { return NI_USUAL_PFI_SELECT(pfi_channel); } - static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_RTSI(unsigned - rtsi_channel) { + static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel) + { return NI_USUAL_RTSI_SELECT(rtsi_channel); } /* scan_begin_src for scan_begin_arg==TRIG_EXT with analog output command on NI * boards. These scan begin sources can also be bitwise-or'd with CR_INVERT to * change polarity. */ - static inline unsigned NI_AO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel) { + static inline unsigned NI_AO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel) + { return NI_USUAL_PFI_SELECT(pfi_channel); } - static inline unsigned NI_AO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel) { + static inline unsigned NI_AO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel) + { return NI_USUAL_RTSI_SELECT(rtsi_channel); } diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c index aca96747e5e2..287a1af3d013 100644 --- a/drivers/staging/comedi/comedi_fops.c +++ b/drivers/staging/comedi/comedi_fops.c @@ -598,19 +598,19 @@ copyback: static int parse_insn(struct comedi_device *dev, struct comedi_insn *insn, unsigned int *data, void *file); /* - * COMEDI_INSNLIST - * synchronous instructions + * COMEDI_INSNLIST + * synchronous instructions * - * arg: - * pointer to sync cmd structure + * arg: + * pointer to sync cmd structure * - * reads: - * sync cmd struct at arg - * instruction list - * data (for writes) + * reads: + * sync cmd struct at arg + * instruction list + * data (for writes) * - * writes: - * data (for reads) + * writes: + * data (for reads) */ /* arbitrary limits */ #define MAX_SAMPLES 256 @@ -894,18 +894,18 @@ out: } /* - * COMEDI_INSN - * synchronous instructions + * COMEDI_INSN + * synchronous instructions * - * arg: - * pointer to insn + * arg: + * pointer to insn * - * reads: - * struct comedi_insn struct at arg - * data (for writes) + * reads: + * struct comedi_insn struct at arg + * data (for writes) * - * writes: - * data (for reads) + * writes: + * data (for reads) */ static int do_insn_ioctl(struct comedi_device *dev, void *arg, void *file) { @@ -2105,6 +2105,7 @@ int comedi_alloc_board_minor(struct device *hardware_device) kfree(info->device); kfree(info); printk(KERN_ERR + "comedi: error: ran out of minor numbers for board device files.\n"); return -EBUSY; } diff --git a/drivers/staging/comedi/drivers.c b/drivers/staging/comedi/drivers.c index 44d6b62c230d..4b69d06ca735 100644 --- a/drivers/staging/comedi/drivers.c +++ b/drivers/staging/comedi/drivers.c @@ -102,7 +102,7 @@ static void __comedi_device_detach(struct comedi_device *dev) if (dev->driver) dev->driver->detach(dev); else - printk("BUG: dev->driver=NULL in comedi_device_detach()\n"); + printk(KERN_WARNING "BUG: dev->driver=NULL in comedi_device_detach()\n"); cleanup_device(dev); } @@ -124,7 +124,7 @@ int comedi_device_attach(struct comedi_device *dev, struct comedi_devconfig *it) for (driv = comedi_drivers; driv; driv = driv->next) { if (!try_module_get(driv->module)) { printk - ("comedi: failed to increment module count, skipping\n"); + (KERN_INFO "comedi: failed to increment module count, skipping\n"); continue; } if (driv->num_names) { @@ -139,7 +139,8 @@ int comedi_device_attach(struct comedi_device *dev, struct comedi_devconfig *it) continue; } } - /* initialize dev->driver here so comedi_error() can be called from attach */ + /* initialize dev->driver here so + * comedi_error() can be called from attach */ dev->driver = driv; ret = driv->attach(dev, it); if (ret < 0) { @@ -154,7 +155,7 @@ int comedi_device_attach(struct comedi_device *dev, struct comedi_devconfig *it) /* report valid board names before returning error */ for (driv = comedi_drivers; driv; driv = driv->next) { if (!try_module_get(driv->module)) { - printk("comedi: failed to increment module count\n"); + printk(KERN_INFO "comedi: failed to increment module count\n"); continue; } comedi_report_boards(driv); @@ -172,7 +173,7 @@ attached: } if (!dev->board_name) { - printk("BUG: dev->board_name=<%p>\n", dev->board_name); + printk(KERN_WARNING "BUG: dev->board_name=<%p>\n", dev->board_name); dev->board_name = "BUG"; } smp_wmb(); @@ -208,7 +209,7 @@ int comedi_driver_unregister(struct comedi_driver *driver) if (dev->attached && dev->driver == driver) { if (dev->use_count) printk - ("BUG! detaching device with use_count=%d\n", + (KERN_WARNING "BUG! detaching device with use_count=%d\n", dev->use_count); comedi_device_detach(dev); } @@ -253,7 +254,7 @@ static int postconfig(struct comedi_device *dev) async = kzalloc(sizeof(struct comedi_async), GFP_KERNEL); if (async == NULL) { - printk("failed to allocate async struct\n"); + printk(KERN_INFO "failed to allocate async struct\n"); return -ENOMEM; } init_waitqueue_head(&async->wait_head); @@ -268,7 +269,7 @@ static int postconfig(struct comedi_device *dev) async->prealloc_buf = NULL; async->prealloc_bufsz = 0; if (comedi_buf_alloc(dev, s, DEFAULT_BUF_SIZE) < 0) { - printk("Buffer allocation failed\n"); + printk(KERN_INFO "Buffer allocation failed\n"); return -ENOMEM; } if (s->buf_change) { @@ -303,7 +304,8 @@ static int postconfig(struct comedi_device *dev) return 0; } -/* generic recognize function for drivers that register their supported board names */ +/* generic recognize function for drivers + * that register their supported board names */ void *comedi_recognize(struct comedi_driver *driv, const char *name) { unsigned i; @@ -324,17 +326,17 @@ void comedi_report_boards(struct comedi_driver *driv) unsigned int i; const char *const *name_ptr; - printk("comedi: valid board names for %s driver are:\n", + printk(KERN_INFO "comedi: valid board names for %s driver are:\n", driv->driver_name); name_ptr = driv->board_name; for (i = 0; i < driv->num_names; i++) { - printk(" %s\n", *name_ptr); + printk(KERN_INFO " %s\n", *name_ptr); name_ptr = (const char **)((char *)name_ptr + driv->offset); } if (driv->num_names == 0) - printk(" %s\n", driv->driver_name); + printk(KERN_INFO " %s\n", driv->driver_name); } static int poll_invalid(struct comedi_device *dev, struct comedi_subdevice *s) @@ -568,7 +570,7 @@ unsigned int comedi_buf_munge(struct comedi_async *async, block_size = num_bytes - count; if (block_size < 0) { - printk("%s: %s: bug! block_size is negative\n", + printk(KERN_WARNING "%s: %s: bug! block_size is negative\n", __FILE__, __func__); break; } @@ -579,7 +581,8 @@ unsigned int comedi_buf_munge(struct comedi_async *async, s->munge(s->device, s, async->prealloc_buf + async->munge_ptr, block_size, async->munge_chan); - smp_wmb(); /* barrier insures data is munged in buffer before munge_count is incremented */ + smp_wmb(); /* barrier insures data is munged in buffer + * before munge_count is incremented */ async->munge_chan += block_size / num_sample_bytes; async->munge_chan %= async->cmd.chanlist_len; @@ -649,7 +652,7 @@ unsigned comedi_buf_write_free(struct comedi_async *async, unsigned int nbytes) if ((int)(async->buf_write_count + nbytes - async->buf_write_alloc_count) > 0) { printk - ("comedi: attempted to write-free more bytes than have been write-allocated.\n"); + (KERN_INFO "comedi: attempted to write-free more bytes than have been write-allocated.\n"); nbytes = async->buf_write_alloc_count - async->buf_write_count; } async->buf_write_count += nbytes; @@ -678,7 +681,8 @@ unsigned comedi_buf_read_alloc(struct comedi_async *async, unsigned nbytes) /* transfers control of a chunk from reader to free buffer space */ unsigned comedi_buf_read_free(struct comedi_async *async, unsigned int nbytes) { - /* barrier insures data has been read out of buffer before read count is incremented */ + /* barrier insures data has been read out of + * buffer before read count is incremented */ smp_mb(); if ((int)(async->buf_read_count + nbytes - async->buf_read_alloc_count) > 0) { diff --git a/drivers/staging/comedi/drivers/8253.h b/drivers/staging/comedi/drivers/8253.h index 0bb35db4ea3b..3eb45d46e05b 100644 --- a/drivers/staging/comedi/drivers/8253.h +++ b/drivers/staging/comedi/drivers/8253.h @@ -214,7 +214,8 @@ static inline void i8253_cascade_ns_to_timer_2div(int i8253_osc_base, #ifndef CMDTEST /* i8254_load programs 8254 counter chip. It should also work for the 8253. - * base_address is the lowest io address for the chip (the address of counter 0). + * base_address is the lowest io address + * for the chip (the address of counter 0). * counter_number is the counter you want to load (0,1 or 2) * count is the number to load into the counter. * diff --git a/drivers/staging/comedi/drivers/Makefile b/drivers/staging/comedi/drivers/Makefile index df2854d543cc..be995144e20d 100644 --- a/drivers/staging/comedi/drivers/Makefile +++ b/drivers/staging/comedi/drivers/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_3120.o obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_3501.o obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_3xxx.o obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci6208.o +obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci7230.o obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci7296.o obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci7432.o obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci8164.o diff --git a/drivers/staging/comedi/drivers/adl_pci6208.c b/drivers/staging/comedi/drivers/adl_pci6208.c index 6925faaf5293..712b9e0788b6 100644 --- a/drivers/staging/comedi/drivers/adl_pci6208.c +++ b/drivers/staging/comedi/drivers/adl_pci6208.c @@ -54,7 +54,7 @@ References: #include "../comedidev.h" #include "comedi_pci.h" -#define PCI6208_DRIVER_NAME "adl_pci6208" +#define PCI6208_DRIVER_NAME "adl_pci6208" /* Board descriptions */ struct pci6208_board { @@ -134,10 +134,10 @@ static int pci6208_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data); /* static int pci6208_dio_insn_bits (struct comedi_device *dev, - * struct comedi_subdevice *s, */ + * struct comedi_subdevice *s, */ /* struct comedi_insn *insn,unsigned int *data); */ /* static int pci6208_dio_insn_config(struct comedi_device *dev, - * struct comedi_subdevice *s, */ + * struct comedi_subdevice *s, */ /* struct comedi_insn *insn,unsigned int *data); */ /* @@ -268,7 +268,7 @@ static int pci6208_ao_rinsn(struct comedi_device *dev, * This allows packed reading/writing of the DIO channels. The * comedi core can convert between insn_bits and insn_read/write */ /* static int pci6208_dio_insn_bits(struct comedi_device *dev, - * struct comedi_subdevice *s, */ + * struct comedi_subdevice *s, */ /* struct comedi_insn *insn,unsigned int *data) */ /* { */ /* if(insn->n!=2)return -EINVAL; */ @@ -293,7 +293,7 @@ static int pci6208_ao_rinsn(struct comedi_device *dev, /* } */ /* static int pci6208_dio_insn_config(struct comedi_device *dev, - * struct comedi_subdevice *s, */ + * struct comedi_subdevice *s, */ /* struct comedi_insn *insn,unsigned int *data) */ /* { */ /* int chan=CR_CHAN(insn->chanspec); */ diff --git a/drivers/staging/comedi/drivers/adl_pci7230.c b/drivers/staging/comedi/drivers/adl_pci7230.c new file mode 100644 index 000000000000..24a82eb9d153 --- /dev/null +++ b/drivers/staging/comedi/drivers/adl_pci7230.c @@ -0,0 +1,206 @@ +/* + comedi/drivers/adl_pci7230.c + + Hardware comedi driver fot PCI7230 Adlink card + Copyright (C) 2010 David Fernandez <dfcastelao@gmail.com> + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + +*/ +/* +Driver: adl_pci7230 +Description: Driver for the Adlink PCI-7230 32 ch. isolated digital io board +Devices: [ADLink] PCI-7230 (adl_pci7230) +Author: David Fernandez <dfcastelao@gmail.com> +Status: experimental +Updated: Mon, 14 Apr 2008 15:08:14 +0100 + +Configuration Options: + [0] - PCI bus of device (optional) + [1] - PCI slot of device (optional) + If bus/slot is not specified, the first supported + PCI device found will be used. +*/ + +#include "../comedidev.h" +#include <linux/kernel.h> +#include "comedi_pci.h" + +#define PCI7230_DI 0x00 +#define PCI7230_DO 0x00 + +#define PCI_DEVICE_ID_PCI7230 0x7230 + +static DEFINE_PCI_DEVICE_TABLE(adl_pci7230_pci_table) = { + { + PCI_VENDOR_ID_ADLINK, + PCI_DEVICE_ID_PCI7230, + PCI_ANY_ID, + PCI_ANY_ID, + 0, + 0, + 0 + }, + {0} +}; + +MODULE_DEVICE_TABLE(pci, adl_pci7230_pci_table); + +struct adl_pci7230_private { + int data; + struct pci_dev *pci_dev; +}; + +#define devpriv ((struct adl_pci7230_private *)dev->private) + +static int adl_pci7230_attach(struct comedi_device *dev, + struct comedi_devconfig *it); +static int adl_pci7230_detach(struct comedi_device *dev); +static struct comedi_driver driver_adl_pci7230 = { + .driver_name = "adl_pci7230", + .module = THIS_MODULE, + .attach = adl_pci7230_attach, + .detach = adl_pci7230_detach, +}; + +/* Digital IO */ + +static int adl_pci7230_di_insn_bits(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data); + +static int adl_pci7230_do_insn_bits(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data); + +static int adl_pci7230_attach(struct comedi_device *dev, + struct comedi_devconfig *it) +{ + struct pci_dev *pcidev; + struct comedi_subdevice *s; + int bus, slot; + + printk(KERN_INFO "comedi%d: adl_pci7230\n", dev->minor); + + dev->board_name = "pci7230"; + bus = it->options[0]; + slot = it->options[1]; + + if (alloc_private(dev, sizeof(struct adl_pci7230_private)) < 0) + return -ENOMEM; + + if (alloc_subdevices(dev, 2) < 0) + return -ENOMEM; + + for (pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL); + pcidev != NULL; + pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pcidev)) { + + if (pcidev->vendor == PCI_VENDOR_ID_ADLINK && + pcidev->device == PCI_DEVICE_ID_PCI7230) { + if (bus || slot) { + /* requested particular bus/slot */ + if (pcidev->bus->number != bus || + PCI_SLOT(pcidev->devfn) != slot) { + continue; + } + } + devpriv->pci_dev = pcidev; + break; + } + } + if (pcidev == NULL) { + printk(KERN_ERR "comedi%d: no supported board found! (req. bus/slot : %d/%d)\n", + dev->minor, bus, slot); + return -EIO; + } + if (comedi_pci_enable(pcidev, "adl_pci7230") < 0) { + printk(KERN_ERR "comedi%d: Failed to enable PCI device and request regions\n", + dev->minor); + return -EIO; + } + dev->iobase = pci_resource_start(pcidev, 2); + printk(KERN_DEBUG "comedi: base addr %4lx\n", dev->iobase); + + s = dev->subdevices + 0; + /* Isolated do */ + s->type = COMEDI_SUBD_DO; + s->subdev_flags = SDF_WRITABLE | SDF_GROUND | SDF_COMMON; + s->n_chan = 16; + s->maxdata = 1; + s->range_table = &range_digital; + s->insn_bits = adl_pci7230_do_insn_bits; + + s = dev->subdevices + 1; + /* Isolated di */ + s->type = COMEDI_SUBD_DI; + s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON; + s->n_chan = 16; + s->maxdata = 1; + s->range_table = &range_digital; + s->insn_bits = adl_pci7230_di_insn_bits; + + printk(KERN_DEBUG "comedi: attached\n"); + + return 1; +} + +static int adl_pci7230_detach(struct comedi_device *dev) +{ + printk(KERN_DEBUG "comedi%d: pci7230: remove\n", dev->minor); + + if (devpriv && devpriv->pci_dev) { + if (dev->iobase) + comedi_pci_disable(devpriv->pci_dev); + pci_dev_put(devpriv->pci_dev); + } + + return 0; +} + +static int adl_pci7230_do_insn_bits(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) +{ + if (insn->n != 2) + return -EINVAL; + + if (data[0]) { + s->state &= ~data[0]; + s->state |= (data[0] & data[1]); + + outl((s->state << 16) & 0xffffffff, dev->iobase + PCI7230_DO); + } + + return 2; +} + +static int adl_pci7230_di_insn_bits(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) +{ + if (insn->n != 2) + return -EINVAL; + + data[1] = inl(dev->iobase + PCI7230_DI) & 0xffffffff; + + return 2; +} + +COMEDI_PCI_INITCLEANUP(driver_adl_pci7230, adl_pci7230_pci_table); diff --git a/drivers/staging/comedi/drivers/adl_pci9111.c b/drivers/staging/comedi/drivers/adl_pci9111.c index da172a553d15..bbe0e332dae8 100644 --- a/drivers/staging/comedi/drivers/adl_pci9111.c +++ b/drivers/staging/comedi/drivers/adl_pci9111.c @@ -585,19 +585,17 @@ pci9111_ai_do_cmd_test(struct comedi_device *dev, (cmd->scan_begin_src != TRIG_EXT)) error++; - if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT)) { + if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT)) error++; - } if ((cmd->convert_src == TRIG_TIMER) && !((cmd->scan_begin_src == TRIG_TIMER) || - (cmd->scan_begin_src == TRIG_FOLLOW))) { + (cmd->scan_begin_src == TRIG_FOLLOW))) error++; - } if ((cmd->convert_src == TRIG_EXT) && !((cmd->scan_begin_src == TRIG_EXT) || - (cmd->scan_begin_src == TRIG_FOLLOW))) { + (cmd->scan_begin_src == TRIG_FOLLOW))) error++; - } + if (cmd->scan_end_src != TRIG_COUNT) error++; @@ -1067,9 +1065,8 @@ static int pci9111_ai_insn_read(struct comedi_device *dev, pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0])); - if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0])) { + if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0])) pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0])); - } pci9111_fifo_reset(); @@ -1090,11 +1087,10 @@ static int pci9111_ai_insn_read(struct comedi_device *dev, conversion_done: - if (resolution == PCI9111_HR_AI_RESOLUTION) { + if (resolution == PCI9111_HR_AI_RESOLUTION) data[i] = pci9111_hr_ai_get_data(); - } else { + else data[i] = pci9111_ai_get_data(); - } } #ifdef AI_INSN_DEBUG @@ -1131,9 +1127,8 @@ static int pci9111_ao_insn_read(struct comedi_device *dev, { int i; - for (i = 0; i < insn->n; i++) { + for (i = 0; i < insn->n; i++) data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK; - } return i; } @@ -1222,9 +1217,8 @@ static int pci9111_attach(struct comedi_device *dev, int error, i; const struct pci9111_board *board; - if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0) { + if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0) return -ENOMEM; - } /* Probe the device to determine what device in the series it is. */ printk("comedi%d: " PCI9111_DRIVER_NAME " driver\n", dev->minor); @@ -1394,14 +1388,12 @@ static int pci9111_detach(struct comedi_device *dev) } /* Release previously allocated irq */ - if (dev->irq != 0) { + if (dev->irq != 0) free_irq(dev->irq, dev); - } if (dev_private != 0 && dev_private->pci_device != 0) { - if (dev->iobase) { + if (dev->iobase) comedi_pci_disable(dev_private->pci_device); - } pci_dev_put(dev_private->pci_device); } diff --git a/drivers/staging/comedi/drivers/adl_pci9118.c b/drivers/staging/comedi/drivers/adl_pci9118.c index 944f20ae5a6a..c7cba9579d07 100644 --- a/drivers/staging/comedi/drivers/adl_pci9118.c +++ b/drivers/staging/comedi/drivers/adl_pci9118.c @@ -44,20 +44,20 @@ c) If isn't used DMA then you can use only mode where Configuration options: [0] - PCI bus of device (optional) [1] - PCI slot of device (optional) - If bus/slot is not specified, then first available PCI - card will be used. + If bus/slot is not specified, then first available PCI + card will be used. [2] - 0= standard 8 DIFF/16 SE channels configuration - n= external multiplexer connected, 1<=n<=256 + n = external multiplexer connected, 1 <= n <= 256 [3] - 0=autoselect DMA or EOC interrupts operation - 1=disable DMA mode - 3=disable DMA and INT, only insn interface will work + 1 = disable DMA mode + 3 = disable DMA and INT, only insn interface will work [4] - sample&hold signal - card can generate signal for external S&H board - 0=use SSHO (pin 45) signal is generated in onboard hardware S&H logic - 0!=use ADCHN7 (pin 23) signal is generated from driver, number - say how long delay is requested in ns and sign polarity of the hold - (in this case external multiplexor can serve only 128 channels) + 0 = use SSHO(pin 45) signal is generated in onboard hardware S&H logic + 0 != use ADCHN7(pin 23) signal is generated from driver, number say how + long delay is requested in ns and sign polarity of the hold + (in this case external multiplexor can serve only 128 channels) [5] - 0=stop measure on all hardware errors - 2|=ignore ADOR - A/D Overrun status + 2 | = ignore ADOR - A/D Overrun status 8|=ignore Bover - A/D Burst Mode Overrun status 256|=ignore nFull - A/D FIFO Full status @@ -75,9 +75,15 @@ Configuration options: #include "comedi_fc.h" /* paranoid checks are broken */ -#undef PCI9118_PARANOIDCHECK /* if defined, then is used code which control correct channel number on every 12 bit sample */ +#undef PCI9118_PARANOIDCHECK /* + * if defined, then is used code which control + * correct channel number on every 12 bit sample + */ -#undef PCI9118_EXTDEBUG /* if defined then driver prints a lot of messages */ +#undef PCI9118_EXTDEBUG /* + * if defined then driver prints + * a lot of messages + */ #undef DPRINTK #ifdef PCI9118_EXTDEBUG @@ -87,7 +93,10 @@ Configuration options: #endif #define IORANGE_9118 64 /* I hope */ -#define PCI9118_CHANLEN 255 /* len of chanlist, some source say 256, but reality looks like 255 :-( */ +#define PCI9118_CHANLEN 255 /* + * len of chanlist, some source say 256, + * but reality looks like 255 :-( + */ #define PCI9118_CNT0 0x00 /* R/W: 8254 counter 0 */ #define PCI9118_CNT1 0x04 /* R/W: 8254 counter 0 */ @@ -113,20 +122,47 @@ Configuration options: #define AdControl_UniP 0x80 /* 1=bipolar, 0=unipolar */ #define AdControl_Diff 0x40 /* 1=differential, 0= single end inputs */ #define AdControl_SoftG 0x20 /* 1=8254 counter works, 0=counter stops */ -#define AdControl_ExtG 0x10 /* 1=8254 countrol controlled by TGIN(pin 46), 0=controled by SoftG */ -#define AdControl_ExtM 0x08 /* 1=external hardware trigger (pin 44), 0=internal trigger */ -#define AdControl_TmrTr 0x04 /* 1=8254 is iternal trigger source, 0=software trigger is source (register PCI9118_SOFTTRG) */ +#define AdControl_ExtG 0x10 /* + * 1=8254 countrol controlled by TGIN(pin 46), + * 0=controlled by SoftG + */ +#define AdControl_ExtM 0x08 /* + * 1=external hardware trigger (pin 44), + * 0=internal trigger + */ +#define AdControl_TmrTr 0x04 /* + * 1=8254 is iternal trigger source, + * 0=software trigger is source + * (register PCI9118_SOFTTRG) + */ #define AdControl_Int 0x02 /* 1=enable INT, 0=disable */ #define AdControl_Dma 0x01 /* 1=enable DMA, 0=disable */ /* bits from A/D function register (PCI9118_ADFUNC) */ -#define AdFunction_PDTrg 0x80 /* 1=positive, 0=negative digital trigger (only positive is correct) */ -#define AdFunction_PETrg 0x40 /* 1=positive, 0=negative external trigger (only positive is correct) */ +#define AdFunction_PDTrg 0x80 /* + * 1=positive, + * 0=negative digital trigger + * (only positive is correct) + */ +#define AdFunction_PETrg 0x40 /* + * 1=positive, + * 0=negative external trigger + * (only positive is correct) + */ #define AdFunction_BSSH 0x20 /* 1=with sample&hold, 0=without */ #define AdFunction_BM 0x10 /* 1=burst mode, 0=normal mode */ -#define AdFunction_BS 0x08 /* 1=burst mode start, 0=burst mode stop */ -#define AdFunction_PM 0x04 /* 1=post trigger mode, 0=not post trigger */ -#define AdFunction_AM 0x02 /* 1=about trigger mode, 0=not about trigger */ +#define AdFunction_BS 0x08 /* + * 1=burst mode start, + * 0=burst mode stop + */ +#define AdFunction_PM 0x04 /* + * 1=post trigger mode, + * 0=not post trigger + */ +#define AdFunction_AM 0x02 /* + * 1=about trigger mode, + * 0=not about trigger + */ #define AdFunction_Start 0x01 /* 1=trigger start, 0=trigger stop */ /* bits from A/D status register (PCI9118_ADSTAT) */ @@ -178,30 +214,39 @@ static const struct comedi_lrange range_pci9118hg = { 8, { } }; -#define PCI9118_BIPOLAR_RANGES 4 /* used for test on mixture of BIP/UNI ranges */ +#define PCI9118_BIPOLAR_RANGES 4 /* + * used for test on mixture + * of BIP/UNI ranges + */ static int pci9118_attach(struct comedi_device *dev, struct comedi_devconfig *it); static int pci9118_detach(struct comedi_device *dev); struct boardtype { - const char *name; /* board name */ - int vendor_id; /* PCI vendor a device ID of card */ + const char *name; /* board name */ + int vendor_id; /* PCI vendor a device ID of card */ int device_id; - int iorange_amcc; /* iorange for own S5933 region */ - int iorange_9118; /* pass thru card region size */ - int n_aichan; /* num of A/D chans */ - int n_aichand; /* num of A/D chans in diff mode */ - int mux_aichan; /* num of A/D chans with external multiplexor */ - int n_aichanlist; /* len of chanlist */ - int n_aochan; /* num of D/A chans */ - int ai_maxdata; /* resolution of A/D */ - int ao_maxdata; /* resolution of D/A */ - const struct comedi_lrange *rangelist_ai; /* rangelist for A/D */ - const struct comedi_lrange *rangelist_ao; /* rangelist for D/A */ - unsigned int ai_ns_min; /* max sample speed of card v ns */ - unsigned int ai_pacer_min; /* minimal pacer value (c1*c2 or c1 in burst) */ - int half_fifo_size; /* size of FIFO/2 */ + int iorange_amcc; /* iorange for own S5933 region */ + int iorange_9118; /* pass thru card region size */ + int n_aichan; /* num of A/D chans */ + int n_aichand; /* num of A/D chans in diff mode */ + int mux_aichan; /* + * num of A/D chans with + * external multiplexor + */ + int n_aichanlist; /* len of chanlist */ + int n_aochan; /* num of D/A chans */ + int ai_maxdata; /* resolution of A/D */ + int ao_maxdata; /* resolution of D/A */ + const struct comedi_lrange *rangelist_ai; /* rangelist for A/D */ + const struct comedi_lrange *rangelist_ao; /* rangelist for D/A */ + unsigned int ai_ns_min; /* max sample speed of card v ns */ + unsigned int ai_pacer_min; /* + * minimal pacer value + * (c1*c2 or c1 in burst) + */ + int half_fifo_size; /* size of FIFO/2 */ }; @@ -246,63 +291,113 @@ static struct comedi_driver driver_pci9118 = { COMEDI_PCI_INITCLEANUP(driver_pci9118, pci9118_pci_table); struct pci9118_private { - unsigned long iobase_a; /* base+size for AMCC chip */ - unsigned int master; /* master capable */ - struct pci_dev *pcidev; /* ptr to actual pcidev */ - unsigned int usemux; /* we want to use external multiplexor! */ + unsigned long iobase_a; /* base+size for AMCC chip */ + unsigned int master; /* master capable */ + struct pci_dev *pcidev; /* ptr to actual pcidev */ + unsigned int usemux; /* we want to use external multiplexor! */ #ifdef PCI9118_PARANOIDCHECK - unsigned short chanlist[PCI9118_CHANLEN + 1]; /* list of scaned channel */ - unsigned char chanlistlen; /* number of scanlist */ + unsigned short chanlist[PCI9118_CHANLEN + 1]; /* + * list of + * scanned channel + */ + unsigned char chanlistlen; /* number of scanlist */ #endif - unsigned char AdControlReg; /* A/D control register */ - unsigned char IntControlReg; /* Interrupt control register */ - unsigned char AdFunctionReg; /* A/D function register */ - char valid; /* driver is ok */ - char ai_neverending; /* we do unlimited AI */ - unsigned int i8254_osc_base; /* frequence of onboard oscilator */ - unsigned int ai_do; /* what do AI? 0=nothing, 1 to 4 mode */ - unsigned int ai_act_scan; /* how many scans we finished */ - unsigned int ai_buf_ptr; /* data buffer ptr in samples */ - unsigned int ai_n_chan; /* how many channels is measured */ - unsigned int ai_n_scanlen; /* len of actual scanlist */ - unsigned int ai_n_realscanlen; /* what we must transfer for one outgoing scan include front/back adds */ - unsigned int ai_act_dmapos; /* position in actual real stream */ - unsigned int ai_add_front; /* how many channels we must add before scan to satisfy S&H? */ - unsigned int ai_add_back; /* how many channels we must add before scan to satisfy DMA? */ - unsigned int *ai_chanlist; /* actaul chanlist */ + unsigned char AdControlReg; /* A/D control register */ + unsigned char IntControlReg; /* Interrupt control register */ + unsigned char AdFunctionReg; /* A/D function register */ + char valid; /* driver is ok */ + char ai_neverending; /* we do unlimited AI */ + unsigned int i8254_osc_base; /* frequence of onboard oscilator */ + unsigned int ai_do; /* what do AI? 0=nothing, 1 to 4 mode */ + unsigned int ai_act_scan; /* how many scans we finished */ + unsigned int ai_buf_ptr; /* data buffer ptr in samples */ + unsigned int ai_n_chan; /* how many channels is measured */ + unsigned int ai_n_scanlen; /* len of actual scanlist */ + unsigned int ai_n_realscanlen; /* + * what we must transfer for one + * outgoing scan include front/back adds + */ + unsigned int ai_act_dmapos; /* position in actual real stream */ + unsigned int ai_add_front; /* + * how many channels we must add + * before scan to satisfy S&H? + */ + unsigned int ai_add_back; /* + * how many channels we must add + * before scan to satisfy DMA? + */ + unsigned int *ai_chanlist; /* actual chanlist */ unsigned int ai_timer1; unsigned int ai_timer2; unsigned int ai_flags; - char ai12_startstop; /* measure can start/stop on external trigger */ - unsigned int ai_divisor1, ai_divisor2; /* divisors for start of measure on external start */ + char ai12_startstop; /* + * measure can start/stop + * on external trigger + */ + unsigned int ai_divisor1, ai_divisor2; /* + * divisors for start of measure + * on external start + */ unsigned int ai_data_len; short *ai_data; - short ao_data[2]; /* data output buffer */ - unsigned int ai_scans; /* number of scans to do */ - char dma_doublebuf; /* we can use double buffring */ - unsigned int dma_actbuf; /* which buffer is used now */ - short *dmabuf_virt[2]; /* pointers to begin of DMA buffer */ - unsigned long dmabuf_hw[2]; /* hw address of DMA buff */ - unsigned int dmabuf_size[2]; /* size of dma buffer in bytes */ - unsigned int dmabuf_use_size[2]; /* which size we may now used for transfer */ - unsigned int dmabuf_used_size[2]; /* which size was trully used */ + short ao_data[2]; /* data output buffer */ + unsigned int ai_scans; /* number of scans to do */ + char dma_doublebuf; /* we can use double buffring */ + unsigned int dma_actbuf; /* which buffer is used now */ + short *dmabuf_virt[2]; /* + * pointers to begin of + * DMA buffer + */ + unsigned long dmabuf_hw[2]; /* hw address of DMA buff */ + unsigned int dmabuf_size[2]; /* + * size of dma buffer in bytes + */ + unsigned int dmabuf_use_size[2]; /* + * which size we may now use + * for transfer + */ + unsigned int dmabuf_used_size[2]; /* which size was truly used */ unsigned int dmabuf_panic_size[2]; - unsigned int dmabuf_samples[2]; /* size in samples */ - int dmabuf_pages[2]; /* number of pages in buffer */ - unsigned char cnt0_users; /* bit field of 8254 CNT0 users (0-unused, 1-AO, 2-DI, 3-DO) */ - unsigned char exttrg_users; /* bit field of external trigger users (0-AI, 1-AO, 2-DI, 3-DO) */ - unsigned int cnt0_divisor; /* actual CNT0 divisor */ - void (*int_ai_func) (struct comedi_device *, struct comedi_subdevice *, unsigned short, unsigned int, unsigned short); /* ptr to actual interrupt AI function */ - unsigned char ai16bits; /* =1 16 bit card */ - unsigned char usedma; /* =1 use DMA transfer and not INT */ - unsigned char useeoshandle; /* =1 change WAKE_EOS DMA transfer to fit on every second */ - unsigned char usessh; /* =1 turn on S&H support */ - int softsshdelay; /* >0 use software S&H, numer is requested delay in ns */ - unsigned char softsshsample; /* polarity of S&H signal in sample state */ - unsigned char softsshhold; /* polarity of S&H signal in hold state */ - unsigned int ai_maskerr; /* which warning was printed */ - unsigned int ai_maskharderr; /* on which error bits stops */ - unsigned int ai_inttrig_start; /* TRIG_INT for start */ + unsigned int dmabuf_samples[2]; /* size in samples */ + int dmabuf_pages[2]; /* number of pages in buffer */ + unsigned char cnt0_users; /* + * bit field of 8254 CNT0 users + * (0-unused, 1-AO, 2-DI, 3-DO) + */ + unsigned char exttrg_users; /* + * bit field of external trigger + * users(0-AI, 1-AO, 2-DI, 3-DO) + */ + unsigned int cnt0_divisor; /* actual CNT0 divisor */ + void (*int_ai_func) (struct comedi_device *, struct comedi_subdevice *, + unsigned short, + unsigned int, + unsigned short); /* + * ptr to actual interrupt + * AI function + */ + unsigned char ai16bits; /* =1 16 bit card */ + unsigned char usedma; /* =1 use DMA transfer and not INT */ + unsigned char useeoshandle; /* + * =1 change WAKE_EOS DMA transfer + * to fit on every second + */ + unsigned char usessh; /* =1 turn on S&H support */ + int softsshdelay; /* + * >0 use software S&H, + * numer is requested delay in ns + */ + unsigned char softsshsample; /* + * polarity of S&H signal + * in sample state + */ + unsigned char softsshhold; /* + * polarity of S&H signal + * in hold state + */ + unsigned int ai_maskerr; /* which warning was printed */ + unsigned int ai_maskharderr; /* on which error bits stops */ + unsigned int ai_inttrig_start; /* TRIG_INT for start */ }; #define devpriv ((struct pci9118_private *)dev->private) @@ -346,12 +441,19 @@ static int pci9118_insn_read_ai(struct comedi_device *dev, devpriv->AdControlReg = AdControl_Int & 0xff; devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg; - outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); /* positive triggers, no S&H, no burst, burst stop, no post trigger, no about trigger, trigger stop */ + outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); + /* + * positive triggers, no S&H, + * no burst, burst stop, + * no post trigger, + * no about trigger, + * trigger stop + */ if (!setup_channel_list(dev, s, 1, &insn->chanspec, 0, 0, 0, 0, 0)) return -EINVAL; - outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ + outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ for (n = 0; n < insn->n; n++) { outw(0, dev->iobase + PCI9118_SOFTTRG); /* start conversion */ @@ -365,7 +467,7 @@ static int pci9118_insn_read_ai(struct comedi_device *dev, comedi_error(dev, "A/D insn timeout"); data[n] = 0; - outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ + outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ return -ETIME; conv_finish: @@ -379,7 +481,7 @@ conv_finish: } } - outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ + outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ return n; } @@ -394,11 +496,11 @@ static int pci9118_insn_write_ao(struct comedi_device *dev, int n, chanreg, ch; ch = CR_CHAN(insn->chanspec); - if (ch) { + if (ch) chanreg = PCI9118_DA2; - } else { + else chanreg = PCI9118_DA1; - } + for (n = 0; n < insn->n; n++) { outl(data[n], dev->iobase + chanreg); @@ -561,11 +663,11 @@ static void pci9118_ai_munge(struct comedi_device *dev, for (i = 0; i < num_samples; i++) { if (devpriv->usedma) array[i] = be16_to_cpu(array[i]); - if (devpriv->ai16bits) { + if (devpriv->ai16bits) array[i] ^= 0x8000; - } else { + else array[i] = (array[i] >> 4) & 0x0fff; - } + } } @@ -590,11 +692,13 @@ static void interrupt_pci9118_ai_onesample(struct comedi_device *dev, #ifdef PCI9118_PARANOIDCHECK if (devpriv->ai16bits == 0) { - if ((sampl & 0x000f) != devpriv->chanlist[s->async->cur_chan]) { /* data dropout! */ + if ((sampl & 0x000f) != devpriv->chanlist[s->async->cur_chan]) { + /* data dropout! */ printk - ("comedi: A/D SAMPL - data dropout: received channel %d, expected %d!\n", - sampl & 0x000f, - devpriv->chanlist[s->async->cur_chan]); + ("comedi: A/D SAMPL - data dropout: " + "received channel %d, expected %d!\n", + sampl & 0x000f, + devpriv->chanlist[s->async->cur_chan]); s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; pci9118_ai_cancel(dev, s); comedi_event(dev, s); @@ -604,11 +708,13 @@ static void interrupt_pci9118_ai_onesample(struct comedi_device *dev, #endif cfc_write_to_buffer(s, sampl); s->async->cur_chan++; - if (s->async->cur_chan >= devpriv->ai_n_scanlen) { /* one scan done */ + if (s->async->cur_chan >= devpriv->ai_n_scanlen) { + /* one scan done */ s->async->cur_chan %= devpriv->ai_n_scanlen; devpriv->ai_act_scan++; if (!(devpriv->ai_neverending)) - if (devpriv->ai_act_scan >= devpriv->ai_scans) { /* all data sampled */ + if (devpriv->ai_act_scan >= devpriv->ai_scans) { + /* all data sampled */ pci9118_ai_cancel(dev, s); s->async->events |= COMEDI_CB_EOA; } @@ -644,16 +750,19 @@ static void interrupt_pci9118_ai_dma(struct comedi_device *dev, comedi_event(dev, s); return; } - if (int_adstat & devpriv->ai_maskerr) -/* if (int_adstat & 0x106) */ + /* if (int_adstat & 0x106) */ if (pci9118_decode_error_status(dev, s, int_adstat)) return; - samplesinbuf = devpriv->dmabuf_use_size[devpriv->dma_actbuf] >> 1; /* number of received real samples */ + samplesinbuf = devpriv->dmabuf_use_size[devpriv->dma_actbuf] >> 1; + /* number of received real samples */ /* DPRINTK("dma_actbuf=%d\n",devpriv->dma_actbuf); */ - if (devpriv->dma_doublebuf) { /* switch DMA buffers if is used double buffering */ + if (devpriv->dma_doublebuf) { /* + * switch DMA buffers if is used + * double buffering + */ next_dma_buf = 1 - devpriv->dma_actbuf; outl(devpriv->dmabuf_hw[next_dma_buf], devpriv->iobase_a + AMCC_OP_REG_MWAR); @@ -666,25 +775,32 @@ static void interrupt_pci9118_ai_dma(struct comedi_device *dev, } if (samplesinbuf) { - m = devpriv->ai_data_len >> 1; /* how many samples is to end of buffer */ -/* DPRINTK("samps=%d m=%d %d %d\n",samplesinbuf,m,s->async->buf_int_count,s->async->buf_int_ptr); */ + m = devpriv->ai_data_len >> 1; /* + * how many samples is to + * end of buffer + */ +/* + * DPRINTK("samps=%d m=%d %d %d\n", + * samplesinbuf,m,s->async->buf_int_count,s->async->buf_int_ptr); + */ sampls = m; move_block_from_dma(dev, s, devpriv->dmabuf_virt[devpriv->dma_actbuf], samplesinbuf); - m = m - sampls; /* m= how many samples was transfered */ + m = m - sampls; /* m= how many samples was transfered */ } /* DPRINTK("YYY\n"); */ if (!devpriv->ai_neverending) - if (devpriv->ai_act_scan >= devpriv->ai_scans) { /* all data sampled */ + if (devpriv->ai_act_scan >= devpriv->ai_scans) { + /* all data sampled */ pci9118_ai_cancel(dev, s); s->async->events |= COMEDI_CB_EOA; } - if (devpriv->dma_doublebuf) { /* switch dma buffers */ + if (devpriv->dma_doublebuf) { /* switch dma buffers */ devpriv->dma_actbuf = 1 - devpriv->dma_actbuf; - } else { /* restart DMA if is not used double buffering */ + } else { /* restart DMA if is not used double buffering */ outl(devpriv->dmabuf_hw[0], devpriv->iobase_a + AMCC_OP_REG_MWAR); outl(devpriv->dmabuf_use_size[0], @@ -705,39 +821,62 @@ static irqreturn_t interrupt_pci9118(int irq, void *d) unsigned int int_daq = 0, int_amcc, int_adstat; if (!dev->attached) - return IRQ_NONE; /* not fully initialized */ + return IRQ_NONE; /* not fully initialized */ - int_daq = inl(dev->iobase + PCI9118_INTSRC) & 0xf; /* get IRQ reasons from card */ - int_amcc = inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* get INT register from AMCC chip */ + int_daq = inl(dev->iobase + PCI9118_INTSRC) & 0xf; + /* get IRQ reasons from card */ + int_amcc = inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR); + /* get INT register from AMCC chip */ -/* DPRINTK("INT daq=0x%01x amcc=0x%08x MWAR=0x%08x MWTC=0x%08x ADSTAT=0x%02x ai_do=%d\n", int_daq, int_amcc, inl(devpriv->iobase_a+AMCC_OP_REG_MWAR), inl(devpriv->iobase_a+AMCC_OP_REG_MWTC), inw(dev->iobase+PCI9118_ADSTAT)&0x1ff,devpriv->ai_do); */ +/* + * DPRINTK("INT daq=0x%01x amcc=0x%08x MWAR=0x%08x + * MWTC=0x%08x ADSTAT=0x%02x ai_do=%d\n", + * int_daq, int_amcc, inl(devpriv->iobase_a+AMCC_OP_REG_MWAR), + * inl(devpriv->iobase_a+AMCC_OP_REG_MWTC), + * inw(dev->iobase+PCI9118_ADSTAT)&0x1ff,devpriv->ai_do); + */ if ((!int_daq) && (!(int_amcc & ANY_S593X_INT))) - return IRQ_NONE; /* interrupt from other source */ + return IRQ_NONE; /* interrupt from other source */ - outl(int_amcc | 0x00ff0000, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* shutdown IRQ reasons in AMCC */ + outl(int_amcc | 0x00ff0000, devpriv->iobase_a + AMCC_OP_REG_INTCSR); + /* shutdown IRQ reasons in AMCC */ - int_adstat = inw(dev->iobase + PCI9118_ADSTAT) & 0x1ff; /* get STATUS register */ + int_adstat = inw(dev->iobase + PCI9118_ADSTAT) & 0x1ff; + /* get STATUS register */ if (devpriv->ai_do) { if (devpriv->ai12_startstop) - if ((int_adstat & AdStatus_DTH) && (int_daq & Int_DTrg)) { /* start stop of measure */ + if ((int_adstat & AdStatus_DTH) && + (int_daq & Int_DTrg)) { + /* start stop of measure */ if (devpriv->ai12_startstop & START_AI_EXT) { devpriv->ai12_startstop &= ~START_AI_EXT; if (!(devpriv->ai12_startstop & - STOP_AI_EXT)) - pci9118_exttrg_del(dev, EXTTRG_AI); /* deactivate EXT trigger */ - start_pacer(dev, devpriv->ai_do, devpriv->ai_divisor1, devpriv->ai_divisor2); /* start pacer */ + STOP_AI_EXT)) + pci9118_exttrg_del + (dev, EXTTRG_AI); + /* deactivate EXT trigger */ + start_pacer(dev, devpriv->ai_do, + devpriv->ai_divisor1, + devpriv->ai_divisor2); + /* start pacer */ outl(devpriv->AdControlReg, - dev->iobase + PCI9118_ADCNTRL); + dev->iobase + PCI9118_ADCNTRL); } else { if (devpriv->ai12_startstop & - STOP_AI_EXT) { + STOP_AI_EXT) { devpriv->ai12_startstop &= - ~STOP_AI_EXT; - pci9118_exttrg_del(dev, EXTTRG_AI); /* deactivate EXT trigger */ - devpriv->ai_neverending = 0; /* well, on next interrupt from DMA/EOC measure will stop */ + ~STOP_AI_EXT; + pci9118_exttrg_del + (dev, EXTTRG_AI); + /* deactivate EXT trigger */ + devpriv->ai_neverending = 0; + /* + * well, on next interrupt from + * DMA/EOC measure will stop + */ } } } @@ -791,20 +930,20 @@ static int pci9118_ai_cmdtest(struct comedi_device *dev, err++; tmp = cmd->scan_begin_src; - if (devpriv->master) { + if (devpriv->master) cmd->scan_begin_src &= TRIG_TIMER | TRIG_EXT | TRIG_FOLLOW; - } else { + else cmd->scan_begin_src &= TRIG_FOLLOW; - } + if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src) err++; tmp = cmd->convert_src; - if (devpriv->master) { + if (devpriv->master) cmd->convert_src &= TRIG_TIMER | TRIG_EXT | TRIG_NOW; - } else { + else cmd->convert_src &= TRIG_TIMER | TRIG_EXT; - } + if (!cmd->convert_src || tmp != cmd->convert_src) err++; @@ -821,7 +960,11 @@ static int pci9118_ai_cmdtest(struct comedi_device *dev, if (err) return 1; - /* step 2: make sure trigger sources are unique and mutually compatible */ + /* + * step 2: + * make sure trigger sources are + * unique and mutually compatible + */ if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_INT && cmd->start_src != TRIG_EXT) { @@ -1026,7 +1169,7 @@ static int pci9118_ai_cmdtest(struct comedi_device *dev, if (cmd->chanlist) if (!check_channel_list(dev, s, cmd->chanlist_len, cmd->chanlist, 0, 0)) - return 5; /* incorrect channels list */ + return 5; /* incorrect channels list */ return 0; } @@ -1043,88 +1186,101 @@ static int Compute_and_setup_dma(struct comedi_device *dev) dmalen1 = devpriv->dmabuf_size[1]; DPRINTK("1 dmalen0=%d dmalen1=%d ai_data_len=%d\n", dmalen0, dmalen1, devpriv->ai_data_len); - /* isn't output buff smaller that our DMA buff? */ + /* isn't output buff smaller that our DMA buff? */ if (dmalen0 > (devpriv->ai_data_len)) { - dmalen0 = devpriv->ai_data_len & ~3L; /* allign to 32bit down */ + dmalen0 = devpriv->ai_data_len & ~3L; /* + * align to 32bit down + */ } if (dmalen1 > (devpriv->ai_data_len)) { - dmalen1 = devpriv->ai_data_len & ~3L; /* allign to 32bit down */ + dmalen1 = devpriv->ai_data_len & ~3L; /* + * align to 32bit down + */ } DPRINTK("2 dmalen0=%d dmalen1=%d \n", dmalen0, dmalen1); - /* we want wake up every scan? */ + /* we want wake up every scan? */ if (devpriv->ai_flags & TRIG_WAKE_EOS) { if (dmalen0 < (devpriv->ai_n_realscanlen << 1)) { - /* uff, too short DMA buffer, disable EOS support! */ + /* uff, too short DMA buffer, disable EOS support! */ devpriv->ai_flags &= (~TRIG_WAKE_EOS); printk - ("comedi%d: WAR: DMA0 buf too short, cann't support TRIG_WAKE_EOS (%d<%d)\n", + ("comedi%d: WAR: DMA0 buf too short, can't " + "support TRIG_WAKE_EOS (%d<%d)\n", dev->minor, dmalen0, devpriv->ai_n_realscanlen << 1); } else { - /* short first DMA buffer to one scan */ + /* short first DMA buffer to one scan */ dmalen0 = devpriv->ai_n_realscanlen << 1; DPRINTK - ("21 dmalen0=%d ai_n_realscanlen=%d useeoshandle=%d\n", - dmalen0, devpriv->ai_n_realscanlen, - devpriv->useeoshandle); + ("21 dmalen0=%d ai_n_realscanlen=%d " + "useeoshandle=%d\n", + dmalen0, devpriv->ai_n_realscanlen, + devpriv->useeoshandle); if (devpriv->useeoshandle) dmalen0 += 2; if (dmalen0 < 4) { printk - ("comedi%d: ERR: DMA0 buf len bug? (%d<4)\n", - dev->minor, dmalen0); + ("comedi%d: ERR: DMA0 buf len bug? " + "(%d<4)\n", + dev->minor, dmalen0); dmalen0 = 4; } } } if (devpriv->ai_flags & TRIG_WAKE_EOS) { if (dmalen1 < (devpriv->ai_n_realscanlen << 1)) { - /* uff, too short DMA buffer, disable EOS support! */ + /* uff, too short DMA buffer, disable EOS support! */ devpriv->ai_flags &= (~TRIG_WAKE_EOS); printk - ("comedi%d: WAR: DMA1 buf too short, cann't support TRIG_WAKE_EOS (%d<%d)\n", + ("comedi%d: WAR: DMA1 buf too short, " + "can't support TRIG_WAKE_EOS (%d<%d)\n", dev->minor, dmalen1, devpriv->ai_n_realscanlen << 1); } else { - /* short second DMA buffer to one scan */ + /* short second DMA buffer to one scan */ dmalen1 = devpriv->ai_n_realscanlen << 1; DPRINTK - ("22 dmalen1=%d ai_n_realscanlen=%d useeoshandle=%d\n", + ("22 dmalen1=%d ai_n_realscanlen=%d " + "useeoshandle=%d\n", dmalen1, devpriv->ai_n_realscanlen, devpriv->useeoshandle); if (devpriv->useeoshandle) dmalen1 -= 2; if (dmalen1 < 4) { printk - ("comedi%d: ERR: DMA1 buf len bug? (%d<4)\n", - dev->minor, dmalen1); + ("comedi%d: ERR: DMA1 buf len bug? " + "(%d<4)\n", + dev->minor, dmalen1); dmalen1 = 4; } } } DPRINTK("3 dmalen0=%d dmalen1=%d \n", dmalen0, dmalen1); - /* transfer without TRIG_WAKE_EOS */ + /* transfer without TRIG_WAKE_EOS */ if (!(devpriv->ai_flags & TRIG_WAKE_EOS)) { - /* if it's possible then allign DMA buffers to length of scan */ + /* if it's possible then allign DMA buffers to length of scan */ i = dmalen0; dmalen0 = (dmalen0 / (devpriv->ai_n_realscanlen << 1)) * (devpriv->ai_n_realscanlen << 1); dmalen0 &= ~3L; if (!dmalen0) - dmalen0 = i; /* uff. very long scan? */ + dmalen0 = i; /* uff. very long scan? */ i = dmalen1; dmalen1 = (dmalen1 / (devpriv->ai_n_realscanlen << 1)) * (devpriv->ai_n_realscanlen << 1); dmalen1 &= ~3L; if (!dmalen1) - dmalen1 = i; /* uff. very long scan? */ - /* if measure isn't neverending then test, if it whole fits into one or two DMA buffers */ + dmalen1 = i; /* uff. very long scan? */ + /* + * if measure isn't neverending then test, if it fits whole + * into one or two DMA buffers + */ if (!devpriv->ai_neverending) { - /* fits whole measure into one DMA buffer? */ + /* fits whole measure into one DMA buffer? */ if (dmalen0 > ((devpriv->ai_n_realscanlen << 1) * devpriv->ai_scans)) { @@ -1138,7 +1294,10 @@ static int Compute_and_setup_dma(struct comedi_device *dev) DPRINTK("3.1 dmalen0=%d dmalen1=%d \n", dmalen0, dmalen1); dmalen0 &= ~3L; - } else { /* fits whole measure into two DMA buffer? */ + } else { /* + * fits whole measure into + * two DMA buffer? + */ if (dmalen1 > ((devpriv->ai_n_realscanlen << 1) * devpriv->ai_scans - dmalen0)) @@ -1154,7 +1313,7 @@ static int Compute_and_setup_dma(struct comedi_device *dev) DPRINTK("4 dmalen0=%d dmalen1=%d \n", dmalen0, dmalen1); - /* these DMA buffer size we'll be used */ + /* these DMA buffer size will be used */ devpriv->dma_actbuf = 0; devpriv->dmabuf_use_size[0] = dmalen0; devpriv->dmabuf_use_size[1] = dmalen1; @@ -1176,10 +1335,11 @@ static int Compute_and_setup_dma(struct comedi_device *dev) } #endif - outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) & (~EN_A2P_TRANSFERS), devpriv->iobase_a + AMCC_OP_REG_MCSR); /* stop DMA */ + outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) & (~EN_A2P_TRANSFERS), + devpriv->iobase_a + AMCC_OP_REG_MCSR); /* stop DMA */ outl(devpriv->dmabuf_hw[0], devpriv->iobase_a + AMCC_OP_REG_MWAR); outl(devpriv->dmabuf_use_size[0], devpriv->iobase_a + AMCC_OP_REG_MWTC); - /* init DMA transfer */ + /* init DMA transfer */ outl(0x00000000 | AINT_WRITE_COMPL, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* outl(0x02000000|AINT_WRITE_COMPL, devpriv->iobase_a+AMCC_OP_REG_INTCSR); */ @@ -1187,7 +1347,9 @@ static int Compute_and_setup_dma(struct comedi_device *dev) outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) | RESET_A2P_FLAGS | A2P_HI_PRIORITY | EN_A2P_TRANSFERS, devpriv->iobase_a + AMCC_OP_REG_MCSR); - outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | EN_A2P_TRANSFERS, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* allow bus mastering */ + outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | EN_A2P_TRANSFERS, + devpriv->iobase_a + AMCC_OP_REG_INTCSR); + /* allow bus mastering */ DPRINTK("adl_pci9118 EDBG: END: Compute_and_setup_dma()\n"); return 0; @@ -1220,17 +1382,21 @@ static int pci9118_ai_docmd_sampl(struct comedi_device *dev, return -EIO; }; - devpriv->int_ai_func = interrupt_pci9118_ai_onesample; /* transfer function */ + devpriv->int_ai_func = interrupt_pci9118_ai_onesample; + /* transfer function */ if (devpriv->ai12_startstop) - pci9118_exttrg_add(dev, EXTTRG_AI); /* activate EXT trigger */ + pci9118_exttrg_add(dev, EXTTRG_AI); + /* activate EXT trigger */ if ((devpriv->ai_do == 1) || (devpriv->ai_do == 2)) devpriv->IntControlReg |= Int_Timer; devpriv->AdControlReg |= AdControl_Int; - outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* allow INT in AMCC */ + outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, + devpriv->iobase_a + AMCC_OP_REG_INTCSR); + /* allow INT in AMCC */ if (!(devpriv->ai12_startstop & (START_AI_EXT | START_AI_INT))) { outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL); @@ -1296,10 +1462,12 @@ static int pci9118_ai_docmd_dma(struct comedi_device *dev, }; if (devpriv->ai12_startstop) { - pci9118_exttrg_add(dev, EXTTRG_AI); /* activate EXT trigger */ + pci9118_exttrg_add(dev, EXTTRG_AI); + /* activate EXT trigger */ } - devpriv->int_ai_func = interrupt_pci9118_ai_dma; /* transfer function */ + devpriv->int_ai_func = interrupt_pci9118_ai_dma; + /* transfer function */ outl(0x02000000 | AINT_WRITE_COMPL, devpriv->iobase_a + AMCC_OP_REG_INTCSR); @@ -1342,7 +1510,7 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ai_add_back = 0; devpriv->ai_maskerr = 0x10e; - /* prepare for start/stop conditions */ + /* prepare for start/stop conditions */ if (cmd->start_src == TRIG_EXT) devpriv->ai12_startstop |= START_AI_EXT; if (cmd->stop_src == TRIG_EXT) { @@ -1369,10 +1537,10 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ai_scans = 0; } - /* use sample&hold signal? */ + /* use sample&hold signal? */ if (cmd->convert_src == TRIG_NOW) { devpriv->usessh = 1; - } /* yes */ + } /* yes */ else { devpriv->usessh = 0; } /* no */ @@ -1381,7 +1549,10 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ai_neverending, devpriv->ai_scans, devpriv->usessh, devpriv->ai12_startstop); - /* use additional sample at end of every scan to satisty DMA 32 bit transfer? */ + /* + * use additional sample at end of every scan + * to satisty DMA 32 bit transfer? + */ devpriv->ai_add_front = 0; devpriv->ai_add_back = 0; devpriv->useeoshandle = 0; @@ -1393,27 +1564,44 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ai_add_back = 1; } if (cmd->convert_src == TRIG_TIMER) { - devpriv->usedma = 0; /* use INT transfer if scanlist have only one channel */ + devpriv->usedma = 0; + /* + * use INT transfer if scanlist + * have only one channel + */ } } if ((cmd->flags & TRIG_WAKE_EOS) && (devpriv->ai_n_scanlen & 1) && (devpriv->ai_n_scanlen > 1)) { if (cmd->scan_begin_src == TRIG_FOLLOW) { - /* vpriv->useeoshandle=1; // change DMA transfer block to fit EOS on every second call */ - devpriv->usedma = 0; /* XXX maybe can be corrected to use 16 bit DMA */ - } else { /* well, we must insert one sample to end of EOS to meet 32 bit transfer */ + /* + * vpriv->useeoshandle=1; // change DMA transfer + * block to fit EOS on every second call + */ + devpriv->usedma = 0; + /* + * XXX maybe can be corrected to use 16 bit DMA + */ + } else { /* + * well, we must insert one sample + * to end of EOS to meet 32 bit transfer + */ devpriv->ai_add_back = 1; } } - } else { /* interrupt transfer don't need any correction */ + } else { /* interrupt transfer don't need any correction */ devpriv->usedma = 0; } - /* we need software S&H signal? It add two samples before every scan as minimum */ + /* + * we need software S&H signal? + * It adds two samples before every scan as minimum + */ if (devpriv->usessh && devpriv->softsshdelay) { devpriv->ai_add_front = 2; - if ((devpriv->usedma == 1) && (devpriv->ai_add_back == 1)) { /* move it to front */ + if ((devpriv->usedma == 1) && (devpriv->ai_add_back == 1)) { + /* move it to front */ devpriv->ai_add_front++; devpriv->ai_add_back = 0; } @@ -1422,17 +1610,22 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) addchans = devpriv->softsshdelay / cmd->convert_arg; if (devpriv->softsshdelay % cmd->convert_arg) addchans++; - if (addchans > (devpriv->ai_add_front - 1)) { /* uff, still short :-( */ + if (addchans > (devpriv->ai_add_front - 1)) { + /* uff, still short */ devpriv->ai_add_front = addchans + 1; if (devpriv->usedma == 1) if ((devpriv->ai_add_front + devpriv->ai_n_chan + devpriv->ai_add_back) & 1) - devpriv->ai_add_front++; /* round up to 32 bit */ + devpriv->ai_add_front++; + /* round up to 32 bit */ } } - /* well, we now know what must be all added */ - devpriv->ai_n_realscanlen = /* what we must take from card in real to have ai_n_scanlen on output? */ + /* well, we now know what must be all added */ + devpriv->ai_n_realscanlen = /* + * what we must take from card in real + * to have ai_n_scanlen on output? + */ (devpriv->ai_add_front + devpriv->ai_n_chan + devpriv->ai_add_back) * (devpriv->ai_n_scanlen / devpriv->ai_n_chan); @@ -1443,7 +1636,7 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ai_n_chan, devpriv->ai_add_back, devpriv->ai_n_scanlen); - /* check and setup channel list */ + /* check and setup channel list */ if (!check_channel_list(dev, s, devpriv->ai_n_chan, devpriv->ai_chanlist, devpriv->ai_add_front, devpriv->ai_add_back)) @@ -1454,9 +1647,16 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->useeoshandle)) return -EINVAL; - /* compute timers settings */ - /* simplest way, fr=4Mhz/(tim1*tim2), channel manipulation without timers effect */ - if (((cmd->scan_begin_src == TRIG_FOLLOW) || (cmd->scan_begin_src == TRIG_EXT) || (cmd->scan_begin_src == TRIG_INT)) && (cmd->convert_src == TRIG_TIMER)) { /* both timer is used for one time */ + /* compute timers settings */ + /* + * simplest way, fr=4Mhz/(tim1*tim2), + * channel manipulation without timers effect + */ + if (((cmd->scan_begin_src == TRIG_FOLLOW) || + (cmd->scan_begin_src == TRIG_EXT) || + (cmd->scan_begin_src == TRIG_INT)) && + (cmd->convert_src == TRIG_TIMER)) { + /* both timer is used for one time */ if (cmd->scan_begin_src == TRIG_EXT) { devpriv->ai_do = 4; } else { @@ -1472,10 +1672,14 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ai_timer2 = cmd->convert_arg; } - if ((cmd->scan_begin_src == TRIG_TIMER) && ((cmd->convert_src == TRIG_TIMER) || (cmd->convert_src == TRIG_NOW))) { /* double timed action */ + if ((cmd->scan_begin_src == TRIG_TIMER) && + ((cmd->convert_src == TRIG_TIMER) || + (cmd->convert_src == TRIG_NOW))) { + /* double timed action */ if (!devpriv->usedma) { comedi_error(dev, - "cmd->scan_begin_src=TRIG_TIMER works only with bus mastering!"); + "cmd->scan_begin_src=TRIG_TIMER works " + "only with bus mastering!"); return -EIO; } @@ -1496,15 +1700,27 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ai_do = 3; } - start_pacer(dev, -1, 0, 0); /* stop pacer */ + start_pacer(dev, -1, 0, 0); /* stop pacer */ - devpriv->AdControlReg = 0; /* bipolar, S.E., use 8254, stop 8354, internal trigger, soft trigger, disable DMA */ + devpriv->AdControlReg = 0; /* + * bipolar, S.E., use 8254, stop 8354, + * internal trigger, soft trigger, + * disable DMA + */ outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); - devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg; /* positive triggers, no S&H, no burst, burst stop, no post trigger, no about trigger, trigger stop */ + devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg; + /* + * positive triggers, no S&H, no burst, + * burst stop, no post trigger, + * no about trigger, trigger stop + */ outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); udelay(1); - outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ - inl(dev->iobase + PCI9118_ADSTAT); /* flush A/D and INT status register */ + outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ + inl(dev->iobase + PCI9118_ADSTAT); /* + * flush A/D and INT + * status register + */ inl(dev->iobase + PCI9118_INTSRC); devpriv->ai_act_scan = 0; @@ -1537,33 +1753,37 @@ static int check_channel_list(struct comedi_device *dev, } if ((frontadd + n_chan + backadd) > s->len_chanlist) { printk - ("comedi%d: range/channel list is too long for actual configuration (%d>%d)!", + ("comedi%d: range/channel list is too long for " + "actual configuration (%d>%d)!", dev->minor, n_chan, s->len_chanlist - frontadd - backadd); return 0; } if (CR_AREF(chanlist[0]) == AREF_DIFF) - differencial = 1; /* all input must be diff */ + differencial = 1; /* all input must be diff */ if (CR_RANGE(chanlist[0]) < PCI9118_BIPOLAR_RANGES) - bipolar = 1; /* all input must be bipolar */ + bipolar = 1; /* all input must be bipolar */ if (n_chan > 1) - for (i = 1; i < n_chan; i++) { /* check S.E/diff */ + for (i = 1; i < n_chan; i++) { /* check S.E/diff */ if ((CR_AREF(chanlist[i]) == AREF_DIFF) != (differencial)) { comedi_error(dev, - "Differencial and single ended inputs cann't be mixtured!"); + "Differencial and single ended " + "inputs can't be mixtured!"); return 0; } if ((CR_RANGE(chanlist[i]) < PCI9118_BIPOLAR_RANGES) != (bipolar)) { comedi_error(dev, - "Bipolar and unipolar ranges cann't be mixtured!"); + "Bipolar and unipolar ranges " + "can't be mixtured!"); return 0; } if ((!devpriv->usemux) & (differencial) & (CR_CHAN(chanlist[i]) >= this_board->n_aichand)) { comedi_error(dev, - "If AREF_DIFF is used then is available only first 8 channels!"); + "If AREF_DIFF is used then is " + "available only first 8 channels!"); return 0; } } @@ -1583,7 +1803,8 @@ static int setup_channel_list(struct comedi_device *dev, unsigned int scanquad, gain, ssh = 0x00; DPRINTK - ("adl_pci9118 EDBG: BGN: setup_channel_list(%d,.,%d,.,%d,%d,%d,%d)\n", + ("adl_pci9118 EDBG: BGN: setup_channel_list" + "(%d,.,%d,.,%d,%d,%d,%d)\n", dev->minor, n_chan, rot, frontadd, backadd, usedma); if (usedma == 1) { @@ -1592,27 +1813,33 @@ static int setup_channel_list(struct comedi_device *dev, } if (CR_AREF(chanlist[0]) == AREF_DIFF) - differencial = 1; /* all input must be diff */ + differencial = 1; /* all input must be diff */ if (CR_RANGE(chanlist[0]) < PCI9118_BIPOLAR_RANGES) - bipolar = 1; /* all input must be bipolar */ + bipolar = 1; /* all input must be bipolar */ - /* All is ok, so we can setup channel/range list */ + /* All is ok, so we can setup channel/range list */ if (!bipolar) { - devpriv->AdControlReg |= AdControl_UniP; /* set unibipolar */ + devpriv->AdControlReg |= AdControl_UniP; + /* set unibipolar */ } else { - devpriv->AdControlReg &= ((~AdControl_UniP) & 0xff); /* enable bipolar */ + devpriv->AdControlReg &= ((~AdControl_UniP) & 0xff); + /* enable bipolar */ } if (differencial) { - devpriv->AdControlReg |= AdControl_Diff; /* enable diff inputs */ + devpriv->AdControlReg |= AdControl_Diff; + /* enable diff inputs */ } else { - devpriv->AdControlReg &= ((~AdControl_Diff) & 0xff); /* set single ended inputs */ + devpriv->AdControlReg &= ((~AdControl_Diff) & 0xff); + /* set single ended inputs */ } - outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); /* setup mode */ + outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); + /* setup mode */ - outl(2, dev->iobase + PCI9118_SCANMOD); /* gods know why this sequence! */ + outl(2, dev->iobase + PCI9118_SCANMOD); + /* gods know why this sequence! */ outl(0, dev->iobase + PCI9118_SCANMOD); outl(1, dev->iobase + PCI9118_SCANMOD); @@ -1622,12 +1849,15 @@ static int setup_channel_list(struct comedi_device *dev, devpriv->chanlist[i] = 0x55aa; #endif - if (frontadd) { /* insert channels for S&H */ + if (frontadd) { /* insert channels for S&H */ ssh = devpriv->softsshsample; DPRINTK("FA: %04x: ", ssh); - for (i = 0; i < frontadd; i++) { /* store range list to card */ - scanquad = CR_CHAN(chanlist[0]); /* get channel number; */ - gain = CR_RANGE(chanlist[0]); /* get gain number */ + for (i = 0; i < frontadd; i++) { + /* store range list to card */ + scanquad = CR_CHAN(chanlist[0]); + /* get channel number; */ + gain = CR_RANGE(chanlist[0]); + /* get gain number */ scanquad |= ((gain & 0x03) << 8); outl(scanquad | ssh, dev->iobase + PCI9118_GAIN); DPRINTK("%02x ", scanquad | ssh); @@ -1637,23 +1867,24 @@ static int setup_channel_list(struct comedi_device *dev, } DPRINTK("SL: ", ssh); - for (i = 0; i < n_chan; i++) { /* store range list to card */ - scanquad = CR_CHAN(chanlist[i]); /* get channel number; */ + for (i = 0; i < n_chan; i++) { /* store range list to card */ + scanquad = CR_CHAN(chanlist[i]); /* get channel number */ #ifdef PCI9118_PARANOIDCHECK devpriv->chanlist[i ^ usedma] = (scanquad & 0xf) << rot; #endif - gain = CR_RANGE(chanlist[i]); /* get gain number */ + gain = CR_RANGE(chanlist[i]); /* get gain number */ scanquad |= ((gain & 0x03) << 8); outl(scanquad | ssh, dev->iobase + PCI9118_GAIN); DPRINTK("%02x ", scanquad | ssh); } DPRINTK("\n "); - if (backadd) { /* insert channels for fit onto 32bit DMA */ + if (backadd) { /* insert channels for fit onto 32bit DMA */ DPRINTK("BA: %04x: ", ssh); - for (i = 0; i < backadd; i++) { /* store range list to card */ - scanquad = CR_CHAN(chanlist[0]); /* get channel number; */ - gain = CR_RANGE(chanlist[0]); /* get gain number */ + for (i = 0; i < backadd; i++) { /* store range list to card */ + scanquad = CR_CHAN(chanlist[0]); + /* get channel number */ + gain = CR_RANGE(chanlist[0]); /* get gain number */ scanquad |= ((gain & 0x03) << 8); outl(scanquad | ssh, dev->iobase + PCI9118_GAIN); DPRINTK("%02x ", scanquad | ssh); @@ -1661,30 +1892,33 @@ static int setup_channel_list(struct comedi_device *dev, DPRINTK("\n "); } #ifdef PCI9118_PARANOIDCHECK - devpriv->chanlist[n_chan ^ usedma] = devpriv->chanlist[0 ^ usedma]; /* for 32bit oerations */ + devpriv->chanlist[n_chan ^ usedma] = devpriv->chanlist[0 ^ usedma]; + /* for 32bit operations */ if (useeos) { - for (i = 1; i < n_chan; i++) { /* store range list to card */ + for (i = 1; i < n_chan; i++) { /* store range list to card */ devpriv->chanlist[(n_chan + i) ^ usedma] = (CR_CHAN(chanlist[i]) & 0xf) << rot; } - devpriv->chanlist[(2 * n_chan) ^ usedma] = devpriv->chanlist[0 ^ usedma]; /* for 32bit oerations */ + devpriv->chanlist[(2 * n_chan) ^ usedma] = + devpriv->chanlist[0 ^ usedma]; + /* for 32bit operations */ useeos = 2; } else { useeos = 1; } #ifdef PCI9118_EXTDEBUG DPRINTK("CHL: "); - for (i = 0; i <= (useeos * n_chan); i++) { + for (i = 0; i <= (useeos * n_chan); i++) DPRINTK("%04x ", devpriv->chanlist[i]); - } + DPRINTK("\n "); #endif #endif - outl(0, dev->iobase + PCI9118_SCANMOD); /* close scan queue */ -/* udelay(100); important delay, or first sample will be cripled */ + outl(0, dev->iobase + PCI9118_SCANMOD); /* close scan queue */ + /* udelay(100); important delay, or first sample will be crippled */ DPRINTK("adl_pci9118 EDBG: END: setup_channel_list()\n"); - return 1; /* we can serve this with scan logic */ + return 1; /* we can serve this with scan logic */ } /* @@ -1699,7 +1933,8 @@ static void pci9118_calc_divisors(char mode, struct comedi_device *dev, char usessh, unsigned int chnsshfront) { DPRINTK - ("adl_pci9118 EDBG: BGN: pci9118_calc_divisors(%d,%d,.,%u,%u,%u,%d,.,.,,%u,%u)\n", + ("adl_pci9118 EDBG: BGN: pci9118_calc_divisors" + "(%d,%d,.,%u,%u,%u,%d,.,.,,%u,%u)\n", mode, dev->minor, *tim1, *tim2, flags, chans, usessh, chnsshfront); switch (mode) { case 1: @@ -1716,17 +1951,18 @@ static void pci9118_calc_divisors(char mode, struct comedi_device *dev, *tim2 = this_board->ai_ns_min; DPRINTK("1 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, *tim1, *tim2); - *div1 = *tim2 / devpriv->i8254_osc_base; /* convert timer (burst) */ + *div1 = *tim2 / devpriv->i8254_osc_base; + /* convert timer (burst) */ DPRINTK("2 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, *tim1, *tim2); if (*div1 < this_board->ai_pacer_min) *div1 = this_board->ai_pacer_min; DPRINTK("3 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, *tim1, *tim2); - *div2 = *tim1 / devpriv->i8254_osc_base; /* scan timer */ + *div2 = *tim1 / devpriv->i8254_osc_base; /* scan timer */ DPRINTK("4 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, *tim1, *tim2); - *div2 = *div2 / *div1; /* major timer is c1*c2 */ + *div2 = *div2 / *div1; /* major timer is c1*c2 */ DPRINTK("5 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, *tim1, *tim2); if (*div2 < chans) @@ -1734,9 +1970,10 @@ static void pci9118_calc_divisors(char mode, struct comedi_device *dev, DPRINTK("6 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, *tim1, *tim2); - *tim2 = *div1 * devpriv->i8254_osc_base; /* real convert timer */ + *tim2 = *div1 * devpriv->i8254_osc_base; + /* real convert timer */ - if (usessh & (chnsshfront == 0)) /* use BSSH signal */ + if (usessh & (chnsshfront == 0)) /* use BSSH signal */ if (*div2 < (chans + 2)) *div2 = chans + 2; @@ -1776,11 +2013,13 @@ static void start_pacer(struct comedi_device *dev, int mode, static int pci9118_exttrg_add(struct comedi_device *dev, unsigned char source) { if (source > 3) - return -1; /* incorrect source */ + return -1; /* incorrect source */ devpriv->exttrg_users |= (1 << source); devpriv->IntControlReg |= Int_DTrg; outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL); - outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* allow INT in AMCC */ + outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, + devpriv->iobase_a + AMCC_OP_REG_INTCSR); + /* allow INT in AMCC */ return 0; } @@ -1790,12 +2029,15 @@ static int pci9118_exttrg_add(struct comedi_device *dev, unsigned char source) static int pci9118_exttrg_del(struct comedi_device *dev, unsigned char source) { if (source > 3) - return -1; /* incorrect source */ + return -1; /* incorrect source */ devpriv->exttrg_users &= ~(1 << source); - if (!devpriv->exttrg_users) { /* shutdown ext trg intterrupts */ + if (!devpriv->exttrg_users) { /* shutdown ext trg intterrupts */ devpriv->IntControlReg &= ~Int_DTrg; - if (!devpriv->IntControlReg) /* all IRQ disabled */ - outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) & (~0x00001f00), devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* disable int in AMCC */ + if (!devpriv->IntControlReg) /* all IRQ disabled */ + outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) & + (~0x00001f00), + devpriv->iobase_a + AMCC_OP_REG_INTCSR); + /* disable int in AMCC */ outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL); } return 0; @@ -1808,17 +2050,29 @@ static int pci9118_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s) { if (devpriv->usedma) - outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) & (~EN_A2P_TRANSFERS), devpriv->iobase_a + AMCC_OP_REG_MCSR); /* stop DMA */ + outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) & + (~EN_A2P_TRANSFERS), + devpriv->iobase_a + AMCC_OP_REG_MCSR); /* stop DMA */ pci9118_exttrg_del(dev, EXTTRG_AI); - start_pacer(dev, 0, 0, 0); /* stop 8254 counters */ + start_pacer(dev, 0, 0, 0); /* stop 8254 counters */ devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg; - outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); /* positive triggers, no S&H, no burst, burst stop, no post trigger, no about trigger, trigger stop */ + outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); + /* + * positive triggers, no S&H, no burst, + * burst stop, no post trigger, + * no about trigger, trigger stop + */ devpriv->AdControlReg = 0x00; - outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); /* bipolar, S.E., use 8254, stop 8354, internal trigger, soft trigger, disable INT and DMA */ + outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); + /* + * bipolar, S.E., use 8254, stop 8354, + * internal trigger, soft trigger, + * disable INT and DMA + */ outl(0, dev->iobase + PCI9118_BURST); outl(1, dev->iobase + PCI9118_SCANMOD); - outl(2, dev->iobase + PCI9118_SCANMOD); /* reset scan queue */ - outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ + outl(2, dev->iobase + PCI9118_SCANMOD); /* reset scan queue */ + outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ devpriv->ai_do = 0; devpriv->usedma = 0; @@ -1832,7 +2086,9 @@ static int pci9118_ai_cancel(struct comedi_device *dev, devpriv->dma_actbuf = 0; if (!devpriv->IntControlReg) - outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* allow INT in AMCC */ + outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, + devpriv->iobase_a + AMCC_OP_REG_INTCSR); + /* allow INT in AMCC */ return 0; } @@ -1845,31 +2101,52 @@ static int pci9118_reset(struct comedi_device *dev) devpriv->IntControlReg = 0; devpriv->exttrg_users = 0; inl(dev->iobase + PCI9118_INTCTRL); - outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL); /* disable interrupts source */ + outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL); + /* disable interrupts source */ outl(0x30, dev->iobase + PCI9118_CNTCTRL); /* outl(0xb4, dev->iobase + PCI9118_CNTCTRL); */ - start_pacer(dev, 0, 0, 0); /* stop 8254 counters */ + start_pacer(dev, 0, 0, 0); /* stop 8254 counters */ devpriv->AdControlReg = 0; - outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); /* bipolar, S.E., use 8254, stop 8354, internal trigger, soft trigger, disable INT and DMA */ + outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); + /* + * bipolar, S.E., use 8254, + * stop 8354, internal trigger, + * soft trigger, + * disable INT and DMA + */ outl(0, dev->iobase + PCI9118_BURST); outl(1, dev->iobase + PCI9118_SCANMOD); - outl(2, dev->iobase + PCI9118_SCANMOD); /* reset scan queue */ + outl(2, dev->iobase + PCI9118_SCANMOD); /* reset scan queue */ devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg; - outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); /* positive triggers, no S&H, no burst, burst stop, no post trigger, no about trigger, trigger stop */ + outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); + /* + * positive triggers, no S&H, + * no burst, burst stop, + * no post trigger, + * no about trigger, + * trigger stop + */ devpriv->ao_data[0] = 2047; devpriv->ao_data[1] = 2047; - outl(devpriv->ao_data[0], dev->iobase + PCI9118_DA1); /* reset A/D outs to 0V */ + outl(devpriv->ao_data[0], dev->iobase + PCI9118_DA1); + /* reset A/D outs to 0V */ outl(devpriv->ao_data[1], dev->iobase + PCI9118_DA2); - outl(0, dev->iobase + PCI9118_DO); /* reset digi outs to L */ + outl(0, dev->iobase + PCI9118_DO); /* reset digi outs to L */ udelay(10); inl(dev->iobase + PCI9118_AD_DATA); - outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ - outl(0, dev->iobase + PCI9118_INTSRC); /* remove INT requests */ - inl(dev->iobase + PCI9118_ADSTAT); /* flush A/D status register */ - inl(dev->iobase + PCI9118_INTSRC); /* flush INT requests */ + outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ + outl(0, dev->iobase + PCI9118_INTSRC); /* remove INT requests */ + inl(dev->iobase + PCI9118_ADSTAT); /* flush A/D status register */ + inl(dev->iobase + PCI9118_INTSRC); /* flush INT requests */ devpriv->AdControlReg = 0; - outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); /* bipolar, S.E., use 8254, stop 8354, internal trigger, soft trigger, disable INT and DMA */ + outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); + /* + * bipolar, S.E., use 8254, + * stop 8354, internal trigger, + * soft trigger, + * disable INT and DMA + */ devpriv->cnt0_users = 0; devpriv->exttrg_users = 0; @@ -1899,7 +2176,7 @@ static int pci9118_attach(struct comedi_device *dev, opt_bus = it->options[0]; opt_slot = it->options[1]; if (it->options[3] & 1) { - master = 0; /* user don't want use bus master */ + master = 0; /* user don't want use bus master */ } else { master = 1; } @@ -1937,17 +2214,17 @@ static int pci9118_attach(struct comedi_device *dev, if (!pcidev) { if (opt_bus || opt_slot) { - printk(" - Card at b:s %d:%d %s\n", + printk(KERN_ERR " - Card at b:s %d:%d %s\n", opt_bus, opt_slot, errstr); } else { - printk(" - Card %s\n", errstr); + printk(KERN_ERR " - Card %s\n", errstr); } return -EIO; } - if (master) { + if (master) pci_set_master(pcidev); - } + pci_bus = pcidev->bus->number; pci_slot = PCI_SLOT(pcidev->devfn); @@ -1956,8 +2233,8 @@ static int pci9118_attach(struct comedi_device *dev, iobase_a = pci_resource_start(pcidev, 0); iobase_9 = pci_resource_start(pcidev, 2); - printk(", b:s:f=%d:%d:%d, io=0x%4lx, 0x%4lx", pci_bus, pci_slot, - pci_func, iobase_9, iobase_a); + printk(KERN_ERR ", b:s:f=%d:%d:%d, io=0x%4lx, 0x%4lx", pci_bus, + pci_slot, pci_func, iobase_9, iobase_a); dev->iobase = iobase_9; dev->board_name = this_board->name; @@ -1968,7 +2245,7 @@ static int pci9118_attach(struct comedi_device *dev, pci9118_reset(dev); if (it->options[3] & 2) - irq = 0; /* user don't want use IRQ */ + irq = 0; /* user don't want use IRQ */ if (irq > 0) { if (request_irq(irq, interrupt_pci9118, IRQF_SHARED, "ADLink PCI-9118", dev)) { @@ -1984,7 +2261,7 @@ static int pci9118_attach(struct comedi_device *dev, dev->irq = irq; - if (master) { /* alloc DMA buffers */ + if (master) { /* alloc DMA buffers */ devpriv->dma_doublebuf = 0; for (i = 0; i < 2; i++) { for (pages = 4; pages >= 0; pages--) { @@ -2024,16 +2301,18 @@ static int pci9118_attach(struct comedi_device *dev, if (it->options[2] > 0) { devpriv->usemux = it->options[2]; if (devpriv->usemux > 256) - devpriv->usemux = 256; /* max 256 channels! */ + devpriv->usemux = 256; /* max 256 channels! */ if (it->options[4] > 0) if (devpriv->usemux > 128) { - devpriv->usemux = 128; /* max 128 channels with softare S&H! */ + devpriv->usemux = 128; + /* max 128 channels with softare S&H! */ } printk(", ext. mux %d channels", devpriv->usemux); } devpriv->softsshdelay = it->options[4]; - if (devpriv->softsshdelay < 0) { /* select sample&hold signal polarity */ + if (devpriv->softsshdelay < 0) { + /* select sample&hold signal polarity */ devpriv->softsshdelay = -devpriv->softsshdelay; devpriv->softsshsample = 0x80; devpriv->softsshhold = 0x00; @@ -2045,7 +2324,8 @@ static int pci9118_attach(struct comedi_device *dev, printk(".\n"); pci_read_config_word(devpriv->pcidev, PCI_COMMAND, &u16w); - pci_write_config_word(devpriv->pcidev, PCI_COMMAND, u16w | 64); /* Enable parity check for parity error */ + pci_write_config_word(devpriv->pcidev, PCI_COMMAND, u16w | 64); + /* Enable parity check for parity error */ ret = alloc_subdevices(dev, 4); if (ret < 0) @@ -2055,11 +2335,11 @@ static int pci9118_attach(struct comedi_device *dev, dev->read_subdev = s; s->type = COMEDI_SUBD_AI; s->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_GROUND | SDF_DIFF; - if (devpriv->usemux) { + if (devpriv->usemux) s->n_chan = devpriv->usemux; - } else { + else s->n_chan = this_board->n_aichan; - } + s->maxdata = this_board->ai_maxdata; s->len_chanlist = this_board->n_aichanlist; s->range_table = this_board->rangelist_ai; @@ -2103,9 +2383,10 @@ static int pci9118_attach(struct comedi_device *dev, s->insn_bits = pci9118_insn_bits_do; devpriv->valid = 1; - devpriv->i8254_osc_base = 250; /* 250ns=4MHz */ - devpriv->ai_maskharderr = 0x10a; /* default measure crash condition */ - if (it->options[5]) /* disable some requested */ + devpriv->i8254_osc_base = 250; /* 250ns=4MHz */ + devpriv->ai_maskharderr = 0x10a; + /* default measure crash condition */ + if (it->options[5]) /* disable some requested */ devpriv->ai_maskharderr &= ~it->options[5]; switch (this_board->ai_maxdata) { @@ -2130,9 +2411,9 @@ static int pci9118_detach(struct comedi_device *dev) if (dev->irq) free_irq(dev->irq, dev); if (devpriv->pcidev) { - if (dev->iobase) { + if (dev->iobase) comedi_pci_disable(devpriv->pcidev); - } + pci_dev_put(devpriv->pcidev); } if (devpriv->dmabuf_virt[0]) diff --git a/drivers/staging/comedi/drivers/adv_pci1710.c b/drivers/staging/comedi/drivers/adv_pci1710.c index 394d2ea19c2e..f5bb286bfbd7 100644 --- a/drivers/staging/comedi/drivers/adv_pci1710.c +++ b/drivers/staging/comedi/drivers/adv_pci1710.c @@ -657,9 +657,9 @@ static void interrupt_pci1710_every_sample(void *d) #endif ++s->async->cur_chan; - if (s->async->cur_chan >= devpriv->ai_n_chan) { + if (s->async->cur_chan >= devpriv->ai_n_chan) s->async->cur_chan = 0; - } + if (s->async->cur_chan == 0) { /* one scan done */ devpriv->ai_act_scan++; @@ -863,12 +863,12 @@ static int pci171x_ai_docmd_and_mode(int mode, struct comedi_device *dev, devpriv->ai_eos = 0; } - if ((devpriv->ai_scans == 0) || (devpriv->ai_scans == -1)) { + if ((devpriv->ai_scans == 0) || (devpriv->ai_scans == -1)) devpriv->neverending_ai = 1; - } /* well, user want neverending */ - else { + /* well, user want neverending */ + else devpriv->neverending_ai = 0; - } + switch (mode) { case 1: case 2: @@ -1109,11 +1109,11 @@ static int pci171x_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ai_timer1 = 0; devpriv->ai_timer2 = 0; - if (cmd->stop_src == TRIG_COUNT) { + if (cmd->stop_src == TRIG_COUNT) devpriv->ai_scans = cmd->stop_arg; - } else { + else devpriv->ai_scans = 0; - } + if (cmd->scan_begin_src == TRIG_FOLLOW) { /* mode 1, 2, 3 */ if (cmd->convert_src == TRIG_TIMER) { /* mode 1 and 2 */ @@ -1593,9 +1593,9 @@ static int pci1710_detach(struct comedi_device *dev) if (dev->irq) free_irq(dev->irq, dev); if (devpriv->pcidev) { - if (dev->iobase) { + if (dev->iobase) comedi_pci_disable(devpriv->pcidev); - } + pci_dev_put(devpriv->pcidev); } } diff --git a/drivers/staging/comedi/drivers/adv_pci1723.c b/drivers/staging/comedi/drivers/adv_pci1723.c index 6b0b7eda3be8..1644490ed0ad 100644 --- a/drivers/staging/comedi/drivers/adv_pci1723.c +++ b/drivers/staging/comedi/drivers/adv_pci1723.c @@ -60,35 +60,57 @@ TODO: #define IORANGE_1723 0x2A /* all the registers for the pci1723 board */ -#define PCI1723_DA(N) ((N)<<1) /* W: D/A register N (0 to 7) */ - -#define PCI1723_SYN_SET 0x12 /*synchronized set register */ -#define PCI1723_ALL_CHNNELE_SYN_STROBE 0x12 /*synchronized status register */ - -#define PCI1723_RANGE_CALIBRATION_MODE 0x14 /* range and calibration mode */ -#define PCI1723_RANGE_CALIBRATION_STATUS 0x14 /* range and calibration status */ - -#define PCI1723_CONTROL_CMD_CALIBRATION_FUN 0x16 /* SADC control command for calibration function */ -#define PCI1723_STATUS_CMD_CALIBRATION_FUN 0x16 /* SADC control status for calibration function */ - -#define PCI1723_CALIBRATION_PARA_STROBE 0x18 /* Calibration parameter strobe */ +#define PCI1723_DA(N) ((N)<<1) /* W: D/A register N (0 to 7) */ + +#define PCI1723_SYN_SET 0x12 /* synchronized set register */ +#define PCI1723_ALL_CHNNELE_SYN_STROBE 0x12 + /* synchronized status register */ + +#define PCI1723_RANGE_CALIBRATION_MODE 0x14 + /* range and calibration mode */ +#define PCI1723_RANGE_CALIBRATION_STATUS 0x14 + /* range and calibration status */ + +#define PCI1723_CONTROL_CMD_CALIBRATION_FUN 0x16 + /* + * SADC control command for + * calibration function + */ +#define PCI1723_STATUS_CMD_CALIBRATION_FUN 0x16 + /* + * SADC control status for + * calibration function + */ + +#define PCI1723_CALIBRATION_PARA_STROBE 0x18 + /* Calibration parameter strobe */ #define PCI1723_DIGITAL_IO_PORT_SET 0x1A /* Digital I/O port setting */ #define PCI1723_DIGITAL_IO_PORT_MODE 0x1A /* Digital I/O port mode */ -#define PCI1723_WRITE_DIGITAL_OUTPUT_CMD 0x1C /* Write digital output command */ +#define PCI1723_WRITE_DIGITAL_OUTPUT_CMD 0x1C + /* Write digital output command */ #define PCI1723_READ_DIGITAL_INPUT_DATA 0x1C /* Read digital input data */ -#define PCI1723_WRITE_CAL_CMD 0x1E /* Write calibration command */ -#define PCI1723_READ_CAL_STATUS 0x1E /* Read calibration status */ +#define PCI1723_WRITE_CAL_CMD 0x1E /* Write calibration command */ +#define PCI1723_READ_CAL_STATUS 0x1E /* Read calibration status */ -#define PCI1723_SYN_STROBE 0x20 /* Synchronized strobe */ +#define PCI1723_SYN_STROBE 0x20 /* Synchronized strobe */ -#define PCI1723_RESET_ALL_CHN_STROBE 0x22 /* Reset all D/A channels strobe */ +#define PCI1723_RESET_ALL_CHN_STROBE 0x22 + /* Reset all D/A channels strobe */ -#define PCI1723_RESET_CAL_CONTROL_STROBE 0x24 /* Reset the calibration controller strobe */ +#define PCI1723_RESET_CAL_CONTROL_STROBE 0x24 + /* + * Reset the calibration + * controller strobe + */ -#define PCI1723_CHANGE_CHA_OUTPUT_TYPE_STROBE 0x26 /* Change D/A channels output type strobe */ +#define PCI1723_CHANGE_CHA_OUTPUT_TYPE_STROBE 0x26 + /* + * Change D/A channels output + * type strobe + */ #define PCI1723_SELECT_CALIBRATION 0x28 /* Select the calibration Ref_V */ @@ -104,14 +126,14 @@ static const struct comedi_lrange range_pci1723 = { 1, { */ struct pci1723_board { const char *name; - int vendor_id; /* PCI vendor a device ID of card */ + int vendor_id; /* PCI vendor a device ID of card */ int device_id; int iorange; char cardtype; - int n_aochan; /* num of D/A chans */ - int n_diochan; /* num of DIO chans */ - int ao_maxdata; /* resolution of D/A */ - const struct comedi_lrange *rangelist_ao; /* rangelist for D/A */ + int n_aochan; /* num of D/A chans */ + int n_diochan; /* num of DIO chans */ + int ao_maxdata; /* resolution of D/A */ + const struct comedi_lrange *rangelist_ao; /* rangelist for D/A */ }; static const struct pci1723_board boardtypes[] = { @@ -128,8 +150,10 @@ static const struct pci1723_board boardtypes[] = { }, }; -/* This is used by modprobe to translate PCI IDs to drivers. Should - * only be used for PCI and ISA-PnP devices */ +/* + * This is used by modprobe to translate PCI IDs to drivers. + * Should only be used for PCI and ISA-PnP devices + */ static DEFINE_PCI_DEVICE_TABLE(pci1723_pci_table) = { { PCI_VENDOR_ID_ADVANTECH, 0x1723, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { @@ -157,47 +181,47 @@ static struct comedi_driver driver_pci1723 = { .detach = pci1723_detach, }; -/* this structure is for data unique to this hardware driver. */ +/* This structure is for data unique to this hardware driver. */ struct pci1723_private { int valid; /* card is usable; */ struct pci_dev *pcidev; - unsigned char da_range[8]; /* D/A output range for each channel */ + unsigned char da_range[8]; /* D/A output range for each channel */ - short ao_data[8]; /* data output buffer */ + short ao_data[8]; /* data output buffer */ }; -/*the following macro to make it easy to -* access the private structure. -*/ +/* The following macro to make it easy to access the private structure. */ #define devpriv ((struct pci1723_private *)dev->private) #define this_board boardtypes /* - * the pci1723 card reset; + * The pci1723 card reset; */ static int pci1723_reset(struct comedi_device *dev) { int i; DPRINTK("adv_pci1723 EDBG: BGN: pci1723_reset(...)\n"); - outw(0x01, dev->iobase + PCI1723_SYN_SET); /* set synchronous output mode */ + outw(0x01, dev->iobase + PCI1723_SYN_SET); + /* set synchronous output mode */ for (i = 0; i < 8; i++) { - /* set all outputs to 0V */ + /* set all outputs to 0V */ devpriv->ao_data[i] = 0x8000; outw(devpriv->ao_data[i], dev->iobase + PCI1723_DA(i)); - /* set all ranges to +/- 10V */ + /* set all ranges to +/- 10V */ devpriv->da_range[i] = 0; outw(((devpriv->da_range[i] << 4) | i), PCI1723_RANGE_CALIBRATION_MODE); } - outw(0, dev->iobase + PCI1723_CHANGE_CHA_OUTPUT_TYPE_STROBE); /* update ranges */ - outw(0, dev->iobase + PCI1723_SYN_STROBE); /* update outputs */ + outw(0, dev->iobase + PCI1723_CHANGE_CHA_OUTPUT_TYPE_STROBE); + /* update ranges */ + outw(0, dev->iobase + PCI1723_SYN_STROBE); /* update outputs */ - /* set asynchronous output mode */ + /* set asynchronous output mode */ outw(0, dev->iobase + PCI1723_SYN_SET); DPRINTK("adv_pci1723 EDBG: END: pci1723_reset(...)\n"); @@ -251,11 +275,11 @@ static int pci1723_dio_insn_config(struct comedi_device *dev, unsigned short dio_mode; mask = 1 << CR_CHAN(insn->chanspec); - if (mask & 0x00FF) { + if (mask & 0x00FF) bits = 0x00FF; - } else { + else bits = 0xFF00; - } + switch (data[0]) { case INSN_CONFIG_DIO_INPUT: s->io_bits &= ~bits; @@ -270,12 +294,12 @@ static int pci1723_dio_insn_config(struct comedi_device *dev, return -EINVAL; } - /* update hardware DIO mode */ - dio_mode = 0x0000; /* low byte output, high byte output */ + /* update hardware DIO mode */ + dio_mode = 0x0000; /* low byte output, high byte output */ if ((s->io_bits & 0x00FF) == 0) - dio_mode |= 0x0001; /* low byte input */ + dio_mode |= 0x0001; /* low byte input */ if ((s->io_bits & 0xFF00) == 0) - dio_mode |= 0x0002; /* high byte input */ + dio_mode |= 0x0002; /* high byte input */ outw(dio_mode, dev->iobase + PCI1723_DIGITAL_IO_PORT_SET); return 1; } @@ -311,7 +335,8 @@ static int pci1723_attach(struct comedi_device *dev, int opt_bus, opt_slot; const char *errstr; - printk("comedi%d: adv_pci1723: board=%s", dev->minor, this_board->name); + printk(KERN_ERR "comedi%d: adv_pci1723: board=%s", + dev->minor, this_board->name); opt_bus = it->options[0]; opt_slot = it->options[1]; @@ -349,10 +374,10 @@ static int pci1723_attach(struct comedi_device *dev, if (!pcidev) { if (opt_bus || opt_slot) { - printk(" - Card at b:s %d:%d %s\n", - opt_bus, opt_slot, errstr); + printk(KERN_ERR " - Card at b:s %d:%d %s\n", + opt_bus, opt_slot, errstr); } else { - printk(" - Card %s\n", errstr); + printk(KERN_ERR " - Card %s\n", errstr); } return -EIO; } @@ -362,8 +387,8 @@ static int pci1723_attach(struct comedi_device *dev, pci_func = PCI_FUNC(pcidev->devfn); iobase = pci_resource_start(pcidev, 2); - printk(", b:s:f=%d:%d:%d, io=0x%4x", pci_bus, pci_slot, pci_func, - iobase); + printk(KERN_ERR ", b:s:f=%d:%d:%d, io=0x%4x", + pci_bus, pci_slot, pci_func, iobase); dev->iobase = iobase; @@ -398,22 +423,23 @@ static int pci1723_attach(struct comedi_device *dev, s->insn_write = pci1723_ao_write_winsn; s->insn_read = pci1723_insn_read_ao; - /* read DIO config */ - switch (inw(dev->iobase + PCI1723_DIGITAL_IO_PORT_MODE) & 0x03) { - case 0x00: /* low byte output, high byte output */ + /* read DIO config */ + switch (inw(dev->iobase + PCI1723_DIGITAL_IO_PORT_MODE) + & 0x03) { + case 0x00: /* low byte output, high byte output */ s->io_bits = 0xFFFF; break; - case 0x01: /* low byte input, high byte output */ + case 0x01: /* low byte input, high byte output */ s->io_bits = 0xFF00; break; - case 0x02: /* low byte output, high byte input */ + case 0x02: /* low byte output, high byte input */ s->io_bits = 0x00FF; break; - case 0x03: /* low byte input, high byte input */ + case 0x03: /* low byte input, high byte input */ s->io_bits = 0x0000; break; } - /* read DIO port state */ + /* read DIO port state */ s->state = inw(dev->iobase + PCI1723_READ_DIGITAL_INPUT_DATA); subdev++; @@ -450,16 +476,15 @@ static int pci1723_attach(struct comedi_device *dev, */ static int pci1723_detach(struct comedi_device *dev) { - printk("comedi%d: pci1723: remove\n", dev->minor); + printk(KERN_ERR "comedi%d: pci1723: remove\n", dev->minor); if (dev->private) { if (devpriv->valid) pci1723_reset(dev); if (devpriv->pcidev) { - if (dev->iobase) { + if (dev->iobase) comedi_pci_disable(devpriv->pcidev); - } pci_dev_put(devpriv->pcidev); } } diff --git a/drivers/staging/comedi/drivers/adv_pci_dio.c b/drivers/staging/comedi/drivers/adv_pci_dio.c index 61d35fe64350..dbfeef8c5bc8 100644 --- a/drivers/staging/comedi/drivers/adv_pci_dio.c +++ b/drivers/staging/comedi/drivers/adv_pci_dio.c @@ -367,9 +367,9 @@ static int pci_dio_insn_bits_di_b(struct comedi_device *dev, int i; data[1] = 0; - for (i = 0; i < d->regs; i++) { + for (i = 0; i < d->regs; i++) data[1] |= inb(dev->iobase + d->addr + i) << (8 * i); - } + return 2; } @@ -882,9 +882,9 @@ static int CheckAndAllocCard(struct comedi_device *dev, struct pci_dio_private *pr, *prev; for (pr = pci_priv, prev = NULL; pr != NULL; prev = pr, pr = pr->next) { - if (pr->pcidev == pcidev) { + if (pr->pcidev == pcidev) return 0; /* this card is used, look for another */ - } + } if (prev) { @@ -1040,22 +1040,22 @@ static int pci_dio_detach(struct comedi_device *dev) int subdev; if (dev->private) { - if (devpriv->valid) { + if (devpriv->valid) pci_dio_reset(dev); - } + /* This shows the silliness of using this kind of * scheme for numbering subdevices. Don't do it. --ds */ subdev = 0; for (i = 0; i < MAX_DI_SUBDEVS; i++) { - if (this_board->sdi[i].chans) { + if (this_board->sdi[i].chans) subdev++; - } + } for (i = 0; i < MAX_DO_SUBDEVS; i++) { - if (this_board->sdo[i].chans) { + if (this_board->sdo[i].chans) subdev++; - } + } for (i = 0; i < MAX_DIO_SUBDEVG; i++) { for (j = 0; j < this_board->sdio[i].regs; j++) { @@ -1071,20 +1071,20 @@ static int pci_dio_detach(struct comedi_device *dev) } if (devpriv->pcidev) { - if (dev->iobase) { + if (dev->iobase) comedi_pci_disable(devpriv->pcidev); - } + pci_dev_put(devpriv->pcidev); } - if (devpriv->prev) { + if (devpriv->prev) devpriv->prev->next = devpriv->next; - } else { + else pci_priv = devpriv->next; - } - if (devpriv->next) { + + if (devpriv->next) devpriv->next->prev = devpriv->prev; - } + } return 0; diff --git a/drivers/staging/comedi/drivers/aio_aio12_8.c b/drivers/staging/comedi/drivers/aio_aio12_8.c index c4cac66db12e..7a1c636df5be 100644 --- a/drivers/staging/comedi/drivers/aio_aio12_8.c +++ b/drivers/staging/comedi/drivers/aio_aio12_8.c @@ -110,7 +110,7 @@ static int aio_aio12_8_ai_read(struct comedi_device *dev, while (timeout && !(inb(dev->iobase + AIO12_8_STATUS) & STATUS_ADC_EOC)) { timeout--; - printk("timeout %d\n", timeout); + printk(KERN_ERR "timeout %d\n", timeout); udelay(1); } if (timeout == 0) { @@ -172,7 +172,7 @@ static int aio_aio12_8_attach(struct comedi_device *dev, iobase = it->options[0]; if (!request_region(iobase, 24, "aio_aio12_8")) { - printk("I/O port conflict"); + printk(KERN_ERR "I/O port conflict"); return -EIO; } diff --git a/drivers/staging/comedi/drivers/amplc_pci224.c b/drivers/staging/comedi/drivers/amplc_pci224.c index c54cca8b2565..8af156dca17e 100644 --- a/drivers/staging/comedi/drivers/amplc_pci224.c +++ b/drivers/staging/comedi/drivers/amplc_pci224.c @@ -496,9 +496,9 @@ pci224_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s, /* Writing a list of values to an AO channel is probably not * very useful, but that's how the interface is defined. */ - for (i = 0; i < insn->n; i++) { + for (i = 0; i < insn->n; i++) pci224_ao_set_data(dev, chan, range, data[i]); - } + return i; } @@ -519,9 +519,9 @@ pci224_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, chan = CR_CHAN(insn->chanspec); - for (i = 0; i < insn->n; i++) { + for (i = 0; i < insn->n; i++) data[i] = devpriv->ao_readback[chan]; - } + return i; } @@ -544,9 +544,9 @@ static void pci224_ao_stop(struct comedi_device *dev, { unsigned long flags; - if (!test_and_clear_bit(AO_CMD_STARTED, &devpriv->state)) { + if (!test_and_clear_bit(AO_CMD_STARTED, &devpriv->state)) return; - } + spin_lock_irqsave(&devpriv->ao_spinlock, flags); /* Kill the interrupts. */ @@ -597,11 +597,11 @@ static void pci224_ao_start(struct comedi_device *dev, } else { /* Enable interrupts. */ spin_lock_irqsave(&devpriv->ao_spinlock, flags); - if (cmd->stop_src == TRIG_EXT) { + if (cmd->stop_src == TRIG_EXT) devpriv->intsce = PCI224_INTR_EXT | PCI224_INTR_DAC; - } else { + else devpriv->intsce = PCI224_INTR_DAC; - } + outb(devpriv->intsce, devpriv->iobase1 + PCI224_INT_SCE); spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); } @@ -630,9 +630,9 @@ static void pci224_ao_handle_fifo(struct comedi_device *dev, num_scans = comedi_buf_read_n_available(s->async) / bytes_per_scan; if (!devpriv->ao_stop_continuous) { /* Fixed number of scans. */ - if (num_scans > devpriv->ao_stop_count) { + if (num_scans > devpriv->ao_stop_count) num_scans = devpriv->ao_stop_count; - } + } /* Determine how much room is in the FIFO (in samples). */ @@ -669,13 +669,13 @@ static void pci224_ao_handle_fifo(struct comedi_device *dev, } } /* Determine how many new scans can be put in the FIFO. */ - if (cmd->chanlist_len) { + if (cmd->chanlist_len) room /= cmd->chanlist_len; - } + /* Determine how many scans to process. */ - if (num_scans > room) { + if (num_scans > room) num_scans = room; - } + /* Process scans. */ for (n = 0; n < num_scans; n++) { cfc_read_array_from_buffer(s, &devpriv->ao_scan_vals[0], @@ -718,19 +718,19 @@ static void pci224_ao_handle_fifo(struct comedi_device *dev, trig = PCI224_DACCON_TRIG_Z2CT0; } else { /* cmd->scan_begin_src == TRIG_EXT */ - if (cmd->scan_begin_arg & CR_INVERT) { + if (cmd->scan_begin_arg & CR_INVERT) trig = PCI224_DACCON_TRIG_EXTN; - } else { + else trig = PCI224_DACCON_TRIG_EXTP; - } + } devpriv->daccon = COMBINE(devpriv->daccon, trig, PCI224_DACCON_TRIG_MASK); outw(devpriv->daccon, dev->iobase + PCI224_DACCON); } - if (s->async->events) { + if (s->async->events) comedi_event(dev, s); - } + } /* @@ -855,9 +855,9 @@ pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, err++; } tmp = cmd->chanlist_len * CONVERT_PERIOD; - if (tmp < MIN_SCAN_PERIOD) { + if (tmp < MIN_SCAN_PERIOD) tmp = MIN_SCAN_PERIOD; - } + if (cmd->scan_begin_arg < tmp) { cmd->scan_begin_arg = tmp; err++; @@ -966,9 +966,9 @@ pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, devpriv->cached_div1 = div1; devpriv->cached_div2 = div2; } - if (tmp != cmd->scan_begin_arg) { + if (tmp != cmd->scan_begin_arg) err++; - } + } if (err) @@ -994,13 +994,13 @@ pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, tmp = 0; for (n = 0; n < cmd->chanlist_len; n++) { ch = CR_CHAN(cmd->chanlist[n]); - if (tmp & (1U << ch)) { + if (tmp & (1U << ch)) errors |= dupchan_err; - } + tmp |= (1U << ch); - if (CR_RANGE(cmd->chanlist[n]) != range) { + if (CR_RANGE(cmd->chanlist[n]) != range) errors |= range_err; - } + } if (errors) { if (errors & dupchan_err) { @@ -1038,9 +1038,9 @@ static int pci224_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) unsigned long flags; /* Cannot handle null/empty chanlist. */ - if (cmd->chanlist == NULL || cmd->chanlist_len == 0) { + if (cmd->chanlist == NULL || cmd->chanlist_len == 0) return -EINVAL; - } + /* Determine which channels are enabled and their load order. */ devpriv->ao_enab = 0; @@ -1050,9 +1050,9 @@ static int pci224_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ao_enab |= 1U << ch; rank = 0; for (j = 0; j < cmd->chanlist_len; j++) { - if (CR_CHAN(cmd->chanlist[j]) < ch) { + if (CR_CHAN(cmd->chanlist[j]) < ch) rank++; - } + } devpriv->ao_scan_order[rank] = i; } @@ -1221,9 +1221,9 @@ pci224_ao_munge(struct comedi_device *dev, struct comedi_subdevice *s, offset = 32768; } /* Munge the data. */ - for (i = 0; i < length; i++) { + for (i = 0; i < length; i++) array[i] = (array[i] << shift) - offset; - } + } /* @@ -1254,15 +1254,15 @@ static irqreturn_t pci224_interrupt(int irq, void *d) cmd = &s->async->cmd; if (valid_intstat & PCI224_INTR_EXT) { devpriv->intsce &= ~PCI224_INTR_EXT; - if (cmd->start_src == TRIG_EXT) { + if (cmd->start_src == TRIG_EXT) pci224_ao_start(dev, s); - } else if (cmd->stop_src == TRIG_EXT) { + else if (cmd->stop_src == TRIG_EXT) pci224_ao_stop(dev, s); - } + } - if (valid_intstat & PCI224_INTR_DAC) { + if (valid_intstat & PCI224_INTR_DAC) pci224_ao_handle_fifo(dev, s); - } + } /* Reenable interrupt sources. */ spin_lock_irqsave(&devpriv->ao_spinlock, flags); @@ -1381,23 +1381,23 @@ static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it) /* Allocate readback buffer for AO channels. */ devpriv->ao_readback = kmalloc(sizeof(devpriv->ao_readback[0]) * thisboard->ao_chans, GFP_KERNEL); - if (!devpriv->ao_readback) { + if (!devpriv->ao_readback) return -ENOMEM; - } + /* Allocate buffer to hold values for AO channel scan. */ devpriv->ao_scan_vals = kmalloc(sizeof(devpriv->ao_scan_vals[0]) * thisboard->ao_chans, GFP_KERNEL); - if (!devpriv->ao_scan_vals) { + if (!devpriv->ao_scan_vals) return -ENOMEM; - } + /* Allocate buffer to hold AO channel scan order. */ devpriv->ao_scan_order = kmalloc(sizeof(devpriv->ao_scan_order[0]) * thisboard->ao_chans, GFP_KERNEL); - if (!devpriv->ao_scan_order) { + if (!devpriv->ao_scan_order) return -ENOMEM; - } + /* Disable interrupt sources. */ devpriv->intsce = 0; @@ -1445,9 +1445,9 @@ static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it) s->range_table_list = range_table_list = kmalloc(sizeof(struct comedi_lrange *) * s->n_chan, GFP_KERNEL); - if (!s->range_table_list) { + if (!s->range_table_list) return -ENOMEM; - } + for (n = 2; n < 3 + s->n_chan; n++) { if (it->options[n] < 0 || it->options[n] > 1) { printk(KERN_WARNING "comedi%d: %s: warning! " @@ -1459,11 +1459,11 @@ static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it) for (n = 0; n < s->n_chan; n++) { if (n < COMEDI_NDEVCONFOPTS - 3 && it->options[3 + n] == 1) { - if (it->options[2] == 1) { + if (it->options[2] == 1) range_table_list[n] = &range_pci234_ext; - } else { + else range_table_list[n] = &range_bipolar5; - } + } else { if (it->options[2] == 1) { range_table_list[n] = @@ -1506,11 +1506,11 @@ static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it) printk(KERN_INFO "comedi%d: %s ", dev->minor, dev->board_name); printk("(pci %s) ", pci_name(pci_dev)); - if (irq) { + if (irq) printk("(irq %u%s) ", irq, (dev->irq ? "" : " UNAVAILABLE")); - } else { + else printk("(no irq) "); - } + printk("attached\n"); @@ -1529,9 +1529,9 @@ static int pci224_detach(struct comedi_device *dev) { printk(KERN_DEBUG "comedi%d: %s: detach\n", dev->minor, DRIVER_NAME); - if (dev->irq) { + if (dev->irq) free_irq(dev->irq, dev); - } + if (dev->subdevices) { struct comedi_subdevice *s; @@ -1544,9 +1544,9 @@ static int pci224_detach(struct comedi_device *dev) kfree(devpriv->ao_scan_vals); kfree(devpriv->ao_scan_order); if (devpriv->pci_dev) { - if (dev->iobase) { + if (dev->iobase) comedi_pci_disable(devpriv->pci_dev); - } + pci_dev_put(devpriv->pci_dev); } } diff --git a/drivers/staging/comedi/drivers/amplc_pci230.c b/drivers/staging/comedi/drivers/amplc_pci230.c index 091a1a5822a8..7fffd967d47e 100644 --- a/drivers/staging/comedi/drivers/amplc_pci230.c +++ b/drivers/staging/comedi/drivers/amplc_pci230.c @@ -669,9 +669,9 @@ static short pci230_ai_read(struct comedi_device *dev) /* If a bipolar range was specified, mangle it (twos * complement->straight binary). */ - if (devpriv->ai_bipolar) { + if (devpriv->ai_bipolar) data ^= 1 << (thisboard->ai_bits - 1); - } + return data; } @@ -680,9 +680,9 @@ static inline unsigned short pci230_ao_mangle_datum(struct comedi_device *dev, { /* If a bipolar range was specified, mangle it (straight binary->twos * complement). */ - if (devpriv->ao_bipolar) { + if (devpriv->ao_bipolar) datum ^= 1 << (thisboard->ao_bits - 1); - } + /* PCI230 is 12 bit - stored in upper bits of 16 bit register (lower * four bits reserved for expansion). */ @@ -734,9 +734,9 @@ static int pci230_attach(struct comedi_device *dev, struct comedi_devconfig *it) /* Allocate the private structure area using alloc_private(). * Macro defined in comedidev.h - memsets struct fields to 0. */ - if ((alloc_private(dev, sizeof(struct pci230_private))) < 0) { + if ((alloc_private(dev, sizeof(struct pci230_private))) < 0) return -ENOMEM; - } + spin_lock_init(&devpriv->isr_spinlock); spin_lock_init(&devpriv->res_spinlock); spin_lock_init(&devpriv->ai_stop_spinlock); @@ -991,9 +991,9 @@ static int pci230_detach(struct comedi_device *dev) if (devpriv) { if (devpriv->pci_dev) { - if (dev->iobase) { + if (dev->iobase) comedi_pci_disable(devpriv->pci_dev); - } + pci_dev_put(devpriv->pci_dev); } } @@ -1055,9 +1055,9 @@ static void put_resources(struct comedi_device *dev, unsigned int res_mask, && (res_mask != 0); b <<= 1, i++) { if ((res_mask & b) != 0) { res_mask &= ~b; - if (devpriv->res_owner[i] == owner) { + if (devpriv->res_owner[i] == owner) devpriv->res_owner[i] = OWNER_NONE; - } + } } spin_unlock_irqrestore(&devpriv->res_spinlock, irqflags); @@ -1132,11 +1132,11 @@ static int pci230_ai_rinsn(struct comedi_device *dev, } devpriv->adcg = (devpriv->adcg & ~(3 << gainshift)) | (pci230_ai_gain[range] << gainshift); - if (devpriv->ai_bipolar) { + if (devpriv->ai_bipolar) adccon |= PCI230_ADC_IR_BIP; - } else { + else adccon |= PCI230_ADC_IR_UNI; - } + /* Enable only this channel in the scan list - otherwise by default * we'll get one sample from each channel. */ @@ -1408,13 +1408,13 @@ static int pci230_ao_cmdtest(struct comedi_device *dev, chan = CR_CHAN(cmd->chanlist[n]); range = CR_RANGE(cmd->chanlist[n]); /* Channel numbers must strictly increase. */ - if (chan < prev_chan) { + if (chan < prev_chan) errors |= seq_err; - } + /* Ranges must be the same. */ - if (range != first_range) { + if (range != first_range) errors |= range_err; - } + prev_chan = chan; } if (errors != 0) { @@ -1583,9 +1583,9 @@ static int pci230_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) if (cmd->scan_begin_src == TRIG_TIMER) { /* Claim Z2-CT1. */ - if (!get_one_resource(dev, RES_Z2CT1, OWNER_AOCMD)) { + if (!get_one_resource(dev, RES_Z2CT1, OWNER_AOCMD)) return -EBUSY; - } + } /* Get number of scans required. */ @@ -1609,9 +1609,9 @@ static int pci230_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) unsigned int i; dacen = 0; - for (i = 0; i < cmd->chanlist_len; i++) { + for (i = 0; i < cmd->chanlist_len; i++) dacen |= 1 << CR_CHAN(cmd->chanlist[i]); - } + /* Set channel scan list. */ outw(dacen, dev->iobase + PCI230P2_DACEN); /* @@ -1656,9 +1656,9 @@ static int pci230_ai_check_scan_period(struct comedi_cmd *cmd) int err = 0; chanlist_len = cmd->chanlist_len; - if (cmd->chanlist_len == 0) { + if (cmd->chanlist_len == 0) chanlist_len = 1; - } + min_scan_period = chanlist_len * cmd->convert_arg; if ((min_scan_period < chanlist_len) || (min_scan_period < cmd->convert_arg)) { @@ -1777,11 +1777,11 @@ static int pci230_ai_cmdtest(struct comedi_device *dev, * single-ended or pseudo-differential. */ if (cmd->chanlist && (cmd->chanlist_len > 0)) { /* Peek analogue reference of first channel. */ - if (CR_AREF(cmd->chanlist[0]) == AREF_DIFF) { + if (CR_AREF(cmd->chanlist[0]) == AREF_DIFF) max_speed_ai = MAX_SPEED_AI_DIFF; - } else { + else max_speed_ai = MAX_SPEED_AI_SE; - } + } else { /* No channel list. Assume single-ended. */ max_speed_ai = MAX_SPEED_AI_SE; @@ -1871,9 +1871,9 @@ static int pci230_ai_cmdtest(struct comedi_device *dev, } } else if (cmd->scan_begin_src == TRIG_TIMER) { /* N.B. cmd->convert_arg is also TRIG_TIMER */ - if (!pci230_ai_check_scan_period(cmd)) { + if (!pci230_ai_check_scan_period(cmd)) err++; - } + } else { if (cmd->scan_begin_arg != 0) { cmd->scan_begin_arg = 0; @@ -1961,13 +1961,13 @@ static int pci230_ai_cmdtest(struct comedi_device *dev, errors |= seq_err; } /* Channels must have same AREF. */ - if (aref != prev_aref) { + if (aref != prev_aref) errors |= aref_err; - } + /* Channel ranges must have same polarity. */ - if (polarity != prev_polarity) { + if (polarity != prev_polarity) errors |= polarity_err; - } + /* Single-ended channel pairs must have same * range. */ if ((aref != AREF_DIFF) @@ -1987,9 +1987,9 @@ static int pci230_ai_cmdtest(struct comedi_device *dev, } /* If channel list is a repeating subsequence, need a whole * number of repeats. */ - if ((n % subseq_len) != 0) { + if ((n % subseq_len) != 0) errors |= seq_err; - } + if ((devpriv->hwver > 0) && (devpriv->hwver < 4)) { /* * Buggy PCI230+ or PCI260+ requires channel 0 to be @@ -2228,9 +2228,9 @@ static void pci230_ai_start(struct comedi_device *dev, devpriv->adccon = (devpriv->adccon & ~PCI230_ADC_TRIG_MASK) | conv; outw(devpriv->adccon, dev->iobase + PCI230_ADCCON); - if (cmd->convert_src == TRIG_INT) { + if (cmd->convert_src == TRIG_INT) async->inttrig = pci230_ai_inttrig_convert; - } + /* Update FIFO interrupt trigger level, which is currently * set to "full". */ pci230_ai_update_fifo_trigger_level(dev, s); @@ -2345,9 +2345,9 @@ static int pci230_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) } } /* Claim resources. */ - if (!get_resources(dev, res_mask, OWNER_AICMD)) { + if (!get_resources(dev, res_mask, OWNER_AICMD)) return -EBUSY; - } + /* Get number of scans required. */ if (cmd->stop_src == TRIG_COUNT) { @@ -2392,11 +2392,11 @@ static int pci230_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) range = CR_RANGE(cmd->chanlist[0]); devpriv->ai_bipolar = pci230_ai_bipolar[range]; - if (devpriv->ai_bipolar) { + if (devpriv->ai_bipolar) adccon |= PCI230_ADC_IR_BIP; - } else { + else adccon |= PCI230_ADC_IR_UNI; - } + for (i = 0; i < cmd->chanlist_len; i++) { unsigned int gainshift; @@ -2543,9 +2543,9 @@ static unsigned int pci230_choose_clk_count(uint64_t ns, unsigned int *count, for (clk_src = CLK_10MHZ;; clk_src++) { cnt = divide_ns(ns, pci230_timebase[clk_src], round_mode); - if ((cnt <= 65536) || (clk_src == CLK_1KHZ)) { + if ((cnt <= 65536) || (clk_src == CLK_1KHZ)) break; - } + } *count = cnt; return clk_src; @@ -2575,9 +2575,9 @@ static void pci230_ct_setup_ns_mode(struct comedi_device *dev, unsigned int ct, /* Program clock source. */ outb(CLK_CONFIG(ct, clk_src), devpriv->iobase1 + PCI230_ZCLK_SCE); /* Set initial count. */ - if (count >= 65536) { + if (count >= 65536) count = 0; - } + i8254_write(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, ct, count); } @@ -2599,9 +2599,9 @@ static irqreturn_t pci230_interrupt(int irq, void *d) /* Read interrupt status/enable register. */ status_int = inb(devpriv->iobase1 + PCI230_INT_STAT); - if (status_int == PCI230_INT_DISABLE) { + if (status_int == PCI230_INT_DISABLE) return IRQ_NONE; - } + spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); valid_status_int = devpriv->int_en & status_int; @@ -2660,9 +2660,9 @@ static void pci230_handle_ao_nofifo(struct comedi_device *dev, struct comedi_async *async = s->async; struct comedi_cmd *cmd = &async->cmd; - if (!devpriv->ao_continuous && (devpriv->ao_scan_count == 0)) { + if (!devpriv->ao_continuous && (devpriv->ao_scan_count == 0)) return; - } + for (i = 0; i < cmd->chanlist_len; i++) { /* Read sample from Comedi's circular buffer. */ @@ -2711,9 +2711,9 @@ static int pci230_handle_ao_fifo(struct comedi_device *dev, num_scans = comedi_buf_read_n_available(async) / bytes_per_scan; if (!devpriv->ao_continuous) { /* Fixed number of scans. */ - if (num_scans > devpriv->ao_scan_count) { + if (num_scans > devpriv->ao_scan_count) num_scans = devpriv->ao_scan_count; - } + if (devpriv->ao_scan_count == 0) { /* End of acquisition. */ events |= COMEDI_CB_EOA; @@ -2736,21 +2736,21 @@ static int pci230_handle_ao_fifo(struct comedi_device *dev, } if (events == 0) { /* Determine how much room is in the FIFO (in samples). */ - if ((dacstat & PCI230P2_DAC_FIFO_FULL) != 0) { + if ((dacstat & PCI230P2_DAC_FIFO_FULL) != 0) room = PCI230P2_DAC_FIFOROOM_FULL; - } else if ((dacstat & PCI230P2_DAC_FIFO_HALF) != 0) { + else if ((dacstat & PCI230P2_DAC_FIFO_HALF) != 0) room = PCI230P2_DAC_FIFOROOM_HALFTOFULL; - } else if ((dacstat & PCI230P2_DAC_FIFO_EMPTY) != 0) { + else if ((dacstat & PCI230P2_DAC_FIFO_EMPTY) != 0) room = PCI230P2_DAC_FIFOROOM_EMPTY; - } else { + else room = PCI230P2_DAC_FIFOROOM_ONETOHALF; - } + /* Convert room to number of scans that can be added. */ room /= cmd->chanlist_len; /* Determine number of scans to process. */ - if (num_scans > room) { + if (num_scans > room) num_scans = room; - } + /* Process scans. */ for (n = 0; n < num_scans; n++) { for (i = 0; i < cmd->chanlist_len; i++) { @@ -2817,14 +2817,14 @@ static void pci230_handle_ai(struct comedi_device *dev, } else { todo = (devpriv->ai_scan_count * scanlen) - devpriv->ai_scan_pos; - if (todo > PCI230_ADC_FIFOLEVEL_HALFFULL) { + if (todo > PCI230_ADC_FIFOLEVEL_HALFFULL) todo = PCI230_ADC_FIFOLEVEL_HALFFULL; - } + } - if (todo == 0) { + if (todo == 0) return; - } + fifoamount = 0; for (i = 0; i < todo; i++) { @@ -2906,9 +2906,9 @@ static void pci230_ao_stop(struct comedi_device *dev, spin_lock_irqsave(&devpriv->ao_stop_spinlock, irqflags); started = test_and_clear_bit(AO_CMD_STARTED, &devpriv->state); spin_unlock_irqrestore(&devpriv->ao_stop_spinlock, irqflags); - if (!started) { + if (!started) return; - } + cmd = &s->async->cmd; if (cmd->scan_begin_src == TRIG_TIMER) { @@ -2968,9 +2968,9 @@ static void pci230_ai_stop(struct comedi_device *dev, spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags); started = test_and_clear_bit(AI_CMD_STARTED, &devpriv->state); spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags); - if (!started) { + if (!started) return; - } + cmd = &s->async->cmd; if (cmd->convert_src == TRIG_TIMER) { diff --git a/drivers/staging/comedi/drivers/cb_das16_cs.c b/drivers/staging/comedi/drivers/cb_das16_cs.c index e0352c6cf82d..638e5cec897d 100644 --- a/drivers/staging/comedi/drivers/cb_das16_cs.c +++ b/drivers/staging/comedi/drivers/cb_das16_cs.c @@ -175,16 +175,16 @@ static int das16cs_attach(struct comedi_device *dev, printk("I/O base=0x%04lx ", dev->iobase); printk("fingerprint:\n"); - for (i = 0; i < 48; i += 2) { + for (i = 0; i < 48; i += 2) printk("%04x ", inw(dev->iobase + i)); - } + printk("\n"); ret = request_irq(link->irq, das16cs_interrupt, IRQF_SHARED, "cb_das16_cs", dev); - if (ret < 0) { + if (ret < 0) return ret; - } + dev->irq = link->irq; printk("irq=%u ", dev->irq); @@ -262,9 +262,9 @@ static int das16cs_detach(struct comedi_device *dev) { printk("comedi%d: das16cs: remove\n", dev->minor); - if (dev->irq) { + if (dev->irq) free_irq(dev->irq, dev); - } + return 0; } diff --git a/drivers/staging/comedi/drivers/cb_pcidas64.c b/drivers/staging/comedi/drivers/cb_pcidas64.c index 82295e0f07f9..f17cb09acb28 100644 --- a/drivers/staging/comedi/drivers/cb_pcidas64.c +++ b/drivers/staging/comedi/drivers/cb_pcidas64.c @@ -1621,9 +1621,9 @@ int alloc_and_init_dma_members(struct comedi_device *dev) priv(dev)->ai_buffer[i] = pci_alloc_consistent(priv(dev)->hw_dev, DMA_BUFFER_SIZE, &priv(dev)->ai_buffer_bus_addr[i]); - if (priv(dev)->ai_buffer[i] == NULL) { + if (priv(dev)->ai_buffer[i] == NULL) return -ENOMEM; - } + } for (i = 0; i < AO_DMA_RING_COUNT; i++) { if (ao_cmd_is_supported(board(dev))) { @@ -1632,9 +1632,9 @@ int alloc_and_init_dma_members(struct comedi_device *dev) DMA_BUFFER_SIZE, &priv(dev)-> ao_buffer_bus_addr[i]); - if (priv(dev)->ao_buffer[i] == NULL) { + if (priv(dev)->ao_buffer[i] == NULL) return -ENOMEM; - } + } } /* allocate dma descriptors */ @@ -1643,9 +1643,9 @@ int alloc_and_init_dma_members(struct comedi_device *dev) sizeof(struct plx_dma_desc) * ai_dma_ring_count(board(dev)), &priv(dev)->ai_dma_desc_bus_addr); - if (priv(dev)->ai_dma_desc == NULL) { + if (priv(dev)->ai_dma_desc == NULL) return -ENOMEM; - } + DEBUG_PRINT("ai dma descriptors start at bus addr 0x%x\n", priv(dev)->ai_dma_desc_bus_addr); if (ao_cmd_is_supported(board(dev))) { @@ -1654,9 +1654,9 @@ int alloc_and_init_dma_members(struct comedi_device *dev) sizeof(struct plx_dma_desc) * AO_DMA_RING_COUNT, &priv(dev)->ao_dma_desc_bus_addr); - if (priv(dev)->ao_dma_desc == NULL) { + if (priv(dev)->ao_dma_desc == NULL) return -ENOMEM; - } + DEBUG_PRINT("ao dma descriptors start at bus addr 0x%x\n", priv(dev)->ao_dma_desc_bus_addr); } @@ -1848,9 +1848,9 @@ static int attach(struct comedi_device *dev, struct comedi_devconfig *it) printk(" irq %u\n", dev->irq); retval = setup_subdevices(dev); - if (retval < 0) { + if (retval < 0) return retval; - } + return 0; } @@ -1919,9 +1919,9 @@ static int detach(struct comedi_device *dev) priv(dev)->ao_dma_desc, priv(dev)-> ao_dma_desc_bus_addr); - if (priv(dev)->main_phys_iobase) { + if (priv(dev)->main_phys_iobase) comedi_pci_disable(priv(dev)->hw_dev); - } + pci_dev_put(priv(dev)->hw_dev); } } @@ -2902,9 +2902,9 @@ static void pio_drain_ai_fifo_16(struct comedi_device *dev) if (cmd->stop_src == TRIG_COUNT) { if (priv(dev)->ai_count == 0) break; - if (num_samples > priv(dev)->ai_count) { + if (num_samples > priv(dev)->ai_count) num_samples = priv(dev)->ai_count; - } + priv(dev)->ai_count -= num_samples; } @@ -2943,9 +2943,9 @@ static void pio_drain_ai_fifo_32(struct comedi_device *dev) readw(priv(dev)->main_iobase + ADC_READ_PNTR_REG) & 0x7fff; if (cmd->stop_src == TRIG_COUNT) { - if (max_transfer > priv(dev)->ai_count) { + if (max_transfer > priv(dev)->ai_count) max_transfer = priv(dev)->ai_count; - } + } for (i = 0; read_code != write_code && i < max_transfer;) { fifo_data = readl(priv(dev)->dio_counter_iobase + ADC_FIFO_REG); @@ -2964,9 +2964,9 @@ static void pio_drain_ai_fifo_32(struct comedi_device *dev) /* empty fifo */ static void pio_drain_ai_fifo(struct comedi_device *dev) { - if (board(dev)->layout == LAYOUT_4020) { + if (board(dev)->layout == LAYOUT_4020) pio_drain_ai_fifo_32(dev); - } else + else pio_drain_ai_fifo_16(dev); } @@ -3038,9 +3038,9 @@ void handle_ai_interrupt(struct comedi_device *dev, unsigned short status, priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG); DEBUG_PRINT("dma1 status 0x%x\n", dma1_status); - if (dma1_status & PLX_DMA_EN_BIT) { + if (dma1_status & PLX_DMA_EN_BIT) drain_dma_buffers(dev, 1); - } + DEBUG_PRINT(" cleared dma ch1 interrupt\n"); } spin_unlock_irqrestore(&dev->spinlock, flags); diff --git a/drivers/staging/comedi/drivers/comedi_parport.c b/drivers/staging/comedi/drivers/comedi_parport.c index 043afe4439c7..fcd7721c5537 100644 --- a/drivers/staging/comedi/drivers/comedi_parport.c +++ b/drivers/staging/comedi/drivers/comedi_parport.c @@ -309,18 +309,18 @@ static int parport_attach(struct comedi_device *dev, iobase = it->options[0]; printk(KERN_INFO "comedi%d: parport: 0x%04lx ", dev->minor, iobase); if (!request_region(iobase, PARPORT_SIZE, "parport (comedi)")) { - printk("I/O port conflict\n"); + printk(KERN_ERR "I/O port conflict\n"); return -EIO; } dev->iobase = iobase; irq = it->options[1]; if (irq) { - printk(" irq=%u", irq); + printk(KERN_INFO " irq=%u", irq); ret = request_irq(irq, parport_interrupt, 0, "comedi_parport", dev); if (ret < 0) { - printk(" irq not available\n"); + printk(KERN_ERR " irq not available\n"); return -EINVAL; } dev->irq = irq; @@ -380,13 +380,13 @@ static int parport_attach(struct comedi_device *dev, devpriv->c_data = 0; outb(devpriv->c_data, dev->iobase + PARPORT_C); - printk("\n"); + printk(KERN_INFO "\n"); return 1; } static int parport_detach(struct comedi_device *dev) { - printk("comedi%d: parport: remove\n", dev->minor); + printk(KERN_INFO "comedi%d: parport: remove\n", dev->minor); if (dev->iobase) release_region(dev->iobase, PARPORT_SIZE); diff --git a/drivers/staging/comedi/drivers/das08.c b/drivers/staging/comedi/drivers/das08.c index f4258334532c..9cb144f7e70c 100644 --- a/drivers/staging/comedi/drivers/das08.c +++ b/drivers/staging/comedi/drivers/das08.c @@ -1,55 +1,55 @@ /* - comedi/drivers/das08.c - DAS08 driver - - COMEDI - Linux Control and Measurement Device Interface - Copyright (C) 2000 David A. Schleef <ds@schleef.org> - Copyright (C) 2001,2002,2003 Frank Mori Hess <fmhess@users.sourceforge.net> - Copyright (C) 2004 Salvador E. Tropea <set@users.sf.net> <set@ieee.org> - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - -***************************************************************** + * comedi/drivers/das08.c + * DAS08 driver + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2000 David A. Schleef <ds@schleef.org> + * Copyright (C) 2001,2002,2003 Frank Mori Hess <fmhess@users.sourceforge.net> + * Copyright (C) 2004 Salvador E. Tropea <set@users.sf.net> <set@ieee.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + ***************************************************************** + */ -*/ /* -Driver: das08 -Description: DAS-08 compatible boards -Author: Warren Jasper, ds, Frank Hess -Devices: [Keithley Metrabyte] DAS08 (isa-das08), [ComputerBoards] DAS08 (isa-das08), - DAS08-PGM (das08-pgm), - DAS08-PGH (das08-pgh), DAS08-PGL (das08-pgl), DAS08-AOH (das08-aoh), - DAS08-AOL (das08-aol), DAS08-AOM (das08-aom), DAS08/JR-AO (das08/jr-ao), - DAS08/JR-16-AO (das08jr-16-ao), PCI-DAS08 (das08), - PC104-DAS08 (pc104-das08), DAS08/JR/16 (das08jr/16) -Status: works - -This is a rewrite of the das08 and das08jr drivers. - -Options (for ISA cards): - [0] - base io address - -Options (for pci-das08): - [0] - bus (optional) - [1] = slot (optional) - -The das08 driver doesn't support asynchronous commands, since -the cheap das08 hardware doesn't really support them. The -comedi_rt_timer driver can be used to emulate commands for this -driver. -*/ + * Driver: das08 + * Description: DAS-08 compatible boards + * Author: Warren Jasper, ds, Frank Hess + * Devices: [Keithley Metrabyte] DAS08 (isa-das08), + * [ComputerBoards] DAS08 (isa-das08), DAS08-PGM (das08-pgm), + * DAS08-PGH (das08-pgh), DAS08-PGL (das08-pgl), DAS08-AOH (das08-aoh), + * DAS08-AOL (das08-aol), DAS08-AOM (das08-aom), DAS08/JR-AO (das08/jr-ao), + * DAS08/JR-16-AO (das08jr-16-ao), PCI-DAS08 (das08), + * PC104-DAS08 (pc104-das08), DAS08/JR/16 (das08jr/16) + * Status: works + * + * This is a rewrite of the das08 and das08jr drivers. + * + * Options (for ISA cards): + * [0] - base io address + * + * Options (for pci-das08): + * [0] - bus (optional) + * [1] = slot (optional) + * + * The das08 driver doesn't support asynchronous commands, since + * the cheap das08 hardware doesn't really support them. The + * comedi_rt_timer driver can be used to emulate commands for this + * driver. + */ #include "../comedidev.h" @@ -122,8 +122,8 @@ driver. */ #define DAS08JR_DIO 3 -#define DAS08JR_AO_LSB(x) ((x)?6:4) -#define DAS08JR_AO_MSB(x) ((x)?7:5) +#define DAS08JR_AO_LSB(x) ((x) ? 6 : 4) +#define DAS08JR_AO_MSB(x) ((x) ? 7 : 5) /* cio-das08_aox.pdf @@ -148,8 +148,8 @@ driver. #define DAS08AO_GAIN_CONTROL 3 #define DAS08AO_GAIN_STATUS 3 -#define DAS08AO_AO_LSB(x) ((x)?0xa:8) -#define DAS08AO_AO_MSB(x) ((x)?0xb:9) +#define DAS08AO_AO_LSB(x) ((x) ? 0xa : 8) +#define DAS08AO_AO_MSB(x) ((x) ? 0xb : 9) #define DAS08AO_AO_UPDATE 8 /* gainlist same as _pgx_ below */ @@ -239,8 +239,9 @@ static const struct comedi_lrange *const das08_ai_lranges[] = { &range_das08_pgm, }; -static const int das08_pgh_gainlist[] = - { 8, 0, 10, 2, 12, 4, 14, 6, 1, 3, 5, 7 }; +static const int das08_pgh_gainlist[] = { + 8, 0, 10, 2, 12, 4, 14, 6, 1, 3, 5, 7 +}; static const int das08_pgl_gainlist[] = { 8, 0, 2, 4, 6, 1, 3, 5, 7 }; static const int das08_pgm_gainlist[] = { 8, 0, 10, 12, 14, 9, 11, 13, 15 }; @@ -535,7 +536,8 @@ static int das08_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, inb(dev->iobase + DAS08_MSB); /* set multiplexer */ - spin_lock(&dev->spinlock); /* lock to prevent race with digital output */ + /* lock to prevent race with digital output */ + spin_lock(&dev->spinlock); devpriv->do_mux_bits &= ~DAS08_MUX_MASK; devpriv->do_mux_bits |= DAS08_MUX(chan); outb(devpriv->do_mux_bits, dev->iobase + DAS08_CONTROL); @@ -552,7 +554,7 @@ static int das08_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, /* clear over-range bits for 16-bit boards */ if (thisboard->ai_nbits == 16) if (inb(dev->iobase + DAS08_MSB) & 0x80) - printk("das08: over-range\n"); + printk(KERN_INFO "das08: over-range\n"); /* trigger conversion */ outb_p(0, dev->iobase + DAS08_TRIG_12BIT); @@ -562,7 +564,7 @@ static int das08_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, break; } if (i == TIMEOUT) { - printk("das08: timeout\n"); + printk(KERN_ERR "das08: timeout\n"); return -ETIME; } msb = inb(dev->iobase + DAS08_MSB); @@ -607,7 +609,8 @@ static int das08_do_wbits(struct comedi_device *dev, struct comedi_subdevice *s, /* set new bit values */ wbits |= data[0] & data[1]; /* remember digital output bits */ - spin_lock(&dev->spinlock); /* prevent race with setting of analog input mux */ + /* prevent race with setting of analog input mux */ + spin_lock(&dev->spinlock); devpriv->do_mux_bits &= ~DAS08_DO_MASK; devpriv->do_mux_bits |= DAS08_OP(wbits); outb(devpriv->do_mux_bits, dev->iobase + DAS08_CONTROL); @@ -860,9 +863,9 @@ int das08_common_attach(struct comedi_device *dev, unsigned long iobase) /* allocate ioports for non-pcmcia, non-pci boards */ if ((thisboard->bustype != pcmcia) && (thisboard->bustype != pci)) { - printk(" iobase 0x%lx\n", iobase); + printk(KERN_INFO " iobase 0x%lx\n", iobase); if (!request_region(iobase, thisboard->iosize, DRV_NAME)) { - printk(" I/O port conflict\n"); + printk(KERN_ERR " I/O port conflict\n"); return -EIO; } } @@ -878,8 +881,11 @@ int das08_common_attach(struct comedi_device *dev, unsigned long iobase) /* ai */ if (thisboard->ai) { s->type = COMEDI_SUBD_AI; - /* XXX some boards actually have differential inputs instead of single ended. - * The driver does nothing with arefs though, so it's no big deal. */ + /* XXX some boards actually have differential + * inputs instead of single ended. + * The driver does nothing with arefs though, + * so it's no big deal. + */ s->subdev_flags = SDF_READABLE | SDF_GROUND; s->n_chan = 8; s->maxdata = (1 << thisboard->ai_nbits) - 1; @@ -966,6 +972,7 @@ int das08_common_attach(struct comedi_device *dev, unsigned long iobase) return 0; } +EXPORT_SYMBOL_GPL(das08_common_attach); static int das08_attach(struct comedi_device *dev, struct comedi_devconfig *it) { @@ -980,7 +987,7 @@ static int das08_attach(struct comedi_device *dev, struct comedi_devconfig *it) if (ret < 0) return ret; - printk("comedi%d: das08: ", dev->minor); + printk(KERN_INFO "comedi%d: das08: ", dev->minor); /* deal with a pci board */ if (thisboard->bustype == pci) { #ifdef CONFIG_COMEDI_PCI @@ -1007,20 +1014,21 @@ static int das08_attach(struct comedi_device *dev, struct comedi_devconfig *it) } } if (!pdev) { - printk("No pci das08 cards found\n"); + printk(KERN_ERR "No pci das08 cards found\n"); return -EIO; } devpriv->pdev = pdev; /* enable PCI device and reserve I/O spaces */ if (comedi_pci_enable(pdev, DRV_NAME)) { - printk - (" Error enabling PCI device and requesting regions\n"); + printk(KERN_ERR " Error enabling PCI device and " + "requesting regions\n"); return -EIO; } /* read base addresses */ pci_iobase = pci_resource_start(pdev, 1); iobase = pci_resource_start(pdev, 2); - printk("pcibase 0x%lx iobase 0x%lx\n", pci_iobase, iobase); + printk(KERN_INFO "pcibase 0x%lx iobase 0x%lx\n", + pci_iobase, iobase); devpriv->pci_iobase = pci_iobase; #if 0 /* We could enable to pci-das08's interrupt here to make it possible @@ -1034,17 +1042,18 @@ static int das08_attach(struct comedi_device *dev, struct comedi_devconfig *it) outw(INTR1_ENABLE | PCI_INTR_ENABLE, pci_iobase + INTCSR); #endif #else /* CONFIG_COMEDI_PCI */ - printk("this driver has not been built with PCI support.\n"); + printk(KERN_ERR "this driver has not been built with PCI support.\n"); return -EINVAL; #endif /* CONFIG_COMEDI_PCI */ } else { iobase = it->options[0]; } - printk("\n"); + printk(KERN_INFO "\n"); return das08_common_attach(dev, iobase); } + int das08_common_detach(struct comedi_device *dev) { printk(KERN_INFO "comedi%d: das08: remove\n", dev->minor); @@ -1060,9 +1069,9 @@ int das08_common_detach(struct comedi_device *dev) #ifdef CONFIG_COMEDI_PCI if (devpriv) { if (devpriv->pdev) { - if (devpriv->pci_iobase) { + if (devpriv->pci_iobase) comedi_pci_disable(devpriv->pdev); - } + pci_dev_put(devpriv->pdev); } } @@ -1070,6 +1079,7 @@ int das08_common_detach(struct comedi_device *dev) return 0; } +EXPORT_SYMBOL_GPL(das08_common_detach); #ifdef CONFIG_COMEDI_PCI COMEDI_PCI_INITCLEANUP(driver_das08, das08_pci_table); @@ -1077,8 +1087,6 @@ COMEDI_PCI_INITCLEANUP(driver_das08, das08_pci_table); COMEDI_INITCLEANUP(driver_das08); #endif -EXPORT_SYMBOL_GPL(das08_common_attach); -EXPORT_SYMBOL_GPL(das08_common_detach); #ifdef CONFIG_COMEDI_PCMCIA EXPORT_SYMBOL_GPL(das08_cs_boards); #endif diff --git a/drivers/staging/comedi/drivers/das16.c b/drivers/staging/comedi/drivers/das16.c index f2aadda9b241..ccee4f1802d6 100644 --- a/drivers/staging/comedi/drivers/das16.c +++ b/drivers/staging/comedi/drivers/das16.c @@ -74,7 +74,8 @@ Keithley Manuals: 4922.PDF (das-1400) 4923.PDF (das1200, 1400, 1600) -Computer boards manuals also available from their website www.measurementcomputing.com +Computer boards manuals also available from their website +www.measurementcomputing.com */ @@ -92,7 +93,8 @@ Computer boards manuals also available from their website www.measurementcomputi /* #define DEBUG */ #ifdef DEBUG -#define DEBUG_PRINT(format, args...) printk("das16: " format, ## args) +#define DEBUG_PRINT(format, args...) \ + printk(KERN_DEBUG "das16: " format, ## args) #else #define DEBUG_PRINT(format, args...) #endif @@ -186,15 +188,16 @@ Computer boards manuals also available from their website www.measurementcomputi */ -static const int sample_size = 2; /* size in bytes of a sample from board */ +/* size in bytes of a sample from board */ +static const int sample_size = 2; #define DAS16_TRIG 0 #define DAS16_AI_LSB 0 #define DAS16_AI_MSB 1 #define DAS16_MUX 2 #define DAS16_DIO 3 -#define DAS16_AO_LSB(x) ((x)?6:4) -#define DAS16_AO_MSB(x) ((x)?7:5) +#define DAS16_AO_LSB(x) ((x) ? 6 : 4) +#define DAS16_AO_MSB(x) ((x) ? 7 : 5) #define DAS16_STATUS 8 #define BUSY (1<<7) #define UNIPOLAR (1<<6) @@ -271,7 +274,7 @@ static const struct comedi_lrange range_das1x02_unip = { 4, { }; static const struct comedi_lrange range_das16jr = { 9, { - /* also used by 16/330 */ + /* also used by 16/330 */ BIP_RANGE(10), BIP_RANGE(5), BIP_RANGE(2.5), @@ -547,7 +550,8 @@ static const struct das16_board das16_boards[] = { .id = 0x20, }, { - .name = "das-1401", /* 4919.pdf and 4922.pdf (keithley user's manual) */ + /* 4919.pdf and 4922.pdf (keithley user's manual) */ + .name = "das-1401", .ai = das16_ai_rinsn, .ai_nbits = 12, .ai_speed = 10000, @@ -558,10 +562,11 @@ static const struct das16_board das16_boards[] = { .i8255_offset = 0x0, .i8254_offset = 0x0c, .size = 0x408, - .id = 0xc0 /* 4919.pdf says id bits are 0xe0, 4922.pdf says 0xc0 */ + .id = 0xc0 /* 4919.pdf says id bits are 0xe0, 4922.pdf says 0xc0 */ }, { - .name = "das-1402", /* 4919.pdf and 4922.pdf (keithley user's manual) */ + /* 4919.pdf and 4922.pdf (keithley user's manual) */ + .name = "das-1402", .ai = das16_ai_rinsn, .ai_nbits = 12, .ai_speed = 10000, @@ -572,7 +577,7 @@ static const struct das16_board das16_boards[] = { .i8255_offset = 0x0, .i8254_offset = 0x0c, .size = 0x408, - .id = 0xc0 /* 4919.pdf says id bits are 0xe0, 4922.pdf says 0xc0 */ + .id = 0xc0 /* 4919.pdf says id bits are 0xe0, 4922.pdf says 0xc0 */ }, { .name = "das-1601", /* 4919.pdf */ @@ -704,7 +709,8 @@ static const struct das16_board das16_boards[] = { .name = "das16/jr/ctr5", /* ? */ }, { - .name = "cio-das16/m1/16", /* cio-das16_m1_16.pdf, this board is a bit quirky, no dma */ + /* cio-das16_m1_16.pdf, this board is a bit quirky, no dma */ + .name = "cio-das16/m1/16", }, #endif }; @@ -736,14 +742,19 @@ struct das16_private_struct { unsigned int clockbase; /* master clock speed in ns */ volatile unsigned int control_state; /* dma, interrupt and trigger control bits */ volatile unsigned long adc_byte_count; /* number of bytes remaining */ - unsigned int divisor1; /* divisor dividing master clock to get conversion frequency */ - unsigned int divisor2; /* divisor dividing master clock to get conversion frequency */ + /* divisor dividing master clock to get conversion frequency */ + unsigned int divisor1; + /* divisor dividing master clock to get conversion frequency */ + unsigned int divisor2; unsigned int dma_chan; /* dma channel */ uint16_t *dma_buffer[2]; dma_addr_t dma_buffer_addr[2]; unsigned int current_buffer; volatile unsigned int dma_transfer_size; /* target number of bytes to transfer per dma shot */ - /* user-defined analog input and output ranges defined from config options */ + /** + * user-defined analog input and output ranges + * defined from config options + */ struct comedi_lrange *user_ai_range_table; struct comedi_lrange *user_ao_range_table; @@ -798,7 +809,10 @@ static int das16_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s, if (err) return 1; - /* step 2: make sure trigger sources are unique and mutually compatible */ + /** + * step 2: make sure trigger sources are unique and + * mutually compatible + */ if (cmd->scan_begin_src != TRIG_TIMER && cmd->scan_begin_src != TRIG_EXT && cmd->scan_begin_src != TRIG_FOLLOW) @@ -893,12 +907,15 @@ static int das16_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s, if (CR_CHAN(cmd->chanlist[i]) != (start_chan + i) % s->n_chan) { comedi_error(dev, - "entries in chanlist must be consecutive channels, counting upwards\n"); + "entries in chanlist must be " + "consecutive channels, " + "counting upwards\n"); err++; } if (CR_RANGE(cmd->chanlist[i]) != gain) { comedi_error(dev, - "entries in chanlist must all have the same gain\n"); + "entries in chanlist must all " + "have the same gain\n"); err++; } } @@ -920,12 +937,13 @@ static int das16_cmd_exec(struct comedi_device *dev, struct comedi_subdevice *s) if (devpriv->dma_chan == 0 || (dev->irq == 0 && devpriv->timer_mode == 0)) { comedi_error(dev, - "irq (or use of 'timer mode') dma required to execute comedi_cmd"); + "irq (or use of 'timer mode') dma required to " + "execute comedi_cmd"); return -1; } if (cmd->flags & TRIG_RT) { - comedi_error(dev, - "isa dma transfers cannot be performed with TRIG_RT, aborting"); + comedi_error(dev, "isa dma transfers cannot be performed with " + "TRIG_RT, aborting"); return -1; } @@ -933,16 +951,17 @@ static int das16_cmd_exec(struct comedi_device *dev, struct comedi_subdevice *s) cmd->stop_arg * cmd->chanlist_len * sizeof(uint16_t); /* disable conversions for das1600 mode */ - if (thisboard->size > 0x400) { + if (thisboard->size > 0x400) outb(DAS1600_CONV_DISABLE, dev->iobase + DAS1600_CONV); - } + /* set scan limits */ byte = CR_CHAN(cmd->chanlist[0]); byte |= CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]) << 4; outb(byte, dev->iobase + DAS16_MUX); /* set gain (this is also burst rate register but according to - * computer boards manual, burst rate does nothing, even on keithley cards) */ + * computer boards manual, burst rate does nothing, even on + * keithley cards) */ if (thisboard->ai_pg != das16_pg_none) { range = CR_RANGE(cmd->chanlist[0]); outb((das16_gainlists[thisboard->ai_pg])[range], @@ -1005,9 +1024,9 @@ static int das16_cmd_exec(struct comedi_device *dev, struct comedi_subdevice *s) outb(devpriv->control_state, dev->iobase + DAS16_CONTROL); /* Enable conversions if using das1600 mode */ - if (thisboard->size > 0x400) { + if (thisboard->size > 0x400) outb(0, dev->iobase + DAS1600_CONV); - } + return 0; } @@ -1030,9 +1049,9 @@ static int das16_cancel(struct comedi_device *dev, struct comedi_subdevice *s) } /* disable burst mode */ - if (thisboard->size > 0x400) { + if (thisboard->size > 0x400) outb(0, dev->iobase + DAS1600_BURST); - } + spin_unlock_irqrestore(&dev->spinlock, flags); @@ -1085,11 +1104,11 @@ static int das16_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, } msb = inb(dev->iobase + DAS16_AI_MSB); lsb = inb(dev->iobase + DAS16_AI_LSB); - if (thisboard->ai_nbits == 12) { + if (thisboard->ai_nbits == 12) data[n] = ((lsb >> 4) & 0xf) | (msb << 4); - } else { + else data[n] = lsb | (msb << 8); - } + } return n; @@ -1207,8 +1226,8 @@ static int disable_dma_on_even(struct comedi_device *dev) residue = get_dma_residue(devpriv->dma_chan); } if (i == disable_limit) { - comedi_error(dev, - "failed to get an even dma transfer, could be trouble."); + comedi_error(dev, "failed to get an even dma transfer, " + "could be trouble."); } return residue; } @@ -1254,7 +1273,8 @@ static void das16_interrupt(struct comedi_device *dev) } else num_bytes = devpriv->dma_transfer_size - residue; - if (cmd->stop_src == TRIG_COUNT && num_bytes >= devpriv->adc_byte_count) { + if (cmd->stop_src == TRIG_COUNT && + num_bytes >= devpriv->adc_byte_count) { num_bytes = devpriv->adc_byte_count; async->events |= COMEDI_CB_EOA; } @@ -1275,9 +1295,9 @@ static void das16_interrupt(struct comedi_device *dev) set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size); enable_dma(devpriv->dma_chan); /* reenable conversions for das1600 mode, (stupid hardware) */ - if (thisboard->size > 0x400 && devpriv->timer_mode == 0) { + if (thisboard->size > 0x400 && devpriv->timer_mode == 0) outb(0x00, dev->iobase + DAS1600_CONV); - } + } release_dma_lock(dma_flags); @@ -1330,25 +1350,25 @@ static int das16_probe(struct comedi_device *dev, struct comedi_devconfig *it) status = inb(dev->iobase + DAS16_STATUS); - if ((status & UNIPOLAR)) { + if ((status & UNIPOLAR)) devpriv->ai_unipolar = 1; - } else { + else devpriv->ai_unipolar = 0; - } - if ((status & DAS16_MUXBIT)) { + + if ((status & DAS16_MUXBIT)) devpriv->ai_singleended = 1; - } else { + else devpriv->ai_singleended = 0; - } + /* diobits indicates boards */ diobits = inb(dev->iobase + DAS16_DIO) & 0xf0; - printk(" id bits are 0x%02x\n", diobits); + printk(KERN_INFO " id bits are 0x%02x\n", diobits); if (thisboard->id != diobits) { - printk(" requested board's id bits are 0x%x (ignore)\n", + printk(KERN_INFO " requested board's id bits are 0x%x (ignore)\n", thisboard->id); } @@ -1363,10 +1383,10 @@ static int das1600_mode_detect(struct comedi_device *dev) if (status & DAS1600_CLK_10MHZ) { devpriv->clockbase = 100; - printk(" 10MHz pacer clock\n"); + printk(KERN_INFO " 10MHz pacer clock\n"); } else { devpriv->clockbase = 1000; - printk(" 1MHz pacer clock\n"); + printk(KERN_INFO " 1MHz pacer clock\n"); } reg_dump(dev); @@ -1406,14 +1426,15 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it) if (timer_mode) irq = 0; - printk("comedi%d: das16:", dev->minor); + printk(KERN_INFO "comedi%d: das16:", dev->minor); /* check that clock setting is valid */ if (it->options[3]) { if (it->options[3] != 0 && it->options[3] != 1 && it->options[3] != 10) { printk - ("\n Invalid option. Master clock must be set to 1 or 10 (MHz)\n"); + ("\n Invalid option. Master clock must be set " + "to 1 or 10 (MHz)\n"); return -EINVAL; } } @@ -1425,23 +1446,23 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it) if (thisboard->size < 0x400) { printk(" 0x%04lx-0x%04lx\n", iobase, iobase + thisboard->size); if (!request_region(iobase, thisboard->size, "das16")) { - printk(" I/O port conflict\n"); + printk(KERN_ERR " I/O port conflict\n"); return -EIO; } } else { - printk(" 0x%04lx-0x%04lx 0x%04lx-0x%04lx\n", + printk(KERN_INFO " 0x%04lx-0x%04lx 0x%04lx-0x%04lx\n", iobase, iobase + 0x0f, iobase + 0x400, iobase + 0x400 + (thisboard->size & 0x3ff)); if (!request_region(iobase, 0x10, "das16")) { - printk(" I/O port conflict: 0x%04lx-0x%04lx\n", + printk(KERN_ERR " I/O port conflict: 0x%04lx-0x%04lx\n", iobase, iobase + 0x0f); return -EIO; } if (!request_region(iobase + 0x400, thisboard->size & 0x3ff, "das16")) { release_region(iobase, 0x10); - printk(" I/O port conflict: 0x%04lx-0x%04lx\n", + printk(KERN_ERR " I/O port conflict: 0x%04lx-0x%04lx\n", iobase + 0x400, iobase + 0x400 + (thisboard->size & 0x3ff)); return -EIO; @@ -1452,7 +1473,7 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it) /* probe id bits to make sure they are consistent */ if (das16_probe(dev, it)) { - printk(" id bits do not match selected board, aborting\n"); + printk(KERN_ERR " id bits do not match selected board, aborting\n"); return -EINVAL; } dev->board_name = thisboard->name; @@ -1474,7 +1495,7 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it) if (ret < 0) return ret; dev->irq = irq; - printk(" ( irq = %u )", irq); + printk(KERN_INFO " ( irq = %u )", irq); } else if (irq == 0) { printk(" ( no irq )"); } else { @@ -1488,16 +1509,15 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it) /* allocate dma buffers */ int i; for (i = 0; i < 2; i++) { - devpriv->dma_buffer[i] = pci_alloc_consistent(NULL, - DAS16_DMA_SIZE, - &devpriv-> - dma_buffer_addr - [i]); + devpriv->dma_buffer[i] = pci_alloc_consistent( + NULL, DAS16_DMA_SIZE, + &devpriv->dma_buffer_addr[i]); + if (devpriv->dma_buffer[i] == NULL) return -ENOMEM; } if (request_dma(dma_chan, "das16")) { - printk(" failed to allocate dma channel %i\n", + printk(KERN_ERR " failed to allocate dma channel %i\n", dma_chan); return -EINVAL; } @@ -1506,11 +1526,11 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it) disable_dma(devpriv->dma_chan); set_dma_mode(devpriv->dma_chan, DMA_MODE_READ); release_dma_lock(flags); - printk(" ( dma = %u)\n", dma_chan); + printk(KERN_INFO " ( dma = %u)\n", dma_chan); } else if (dma_chan == 0) { - printk(" ( no dma )\n"); + printk(KERN_INFO " ( no dma )\n"); } else { - printk(" invalid dma channel\n"); + printk(KERN_ERR " invalid dma channel\n"); return -EINVAL; } @@ -1569,7 +1589,7 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it) s->subdev_flags |= SDF_DIFF; } s->maxdata = (1 << thisboard->ai_nbits) - 1; - if (devpriv->user_ai_range_table) { /* user defined ai range */ + if (devpriv->user_ai_range_table) { /* user defined ai range */ s->range_table = devpriv->user_ai_range_table; } else if (devpriv->ai_unipolar) { s->range_table = das16_ai_uni_lranges[thisboard->ai_pg]; @@ -1592,11 +1612,12 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it) s->subdev_flags = SDF_WRITABLE; s->n_chan = 2; s->maxdata = (1 << thisboard->ao_nbits) - 1; - if (devpriv->user_ao_range_table) { /* user defined ao range */ + /* user defined ao range */ + if (devpriv->user_ao_range_table) s->range_table = devpriv->user_ao_range_table; - } else { + else s->range_table = &range_unknown; - } + s->insn_write = thisboard->ao; } else { s->type = COMEDI_SUBD_UNUSED; @@ -1656,7 +1677,7 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it) static int das16_detach(struct comedi_device *dev) { - printk("comedi%d: das16: remove\n", dev->minor); + printk(KERN_INFO "comedi%d: das16: remove\n", dev->minor); das16_reset(dev); @@ -1750,8 +1771,8 @@ static void das16_ai_munge(struct comedi_device *dev, for (i = 0; i < num_samples; i++) { data[i] = le16_to_cpu(data[i]); - if (thisboard->ai_nbits == 12) { + if (thisboard->ai_nbits == 12) data[i] = (data[i] >> 4) & 0xfff; - } + } } diff --git a/drivers/staging/comedi/drivers/das1800.c b/drivers/staging/comedi/drivers/das1800.c index 3c3e0455c7c4..d91c2d9d595b 100644 --- a/drivers/staging/comedi/drivers/das1800.c +++ b/drivers/staging/comedi/drivers/das1800.c @@ -797,10 +797,8 @@ static int das1800_detach(struct comedi_device *dev) free_dma(devpriv->dma0); if (devpriv->dma1) free_dma(devpriv->dma1); - if (devpriv->ai_buf0) - kfree(devpriv->ai_buf0); - if (devpriv->ai_buf1) - kfree(devpriv->ai_buf1); + kfree(devpriv->ai_buf0); + kfree(devpriv->ai_buf1); } printk("comedi%d: %s: remove\n", dev->minor, diff --git a/drivers/staging/comedi/drivers/dt2801.c b/drivers/staging/comedi/drivers/dt2801.c index 3f365aee4822..83fb6e56c3e9 100644 --- a/drivers/staging/comedi/drivers/dt2801.c +++ b/drivers/staging/comedi/drivers/dt2801.c @@ -472,7 +472,7 @@ static const struct comedi_lrange *dac_range_table[] = { static const struct comedi_lrange *dac_range_lkup(int opt) { - if (opt < 0 || opt > 5) + if (opt < 0 || opt >= 5) return &range_unknown; return dac_range_table[opt]; } diff --git a/drivers/staging/comedi/drivers/dt2814.c b/drivers/staging/comedi/drivers/dt2814.c index e1b73752f607..16fde066d266 100644 --- a/drivers/staging/comedi/drivers/dt2814.c +++ b/drivers/staging/comedi/drivers/dt2814.c @@ -99,13 +99,13 @@ static int dt2814_ai_insn_read(struct comedi_device *dev, outb(chan, dev->iobase + DT2814_CSR); for (i = 0; i < DT2814_TIMEOUT; i++) { status = inb(dev->iobase + DT2814_CSR); - printk("dt2814: status: %02x\n", status); + printk(KERN_INFO "dt2814: status: %02x\n", status); udelay(10); if (status & DT2814_FINISH) break; } if (i >= DT2814_TIMEOUT) { - printk("dt2814: status: %02x\n", status); + printk(KERN_INFO "dt2814: status: %02x\n", status); return -ETIMEDOUT; } @@ -173,7 +173,8 @@ static int dt2814_ai_cmdtest(struct comedi_device *dev, if (err) return 1; - /* step 2: make sure trigger sources are unique and mutually compatible */ + /* step 2: make sure trigger sources are + * unique and mutually compatible */ /* note that mutual compatibility is not an issue here */ if (cmd->stop_src != TRIG_TIMER && cmd->stop_src != TRIG_EXT) @@ -256,9 +257,9 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it) unsigned long iobase; iobase = it->options[0]; - printk("comedi%d: dt2814: 0x%04lx ", dev->minor, iobase); + printk(KERN_INFO "comedi%d: dt2814: 0x%04lx ", dev->minor, iobase); if (!request_region(iobase, DT2814_SIZE, "dt2814")) { - printk("I/O port conflict\n"); + printk(KERN_ERR "I/O port conflict\n"); return -EIO; } dev->iobase = iobase; @@ -267,7 +268,7 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it) outb(0, dev->iobase + DT2814_CSR); udelay(100); if (inb(dev->iobase + DT2814_CSR) & DT2814_ERR) { - printk("reset error (fatal)\n"); + printk(KERN_ERR "reset error (fatal)\n"); return -EIO; } i = inb(dev->iobase + DT2814_DATA); @@ -286,9 +287,9 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it) irq = probe_irq_off(irqs); restore_flags(flags); - if (inb(dev->iobase + DT2814_CSR) & DT2814_ERR) { - printk("error probing irq (bad) \n"); - } + if (inb(dev->iobase + DT2814_CSR) & DT2814_ERR) + printk(KERN_DEBUG "error probing irq (bad)\n"); + i = inb(dev->iobase + DT2814_DATA); i = inb(dev->iobase + DT2814_DATA); @@ -297,18 +298,18 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it) dev->irq = 0; if (irq > 0) { if (request_irq(irq, dt2814_interrupt, 0, "dt2814", dev)) { - printk("(irq %d unavailable)\n", irq); + printk(KERN_WARNING "(irq %d unavailable)\n", irq); } else { - printk("( irq = %d )\n", irq); + printk(KERN_INFO "( irq = %d )\n", irq); dev->irq = irq; } } else if (irq == 0) { - printk("(no irq)\n"); + printk(KERN_WARNING "(no irq)\n"); } else { #if 0 - printk("(probe returned multiple irqs--bad)\n"); + printk(KERN_DEBUG "(probe returned multiple irqs--bad)\n"); #else - printk("(irq probe not implemented)\n"); + printk(KERN_WARNING "(irq probe not implemented)\n"); #endif } @@ -337,14 +338,13 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it) static int dt2814_detach(struct comedi_device *dev) { - printk("comedi%d: dt2814: remove\n", dev->minor); + printk(KERN_INFO "comedi%d: dt2814: remove\n", dev->minor); - if (dev->irq) { + if (dev->irq) free_irq(dev->irq, dev); - } - if (dev->iobase) { + + if (dev->iobase) release_region(dev->iobase, DT2814_SIZE); - } return 0; } diff --git a/drivers/staging/comedi/drivers/dt3000.c b/drivers/staging/comedi/drivers/dt3000.c index bbbef790c8f6..ca687890fc12 100644 --- a/drivers/staging/comedi/drivers/dt3000.c +++ b/drivers/staging/comedi/drivers/dt3000.c @@ -314,9 +314,8 @@ static int dt3k_send_cmd(struct comedi_device *dev, unsigned int cmd) break; udelay(1); } - if ((status & DT3000_COMPLETION_MASK) == DT3000_NOERROR) { + if ((status & DT3000_COMPLETION_MASK) == DT3000_NOERROR) return 0; - } printk("dt3k_send_cmd() timeout/error status=0x%04x\n", status); @@ -359,9 +358,8 @@ static irqreturn_t dt3k_interrupt(int irq, void *d) struct comedi_subdevice *s; unsigned int status; - if (!dev->attached) { + if (!dev->attached) return IRQ_NONE; - } s = dev->subdevices + 0; status = readw(devpriv->io_addr + DPR_Intr_Flag); @@ -374,9 +372,8 @@ static irqreturn_t dt3k_interrupt(int irq, void *d) s->async->events |= COMEDI_CB_BLOCK; } - if (status & (DT3000_ADSWERR | DT3000_ADHWERR)) { + if (status & (DT3000_ADSWERR | DT3000_ADHWERR)) s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; - } debug_n_ints++; if (debug_n_ints >= 10) { @@ -399,9 +396,8 @@ static void debug_intr_flags(unsigned int flags) int i; printk("dt3k: intr_flags:"); for (i = 0; i < 8; i++) { - if (flags & (1 << i)) { + if (flags & (1 << i)) printk(" %s", intr_flags[i]); - } } printk("\n"); } @@ -690,9 +686,8 @@ static int dt3k_ai_insn(struct comedi_device *dev, struct comedi_subdevice *s, /* XXX docs don't explain how to select aref */ aref = CR_AREF(insn->chanspec); - for (i = 0; i < insn->n; i++) { + for (i = 0; i < insn->n; i++) data[i] = dt3k_readsingle(dev, SUBS_AI, chan, gain); - } return i; } @@ -720,9 +715,8 @@ static int dt3k_ao_insn_read(struct comedi_device *dev, unsigned int chan; chan = CR_CHAN(insn->chanspec); - for (i = 0; i < insn->n; i++) { + for (i = 0; i < insn->n; i++) data[i] = devpriv->ao_readback[chan]; - } return i; } @@ -911,9 +905,8 @@ static int dt3000_detach(struct comedi_device *dev) if (devpriv) { if (devpriv->pci_dev) { - if (devpriv->phys_addr) { + if (devpriv->phys_addr) comedi_pci_disable(devpriv->pci_dev); - } pci_dev_put(devpriv->pci_dev); } if (devpriv->io_addr) diff --git a/drivers/staging/comedi/drivers/ni_at_ao.c b/drivers/staging/comedi/drivers/ni_at_ao.c index 3778565c1f6b..ce60224bb7bf 100644 --- a/drivers/staging/comedi/drivers/ni_at_ao.c +++ b/drivers/staging/comedi/drivers/ni_at_ao.c @@ -226,7 +226,7 @@ static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it) iobase = 0x1c0; ao_unipolar = it->options[3]; - printk("comedi%d: ni_at_ao: 0x%04lx", dev->minor, iobase); + printk(KERN_INFO "comedi%d: ni_at_ao: 0x%04lx", dev->minor, iobase); if (!request_region(iobase, ATAO_SIZE, "ni_at_ao")) { printk(" I/O port conflict\n"); @@ -283,14 +283,14 @@ static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it) atao_reset(dev); - printk("\n"); + printk(KERN_INFO "\n"); return 0; } static int atao_detach(struct comedi_device *dev) { - printk("comedi%d: atao: remove\n", dev->minor); + printk(KERN_INFO "comedi%d: atao: remove\n", dev->minor); if (dev->iobase) release_region(dev->iobase, ATAO_SIZE); diff --git a/drivers/staging/comedi/drivers/ni_daq_700.c b/drivers/staging/comedi/drivers/ni_daq_700.c index 072bc4b62011..c6d95650a1d4 100644 --- a/drivers/staging/comedi/drivers/ni_daq_700.c +++ b/drivers/staging/comedi/drivers/ni_daq_700.c @@ -145,6 +145,7 @@ void subdev_700_interrupt(struct comedi_device *dev, struct comedi_subdevice *s) comedi_event(dev, s); } +EXPORT_SYMBOL(subdev_700_interrupt); static int subdev_700_cb(int dir, int port, int data, unsigned long arg) { @@ -326,6 +327,7 @@ int subdev_700_init(struct comedi_device *dev, struct comedi_subdevice *s, return 0; } +EXPORT_SYMBOL(subdev_700_init); int subdev_700_init_irq(struct comedi_device *dev, struct comedi_subdevice *s, int (*cb) (int, int, int, unsigned long), @@ -345,6 +347,7 @@ int subdev_700_init_irq(struct comedi_device *dev, struct comedi_subdevice *s, return 0; } +EXPORT_SYMBOL(subdev_700_init_irq); void subdev_700_cleanup(struct comedi_device *dev, struct comedi_subdevice *s) { @@ -353,11 +356,7 @@ void subdev_700_cleanup(struct comedi_device *dev, struct comedi_subdevice *s) kfree(s->private); } - -EXPORT_SYMBOL(subdev_700_init); -EXPORT_SYMBOL(subdev_700_init_irq); EXPORT_SYMBOL(subdev_700_cleanup); -EXPORT_SYMBOL(subdev_700_interrupt); static int dio700_attach(struct comedi_device *dev, struct comedi_devconfig *it) { diff --git a/drivers/staging/comedi/drivers/ni_labpc.c b/drivers/staging/comedi/drivers/ni_labpc.c index 558e525fed37..9b840a96bafa 100644 --- a/drivers/staging/comedi/drivers/ni_labpc.c +++ b/drivers/staging/comedi/drivers/ni_labpc.c @@ -536,7 +536,7 @@ int labpc_common_attach(struct comedi_device *dev, unsigned long iobase, printk("\n"); if (iobase == 0) { - printk("io base address is zero!\n"); + printk(KERN_ERR "io base address is zero!\n"); return -EINVAL; } /* request io regions for isa boards */ diff --git a/drivers/staging/comedi/drivers/quatech_daqp_cs.c b/drivers/staging/comedi/drivers/quatech_daqp_cs.c index 92d7b72362b2..ab00846b3e0f 100644 --- a/drivers/staging/comedi/drivers/quatech_daqp_cs.c +++ b/drivers/staging/comedi/drivers/quatech_daqp_cs.c @@ -49,6 +49,7 @@ Devices: [Quatech] DAQP-208 (daqp), DAQP-308 #include "../comedidev.h" #include <linux/semaphore.h> +#include <linux/slab.h> #include <pcmcia/cs_types.h> #include <pcmcia/cs.h> diff --git a/drivers/staging/comedi/drivers/skel.c b/drivers/staging/comedi/drivers/skel.c index aba57d93dd3d..490753b3d904 100644 --- a/drivers/staging/comedi/drivers/skel.c +++ b/drivers/staging/comedi/drivers/skel.c @@ -131,7 +131,8 @@ MODULE_DEVICE_TABLE(pci, skel_pci_table); /* this structure is for data unique to this hardware driver. If several hardware drivers keep similar information in this structure, - feel free to suggest moving the variable to the struct comedi_device struct. */ + feel free to suggest moving the variable to the struct comedi_device struct. + */ struct skel_private { int data; @@ -211,7 +212,7 @@ static int skel_attach(struct comedi_device *dev, struct comedi_devconfig *it) { struct comedi_subdevice *s; - printk("comedi%d: skel: ", dev->minor); + pr_info("comedi%d: skel: ", dev->minor); /* * If you can probe the device to determine what device in a series @@ -282,7 +283,7 @@ static int skel_attach(struct comedi_device *dev, struct comedi_devconfig *it) s->type = COMEDI_SUBD_UNUSED; } - printk("attached\n"); + pr_info("attached\n"); return 0; } @@ -297,7 +298,7 @@ static int skel_attach(struct comedi_device *dev, struct comedi_devconfig *it) */ static int skel_detach(struct comedi_device *dev) { - printk("comedi%d: skel: remove\n", dev->minor); + pr_info("comedi%d: skel: remove\n", dev->minor); return 0; } @@ -336,7 +337,7 @@ static int skel_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, if (i == TIMEOUT) { /* printk() should be used instead of printk() * whenever the code can be called from real-time. */ - printk("timeout\n"); + pr_info("timeout\n"); return -ETIMEDOUT; } @@ -397,7 +398,8 @@ static int skel_ai_cmdtest(struct comedi_device *dev, if (err) return 1; - /* step 2: make sure trigger sources are unique and mutually compatible */ + /* step 2: make sure trigger sources are unique and mutually compatible + */ /* note that mutual compatibility is not an issue here */ if (cmd->scan_begin_src != TRIG_TIMER && @@ -529,7 +531,7 @@ static int skel_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, int i; int chan = CR_CHAN(insn->chanspec); - printk("skel_ao_winsn\n"); + pr_info("skel_ao_winsn\n"); /* Writing a list of values to an AO channel is probably not * very useful, but that's how the interface is defined. */ for (i = 0; i < insn->n; i++) { @@ -623,6 +625,7 @@ static int skel_dio_insn_config(struct comedi_device *dev, * as necessary. */ COMEDI_INITCLEANUP(driver_skel); -/* If you are writing a PCI driver you should use COMEDI_PCI_INITCLEANUP instead. -*/ +/* If you are writing a PCI driver you should use COMEDI_PCI_INITCLEANUP + * instead. + */ /* COMEDI_PCI_INITCLEANUP(driver_skel, skel_pci_table) */ diff --git a/drivers/staging/comedi/drivers/ssv_dnp.c b/drivers/staging/comedi/drivers/ssv_dnp.c index 17c92a57b0dd..18b0a83c4bbc 100644 --- a/drivers/staging/comedi/drivers/ssv_dnp.c +++ b/drivers/staging/comedi/drivers/ssv_dnp.c @@ -41,14 +41,14 @@ Status: unknown /* 0..3 remain unchanged! For details about Port C Mode Register see */ /* the remarks in dnp_insn_config() below. */ -#define CSCIR 0x22 /* Chip Setup and Control Index Register */ -#define CSCDR 0x23 /* Chip Setup and Control Data Register */ -#define PAMR 0xa5 /* Port A Mode Register */ -#define PADR 0xa9 /* Port A Data Register */ -#define PBMR 0xa4 /* Port B Mode Register */ -#define PBDR 0xa8 /* Port B Data Register */ -#define PCMR 0xa3 /* Port C Mode Register */ -#define PCDR 0xa7 /* Port C Data Register */ +#define CSCIR 0x22 /* Chip Setup and Control Index Register */ +#define CSCDR 0x23 /* Chip Setup and Control Data Register */ +#define PAMR 0xa5 /* Port A Mode Register */ +#define PADR 0xa9 /* Port A Data Register */ +#define PBMR 0xa4 /* Port B Mode Register */ +#define PBDR 0xa8 /* Port B Data Register */ +#define PCMR 0xa3 /* Port C Mode Register */ +#define PCDR 0xa7 /* Port C Data Register */ /* This data structure holds information about the supported boards -------- */ @@ -59,8 +59,9 @@ struct dnp_board { int have_dio; }; -static const struct dnp_board dnp_boards[] = { /* we only support one DNP 'board' */ - { /* variant at the moment */ +/* We only support one DNP 'board' variant at the moment */ +static const struct dnp_board dnp_boards[] = { +{ .name = "dnp-1486", .ai_chans = 16, .ai_bits = 12, @@ -80,9 +81,9 @@ struct dnp_private_data { #define devpriv ((dnp_private *)dev->private) /* ------------------------------------------------------------------------- */ -/* The struct comedi_driver structure tells the Comedi core module which functions */ -/* to call to configure/deconfigure (attach/detach) the board, and also */ -/* about the kernel module that contains the device code. */ +/* The struct comedi_driver structure tells the Comedi core module which */ +/* functions to call to configure/deconfigure (attach/detach) the board, and */ +/* also about the kernel module that contains the device code. */ /* */ /* In the following section we define the API of this driver. */ /* ------------------------------------------------------------------------- */ @@ -97,7 +98,7 @@ static struct comedi_driver driver_dnp = { .detach = dnp_detach, .board_name = &dnp_boards[0].name, /* only necessary for non-PnP devs */ - .offset = sizeof(struct dnp_board), /* like ISA-PnP, PCI or PCMCIA. */ + .offset = sizeof(struct dnp_board), /* like ISA-PnP, PCI or PCMCIA */ .num_names = ARRAY_SIZE(dnp_boards), }; @@ -122,28 +123,30 @@ static int dnp_attach(struct comedi_device *dev, struct comedi_devconfig *it) struct comedi_subdevice *s; - printk("comedi%d: dnp: ", dev->minor); + printk(KERN_INFO "comedi%d: dnp: ", dev->minor); - /* Autoprobing: this should find out which board we have. Currently only */ - /* the 1486 board is supported and autoprobing is not implemented :-) */ + /* Autoprobing: this should find out which board we have. Currently */ + /* only the 1486 board is supported and autoprobing is not */ + /* implemented :-) */ /* dev->board_ptr = dnp_probe(dev); */ - /* Initialize the name of the board. We can use the "thisboard" macro now. */ + /* Initialize the name of the board. */ + /* We can use the "thisboard" macro now. */ dev->board_name = thisboard->name; - /* Allocate the private structure area. alloc_private() is a convenient */ - /* macro defined in comedidev.h. */ + /* Allocate the private structure area. alloc_private() is a */ + /* convenient macro defined in comedidev.h. */ if (alloc_private(dev, sizeof(struct dnp_private_data)) < 0) return -ENOMEM; - /* Allocate the subdevice structures. alloc_subdevice() is a convenient */ - /* macro defined in comedidev.h. */ + /* Allocate the subdevice structures. alloc_subdevice() is a */ + /* convenient macro defined in comedidev.h. */ if (alloc_subdevices(dev, 1) < 0) return -ENOMEM; s = dev->subdevices + 0; - /* digital i/o subdevice */ + /* digital i/o subdevice */ s->type = COMEDI_SUBD_DIO; s->subdev_flags = SDF_READABLE | SDF_WRITABLE; s->n_chan = 20; @@ -158,7 +161,7 @@ static int dnp_attach(struct comedi_device *dev, struct comedi_devconfig *it) * allocated for the primary 8259, so we don't need to allocate them * ourselves. */ - /* configure all ports as input (default) */ + /* configure all ports as input (default) */ outb(PAMR, CSCIR); outb(0x00, CSCDR); outb(PBMR, CSCIR); @@ -181,7 +184,7 @@ static int dnp_attach(struct comedi_device *dev, struct comedi_devconfig *it) static int dnp_detach(struct comedi_device *dev) { - /* configure all ports as input (default) */ + /* configure all ports as input (default) */ outb(PAMR, CSCIR); outb(0x00, CSCDR); outb(PBMR, CSCIR); @@ -189,8 +192,8 @@ static int dnp_detach(struct comedi_device *dev) outb(PCMR, CSCIR); outb((inb(CSCDR) & 0xAA), CSCDR); - /* announce that we are finished */ - printk("comedi%d: dnp: remove\n", dev->minor); + /* announce that we are finished */ + printk(KERN_INFO "comedi%d: dnp: remove\n", dev->minor); return 0; @@ -210,12 +213,12 @@ static int dnp_dio_insn_bits(struct comedi_device *dev, if (insn->n != 2) return -EINVAL; /* insn uses data[0] and data[1] */ - /* The insn data is a mask in data[0] and the new data in data[1], each */ - /* channel cooresponding to a bit. */ + /* The insn data is a mask in data[0] and the new data in data[1], */ + /* each channel cooresponding to a bit. */ - /* Ports A and B are straight forward: each bit corresponds to an output */ - /* pin with the same order. Port C is different: bits 0...3 correspond to */ - /* bits 4...7 of the output register (PCDR). */ + /* Ports A and B are straight forward: each bit corresponds to an */ + /* output pin with the same order. Port C is different: bits 0...3 */ + /* correspond to bits 4...7 of the output register (PCDR). */ if (data[0]) { @@ -235,7 +238,7 @@ static int dnp_dio_insn_bits(struct comedi_device *dev, | (u8) ((data[1] & 0x0F0000) >> 12), CSCDR); } - /* on return, data[1] contains the value of the digital input lines. */ + /* on return, data[1] contains the value of the digital input lines. */ outb(PADR, CSCIR); data[0] = inb(CSCDR); outb(PBDR, CSCIR); @@ -260,7 +263,8 @@ static int dnp_dio_insn_config(struct comedi_device *dev, u8 register_buffer; - int chan = CR_CHAN(insn->chanspec); /* reduces chanspec to lower 16 bits */ + /* reduces chanspec to lower 16 bits */ + int chan = CR_CHAN(insn->chanspec); switch (data[0]) { case INSN_CONFIG_DIO_OUTPUT: @@ -275,11 +279,11 @@ static int dnp_dio_insn_config(struct comedi_device *dev, return -EINVAL; break; } - /* Test: which port does the channel belong to? */ + /* Test: which port does the channel belong to? */ - /* We have to pay attention with port C: this is the meaning of PCMR: */ - /* Bit in PCMR: 7 6 5 4 3 2 1 0 */ - /* Corresponding port C pin: d 3 d 2 d 1 d 0 d= don't touch */ + /* We have to pay attention with port C: this is the meaning of PCMR: */ + /* Bit in PCMR: 7 6 5 4 3 2 1 0 */ + /* Corresponding port C pin: d 3 d 2 d 1 d 0 d= don't touch */ if ((chan >= 0) && (chan <= 7)) { /* this is port A */ @@ -289,8 +293,8 @@ static int dnp_dio_insn_config(struct comedi_device *dev, chan -= 8; outb(PBMR, CSCIR); } else if ((chan >= 16) && (chan <= 19)) { - /* this is port C; multiplication with 2 brings bits into correct */ - /* position for PCMR! */ + /* this is port C; multiplication with 2 brings bits into */ + /* correct position for PCMR! */ chan -= 16; chan *= 2; outb(PCMR, CSCIR); @@ -298,7 +302,7 @@ static int dnp_dio_insn_config(struct comedi_device *dev, return -EINVAL; } - /* read 'old' direction of the port and set bits (out=1, in=0) */ + /* read 'old' direction of the port and set bits (out=1, in=0) */ register_buffer = inb(CSCDR); if (data[0] == COMEDI_OUTPUT) register_buffer |= (1 << chan); diff --git a/drivers/staging/comedi/drivers/usbduxfast.c b/drivers/staging/comedi/drivers/usbduxfast.c index e89b81812538..05b1973ea35f 100644 --- a/drivers/staging/comedi/drivers/usbduxfast.c +++ b/drivers/staging/comedi/drivers/usbduxfast.c @@ -177,8 +177,8 @@ struct usbduxfastsub_s { int16_t *insnBuffer; /* input buffer for single insn */ int ifnum; /* interface number */ struct usb_interface *interface; /* interface structure */ - struct comedi_device *comedidev; /* comedi device for the interrupt - context */ + /* comedi device for the interrupt context */ + struct comedi_device *comedidev; short int ai_cmd_running; /* asynchronous command is running */ short int ai_continous; /* continous aquisition */ long int ai_sample_count; /* number of samples to acquire */ @@ -271,7 +271,8 @@ static int usbduxfast_ai_stop(struct usbduxfastsub_s *udfs, int do_unlink) udfs->ai_cmd_running = 0; if (do_unlink) - ret = usbduxfastsub_unlink_InURBs(udfs); /* stop aquistion */ + /* stop aquistion */ + ret = usbduxfastsub_unlink_InURBs(udfs); return ret; } @@ -451,13 +452,15 @@ static int usbduxfastsub_start(struct usbduxfastsub_s *udfs) /* 7f92 to zero */ local_transfer_buffer[0] = 0; - ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, /* bRequest, "Firmware" */ - VENDOR_DIR_OUT, /* bmRequestType */ - USBDUXFASTSUB_CPUCS, /* Value */ - 0x0000, /* Index */ - local_transfer_buffer, /* address of the transfer buffer */ - 1, /* Length */ - EZTIMEOUT); /* Timeout */ + /* bRequest, "Firmware" */ + ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, + VENDOR_DIR_OUT, /* bmRequestType */ + USBDUXFASTSUB_CPUCS, /* Value */ + 0x0000, /* Index */ + /* address of the transfer buffer */ + local_transfer_buffer, + 1, /* Length */ + EZTIMEOUT); /* Timeout */ if (ret < 0) { printk("comedi_: usbduxfast_: control msg failed (start)\n"); return ret; @@ -473,7 +476,8 @@ static int usbduxfastsub_stop(struct usbduxfastsub_s *udfs) /* 7f92 to one */ local_transfer_buffer[0] = 1; - ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, /* bRequest, "Firmware" */ + /* bRequest, "Firmware" */ + ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, VENDOR_DIR_OUT, /* bmRequestType */ USBDUXFASTSUB_CPUCS, /* Value */ 0x0000, /* Index */ @@ -499,13 +503,15 @@ static int usbduxfastsub_upload(struct usbduxfastsub_s *udfs, printk(KERN_DEBUG " to addr %d, first byte=%d.\n", startAddr, local_transfer_buffer[0]); #endif - ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, /* brequest, firmware */ - VENDOR_DIR_OUT, /* bmRequestType */ - startAddr, /* value */ - 0x0000, /* index */ - local_transfer_buffer, /* our local safe buffer */ - len, /* length */ - EZTIMEOUT); /* timeout */ + /* brequest, firmware */ + ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, + VENDOR_DIR_OUT, /* bmRequestType */ + startAddr, /* value */ + 0x0000, /* index */ + /* our local safe buffer */ + local_transfer_buffer, + len, /* length */ + EZTIMEOUT); /* timeout */ #ifdef CONFIG_COMEDI_DEBUG printk(KERN_DEBUG "comedi_: usbduxfast: result=%d\n", ret); @@ -1347,7 +1353,7 @@ static int usbduxfast_ai_insn_read(struct comedi_device *dev, #define FIRMWARE_MAX_LEN 0x2000 static int firmwareUpload(struct usbduxfastsub_s *usbduxfastsub, - const u8 * firmwareBinary, int sizeFirmware) + const u8 *firmwareBinary, int sizeFirmware) { int ret; uint8_t *fwBuf; diff --git a/drivers/staging/comedi/range.c b/drivers/staging/comedi/range.c index 8313dfcb6732..188c47948033 100644 --- a/drivers/staging/comedi/range.c +++ b/drivers/staging/comedi/range.c @@ -29,7 +29,7 @@ const struct comedi_lrange range_bipolar5 = { 1, {BIP_RANGE(5)} }; const struct comedi_lrange range_bipolar2_5 = { 1, {BIP_RANGE(2.5)} }; const struct comedi_lrange range_unipolar10 = { 1, {UNI_RANGE(10)} }; const struct comedi_lrange range_unipolar5 = { 1, {UNI_RANGE(5)} }; -const struct comedi_lrange range_unknown = { 1, {{0, 1000000, UNIT_none}} }; +const struct comedi_lrange range_unknown = { 1, {{0, 1000000, UNIT_none} } }; /* COMEDI_RANGEINFO diff --git a/drivers/staging/crystalhd/bc_dts_glob_lnx.h b/drivers/staging/crystalhd/bc_dts_glob_lnx.h index b3125e3e0372..0fd34e20dc88 100644 --- a/drivers/staging/crystalhd/bc_dts_glob_lnx.h +++ b/drivers/staging/crystalhd/bc_dts_glob_lnx.h @@ -40,7 +40,7 @@ #include <sys/time.h> #include <time.h> #include <arpa/inet.h> -#include <asm/param.h> +#include <linux/param.h> #include <linux/ioctl.h> #include <sys/select.h> diff --git a/drivers/staging/crystalhd/bc_dts_types.h b/drivers/staging/crystalhd/bc_dts_types.h index ac0c81717385..95a2f875f1e7 100644 --- a/drivers/staging/crystalhd/bc_dts_types.h +++ b/drivers/staging/crystalhd/bc_dts_types.h @@ -25,7 +25,7 @@ #ifndef _BC_DTS_TYPES_H_ #define _BC_DTS_TYPES_H_ -#ifdef __LINUX_USER__ // Don't include these for KERNEL.. +#ifdef __LINUX_USER__ /* Don't include these for KERNEL.. */ #include <stdint.h> #endif diff --git a/drivers/staging/crystalhd/bcm_70012_regs.h b/drivers/staging/crystalhd/bcm_70012_regs.h index 6922f54e432f..f3ab3146cd90 100644 --- a/drivers/staging/crystalhd/bcm_70012_regs.h +++ b/drivers/staging/crystalhd/bcm_70012_regs.h @@ -25,22 +25,22 @@ * m = memory, c = core, r = register, f = field, d = data. */ #if !defined(GET_FIELD) && !defined(SET_FIELD) -#define BRCM_ALIGN(c,r,f) c##_##r##_##f##_ALIGN -#define BRCM_BITS(c,r,f) c##_##r##_##f##_BITS -#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK -#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT +#define BRCM_ALIGN(c, r, f) c##_##r##_##f##_ALIGN +#define BRCM_BITS(c, r, f) c##_##r##_##f##_BITS +#define BRCM_MASK(c, r, f) c##_##r##_##f##_MASK +#define BRCM_SHIFT(c, r, f) c##_##r##_##f##_SHIFT -#define GET_FIELD(m,c,r,f) \ - ((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f)) << BRCM_ALIGN(c,r,f)) +#define GET_FIELD(m, c, r, f) \ + ((((m) & BRCM_MASK(c, r, f)) >> BRCM_SHIFT(c, r, f)) << BRCM_ALIGN(c, r, f)) -#define SET_FIELD(m,c,r,f,d) \ - ((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d) >> BRCM_ALIGN(c,r,f)) << \ - BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f))) \ +#define SET_FIELD(m, c, r, f, d) \ + ((m) = (((m) & ~BRCM_MASK(c, r, f)) | ((((d) >> BRCM_ALIGN(c, r, f)) << \ + BRCM_SHIFT(c, r, f)) & BRCM_MASK(c, r, f))) \ ) -#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) -#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) -#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) +#define SET_TYPE_FIELD(m, c, r, f, d) SET_FIELD(m, c, r, f, c##_##d) +#define SET_NAME_FIELD(m, c, r, f, d) SET_FIELD(m, c, r, f, c##_##r##_##f##_##d) +#define SET_VALUE_FIELD(m, c, r, f, d) SET_FIELD(m, c, r, f, d) #endif /* GET & SET */ diff --git a/drivers/staging/crystalhd/crystalhd_cmds.c b/drivers/staging/crystalhd/crystalhd_cmds.c index 26145a8d0f78..d826715809df 100644 --- a/drivers/staging/crystalhd/crystalhd_cmds.c +++ b/drivers/staging/crystalhd/crystalhd_cmds.c @@ -88,7 +88,7 @@ static BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx, return BC_STS_SUCCESS; } if (ctx->state != BC_LINK_INVALID) { - BCMLOG_ERR("Link invalid state %d \n", ctx->state); + BCMLOG_ERR("Link invalid state %d\n", ctx->state); return BC_STS_ERR_USAGE; } /* Check for duplicate playback sessions..*/ @@ -301,7 +301,7 @@ static BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx, } if (ctx->state != BC_LINK_INVALID) { - BCMLOG_ERR("Link invalid state %d \n", ctx->state); + BCMLOG_ERR("Link invalid state %d\n", ctx->state); return BC_STS_ERR_USAGE; } @@ -309,7 +309,7 @@ static BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx, idata->add_cdata_sz); if (sts != BC_STS_SUCCESS) { - BCMLOG_ERR("Firmware Download Failure!! - %d\n", sts); + BCMLOG_ERR("Firmware Download Failure!! - %d\n", sts) } else ctx->state |= BC_LINK_INIT; @@ -335,7 +335,7 @@ static BC_STATUS bc_cproc_do_fw_cmd(struct crystalhd_cmd *ctx, crystalhd_ioctl_d uint32_t *cmd; if (!(ctx->state & BC_LINK_INIT)) { - BCMLOG_ERR("Link invalid state %d \n", ctx->state); + BCMLOG_ERR("Link invalid state %d\n", ctx->state); return BC_STS_ERR_USAGE; } @@ -379,7 +379,7 @@ static void bc_proc_in_completion(crystalhd_dio_req *dio_hnd, return; } if (sts == BC_STS_IO_USER_ABORT) - return; + return; dio_hnd->uinfo.comp_sts = sts; dio_hnd->uinfo.ev_sts = 1; @@ -452,7 +452,7 @@ static BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx, if (!rc) { return dio->uinfo.comp_sts; } else if (rc == -EBUSY) { - BCMLOG(BCMLOG_DBG, "_tx_post() T/O \n"); + BCMLOG(BCMLOG_DBG, "_tx_post() T/O\n"); sts = BC_STS_TIMEOUT; } else if (rc == -EINTR) { BCMLOG(BCMLOG_DBG, "Tx Wait Signal int.\n"); @@ -482,7 +482,7 @@ static BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff, uint32_t ub_sz, /* Check for alignment */ if (((uintptr_t)ubuff) & 0x03) { - BCMLOG_ERR("%s-->Un-aligned address not implemented yet.. %p \n", + BCMLOG_ERR("%s-->Un-aligned address not implemented yet.. %p\n", ((pin) ? "TX" : "RX"), ubuff); return BC_STS_NOT_IMPL; } @@ -523,7 +523,7 @@ static BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx, crystalhd_ioctl_ sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, 0, 0, 1, &dio_hnd); if (sts != BC_STS_SUCCESS) { - BCMLOG_ERR("dio map - %d \n", sts); + BCMLOG_ERR("dio map - %d\n", sts); return sts; } @@ -563,7 +563,7 @@ static BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx, sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, uv_off, en_422, 0, &dio_hnd); if (sts != BC_STS_SUCCESS) { - BCMLOG_ERR("dio map - %d \n", sts); + BCMLOG_ERR("dio map - %d\n", sts); return sts; } @@ -1026,7 +1026,7 @@ crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx, uint32_t cm if (g_crystalhd_cproc_tbl[i].cmd_id == cmd) { if ((uc->mode == DTS_MONITOR_MODE) && (g_crystalhd_cproc_tbl[i].block_mon)) { - BCMLOG(BCMLOG_INFO, "Blocking cmd %d \n", cmd); + BCMLOG(BCMLOG_INFO, "Blocking cmd %d\n", cmd); break; } cproc = g_crystalhd_cproc_tbl[i].cmd_proc; diff --git a/drivers/staging/crystalhd/crystalhd_cmds.h b/drivers/staging/crystalhd/crystalhd_cmds.h index 6b290aed8e0b..9989038b5c1b 100644 --- a/drivers/staging/crystalhd/crystalhd_cmds.h +++ b/drivers/staging/crystalhd/crystalhd_cmds.h @@ -66,7 +66,7 @@ struct crystalhd_cmd { struct crystalhd_hw hw_ctx; }; -typedef BC_STATUS (*crystalhd_cmd_proc)(struct crystalhd_cmd *, crystalhd_ioctl_data *); +typedef BC_STATUS(*crystalhd_cmd_proc)(struct crystalhd_cmd *, crystalhd_ioctl_data *); typedef struct _crystalhd_cmd_tbl { uint32_t cmd_id; diff --git a/drivers/staging/crystalhd/crystalhd_hw.c b/drivers/staging/crystalhd/crystalhd_hw.c index c438c489aa92..56d1e42bbad6 100644 --- a/drivers/staging/crystalhd/crystalhd_hw.c +++ b/drivers/staging/crystalhd/crystalhd_hw.c @@ -432,7 +432,7 @@ static void crystalhd_hw_delete_ioqs(struct crystalhd_hw *hw) if (!hw) return; - BCMLOG(BCMLOG_DBG, "Deleting IOQs \n"); + BCMLOG(BCMLOG_DBG, "Deleting IOQs\n"); crystalhd_hw_delete_ioq(hw->adp, hw->tx_actq); crystalhd_hw_delete_ioq(hw->adp, hw->tx_freeq); crystalhd_hw_delete_ioq(hw->adp, hw->rx_actq); @@ -570,7 +570,7 @@ static bool crystalhd_tx_list0_handler(struct crystalhd_hw *hw, uint32_t err_sts if (!(err_sts & err_mask)) return false; - BCMLOG_ERR("Error on Tx-L0 %x \n", err_sts); + BCMLOG_ERR("Error on Tx-L0 %x\n", err_sts); tmp = err_mask; @@ -602,7 +602,7 @@ static bool crystalhd_tx_list1_handler(struct crystalhd_hw *hw, uint32_t err_sts if (!(err_sts & err_mask)) return false; - BCMLOG_ERR("Error on Tx-L1 %x \n", err_sts); + BCMLOG_ERR("Error on Tx-L1 %x\n", err_sts); tmp = err_mask; @@ -635,9 +635,9 @@ static void crystalhd_tx_isr(struct crystalhd_hw *hw, uint32_t int_sts) BC_STS_SUCCESS); if (!(int_sts & (INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_MASK | - INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_MASK))) { - /* No error mask set.. */ - return; + INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_MASK))) { + /* No error mask set.. */ + return; } /* Handle Tx errors. */ @@ -1134,33 +1134,29 @@ static void crystalhd_stop_rx_dma_engine(struct crystalhd_hw *hw) if (l0y) { l0y = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST0); l0y &= DMA_START_BIT; - if (!l0y) { + if (!l0y) hw->rx_list_sts[0] &= ~rx_waiting_y_intr; - } } if (l1y) { l1y = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST1); l1y &= DMA_START_BIT; - if (!l1y) { + if (!l1y) hw->rx_list_sts[1] &= ~rx_waiting_y_intr; - } } if (l0uv) { l0uv = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST0); l0uv &= DMA_START_BIT; - if (!l0uv) { + if (!l0uv) hw->rx_list_sts[0] &= ~rx_waiting_uv_intr; - } } if (l1uv) { l1uv = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST1); l1uv &= DMA_START_BIT; - if (!l1uv) { + if (!l1uv) hw->rx_list_sts[1] &= ~rx_waiting_uv_intr; - } } msleep_interruptible(100); count--; @@ -1432,9 +1428,8 @@ static bool crystalhd_rx_list1_handler(struct crystalhd_hw *hw, uint32_t int_sts /* UV1 - DMA */ tmp = uv_err_sts & GET_UV1_ERR_MSK; - if (int_sts & INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_MASK) { + if (int_sts & INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_MASK) hw->rx_list_sts[1] &= ~rx_waiting_uv_intr; - } if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK) { hw->rx_list_sts[1] &= ~rx_waiting_uv_intr; @@ -1740,7 +1735,7 @@ BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, BC_FW_CMD *fw_cmd) res_buff = fw_cmd->rsp; if (!cmd_buff || !res_buff) { - BCMLOG_ERR("Invalid Parameters for F/W Command \n"); + BCMLOG_ERR("Invalid Parameters for F/W Command\n"); return BC_STS_INV_ARG; } diff --git a/drivers/staging/crystalhd/crystalhd_lnx.c b/drivers/staging/crystalhd/crystalhd_lnx.c index 54bad652c0c5..141a3e38a835 100644 --- a/drivers/staging/crystalhd/crystalhd_lnx.c +++ b/drivers/staging/crystalhd/crystalhd_lnx.c @@ -15,7 +15,7 @@ along with this driver. If not, see <http://www.gnu.org/licenses/>. ***************************************************************************/ -#include <linux/version.h> +#include <linux/smp_lock.h> #include <linux/slab.h> #include "crystalhd_lnx.h" @@ -51,7 +51,7 @@ static int chd_dec_enable_int(struct crystalhd_adp *adp) rc = request_irq(adp->pdev->irq, chd_dec_isr, IRQF_SHARED, adp->name, (void *)adp); if (rc) { - BCMLOG_ERR("Interrupt request failed.. \n"); + BCMLOG_ERR("Interrupt request failed..\n"); pci_disable_msi(adp->pdev); } @@ -112,7 +112,7 @@ static inline int crystalhd_user_data(unsigned long ud, void *dr, int size, int int rc; if (!ud || !dr) { - BCMLOG_ERR("Invalid arg \n"); + BCMLOG_ERR("Invalid arg\n"); return -EINVAL; } @@ -122,7 +122,7 @@ static inline int crystalhd_user_data(unsigned long ud, void *dr, int size, int rc = copy_from_user(dr, (void *)ud, size); if (rc) { - BCMLOG_ERR("Invalid args for command \n"); + BCMLOG_ERR("Invalid args for command\n"); rc = -EFAULT; } @@ -206,7 +206,7 @@ static int chd_dec_proc_user_data(struct crystalhd_adp *adp, rc = crystalhd_user_data(ua, &io->udata, sizeof(io->udata), set); if (rc) { - BCMLOG_ERR("failed to %s iodata \n", (set ? "set" : "get")); + BCMLOG_ERR("failed to %s iodata\n", (set ? "set" : "get")); return rc; } @@ -261,12 +261,12 @@ static int chd_dec_api_cmd(struct crystalhd_adp *adp, unsigned long ua, } /* API interfaces */ -static int chd_dec_ioctl(struct inode *in, struct file *fd, - unsigned int cmd, unsigned long ua) +static long chd_dec_ioctl(struct file *fd, unsigned int cmd, unsigned long ua) { struct crystalhd_adp *adp = chd_get_adp(); crystalhd_cmd_proc cproc; struct crystalhd_user *uc; + int ret; if (!adp || !fd) { BCMLOG_ERR("Invalid adp\n"); @@ -279,13 +279,17 @@ static int chd_dec_ioctl(struct inode *in, struct file *fd, return -ENODATA; } + lock_kernel(); cproc = crystalhd_get_cmd_proc(&adp->cmds, cmd, uc); if (!cproc) { BCMLOG_ERR("Unhandled command: %d\n", cmd); + unlock_kernel(); return -EINVAL; } - return chd_dec_api_cmd(adp, ua, uc->uid, cmd, cproc); + ret = chd_dec_api_cmd(adp, ua, uc->uid, cmd, cproc); + unlock_kernel(); + return ret; } static int chd_dec_open(struct inode *in, struct file *fd) @@ -308,7 +312,7 @@ static int chd_dec_open(struct inode *in, struct file *fd) sts = crystalhd_user_open(&adp->cmds, &uc); if (sts != BC_STS_SUCCESS) { - BCMLOG_ERR("cmd_user_open - %d \n", sts); + BCMLOG_ERR("cmd_user_open - %d\n", sts); rc = -EBUSY; } @@ -326,7 +330,7 @@ static int chd_dec_close(struct inode *in, struct file *fd) BCMLOG_ENTER; if (!adp) { - BCMLOG_ERR("Invalid adp \n"); + BCMLOG_ERR("Invalid adp\n"); return -EINVAL; } @@ -345,7 +349,7 @@ static int chd_dec_close(struct inode *in, struct file *fd) static const struct file_operations chd_dec_fops = { .owner = THIS_MODULE, - .ioctl = chd_dec_ioctl, + .unlocked_ioctl = chd_dec_ioctl, .open = chd_dec_open, .release = chd_dec_close, }; @@ -376,7 +380,7 @@ static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp) dev = device_create(crystalhd_class, NULL, MKDEV(adp->chd_dec_major, 0), NULL, "crystalhd"); - if (!dev) { + if (IS_ERR(dev)) { BCMLOG_ERR("failed to create device\n"); goto device_create_fail; } @@ -521,7 +525,7 @@ static void __devexit chd_dec_pci_remove(struct pci_dev *pdev) sts = crystalhd_delete_cmd_context(&pinfo->cmds); if (sts != BC_STS_SUCCESS) - BCMLOG_ERR("cmd delete :%d \n", sts); + BCMLOG_ERR("cmd delete :%d\n", sts); chd_dec_release_chdev(pinfo); @@ -581,7 +585,7 @@ static int __devinit chd_dec_pci_probe(struct pci_dev *pdev, chd_dec_init_chdev(pinfo); rc = chd_dec_enable_int(pinfo); if (rc) { - BCMLOG_ERR("_enable_int err:%d \n", rc); + BCMLOG_ERR("_enable_int err:%d\n", rc); pci_disable_device(pdev); return -ENODEV; } @@ -601,7 +605,7 @@ static int __devinit chd_dec_pci_probe(struct pci_dev *pdev, sts = crystalhd_setup_cmd_context(&pinfo->cmds, pinfo); if (sts != BC_STS_SUCCESS) { - BCMLOG_ERR("cmd setup :%d \n", sts); + BCMLOG_ERR("cmd setup :%d\n", sts); pci_disable_device(pdev); return -ENODEV; } @@ -675,7 +679,7 @@ int chd_dec_pci_resume(struct pci_dev *pdev) rc = chd_dec_enable_int(adp); if (rc) { - BCMLOG_ERR("_enable_int err:%d \n", rc); + BCMLOG_ERR("_enable_int err:%d\n", rc); pci_disable_device(pdev); return -ENODEV; } @@ -738,13 +742,13 @@ static int __init chd_dec_module_init(void) int rc; chd_set_log_level(NULL, "debug"); - BCMLOG(BCMLOG_DATA, "Loading crystalhd %d.%d.%d \n", + BCMLOG(BCMLOG_DATA, "Loading crystalhd %d.%d.%d\n", crystalhd_kmod_major, crystalhd_kmod_minor, crystalhd_kmod_rev); rc = pci_register_driver(&bc_chd_70012_driver); if (rc < 0) - BCMLOG_ERR("Could not find any devices. err:%d \n", rc); + BCMLOG_ERR("Could not find any devices. err:%d\n", rc); return rc; } @@ -752,7 +756,7 @@ module_init(chd_dec_module_init); static void __exit chd_dec_module_cleanup(void) { - BCMLOG(BCMLOG_DATA, "unloading crystalhd %d.%d.%d \n", + BCMLOG(BCMLOG_DATA, "unloading crystalhd %d.%d.%d\n", crystalhd_kmod_major, crystalhd_kmod_minor, crystalhd_kmod_rev); pci_unregister_driver(&bc_chd_70012_driver); diff --git a/drivers/staging/crystalhd/crystalhd_lnx.h b/drivers/staging/crystalhd/crystalhd_lnx.h index d338ae97a4cf..eee4926f04ea 100644 --- a/drivers/staging/crystalhd/crystalhd_lnx.h +++ b/drivers/staging/crystalhd/crystalhd_lnx.h @@ -42,11 +42,11 @@ #include <linux/pagemap.h> #include <linux/vmalloc.h> -#include <asm/io.h> +#include <linux/io.h> #include <asm/irq.h> #include <asm/pgtable.h> #include <asm/system.h> -#include <asm/uaccess.h> +#include <linux/uaccess.h> #include "crystalhd_cmds.h" diff --git a/drivers/staging/crystalhd/crystalhd_misc.c b/drivers/staging/crystalhd/crystalhd_misc.c index 73593b078b33..d1346672531f 100644 --- a/drivers/staging/crystalhd/crystalhd_misc.c +++ b/drivers/staging/crystalhd/crystalhd_misc.c @@ -237,7 +237,7 @@ BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *adp, uint32_t start_off, if (!adp || !rd_buff || (bc_chk_dram_range(adp, start_off, dw_cnt) != BC_STS_SUCCESS)) { - BCMLOG_ERR("Invalid arg \n"); + BCMLOG_ERR("Invalid arg\n"); return BC_STS_INV_ARG; } for (ix = 0; ix < dw_cnt; ix++) @@ -265,7 +265,7 @@ BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *adp, uint32_t start_off, if (!adp || !wr_buff || (bc_chk_dram_range(adp, start_off, dw_cnt) != BC_STS_SUCCESS)) { - BCMLOG_ERR("Invalid arg \n"); + BCMLOG_ERR("Invalid arg\n"); return BC_STS_INV_ARG; } @@ -293,7 +293,7 @@ BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *adp, uint32_t off, int rc = 0; if (!adp || !val) { - BCMLOG_ERR("Invalid arg \n"); + BCMLOG_ERR("Invalid arg\n"); return BC_STS_INV_ARG; } @@ -338,7 +338,7 @@ BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *adp, uint32_t off, int rc = 0; if (!adp || !val) { - BCMLOG_ERR("Invalid arg \n"); + BCMLOG_ERR("Invalid arg\n"); return BC_STS_INV_ARG; } @@ -685,7 +685,7 @@ BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff, int i = 0, rw = 0, res = 0, nr_pages = 0, skip_fb_sg = 0; if (!adp || !ubuff || !ubuff_sz || !dio_hnd) { - BCMLOG_ERR("Invalid arg \n"); + BCMLOG_ERR("Invalid arg\n"); return BC_STS_INV_ARG; } /* Compute pages */ @@ -791,7 +791,7 @@ BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff, dio->sg_cnt = pci_map_sg(adp->pdev, dio->sg, dio->page_cnt, dio->direction); if (dio->sg_cnt <= 0) { - BCMLOG_ERR("sg map %d-%d \n", dio->sg_cnt, dio->page_cnt); + BCMLOG_ERR("sg map %d-%d\n", dio->sg_cnt, dio->page_cnt); crystalhd_unmap_dio(adp, dio); return BC_STS_ERROR; } @@ -826,7 +826,7 @@ BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *adp, crystalhd_dio_req *dio) int j = 0; if (!adp || !dio) { - BCMLOG_ERR("Invalid arg \n"); + BCMLOG_ERR("Invalid arg\n"); return BC_STS_INV_ARG; } @@ -947,7 +947,7 @@ void crystalhd_destroy_dio_pool(struct crystalhd_adp *adp) adp->fill_byte_pool = NULL; } - BCMLOG(BCMLOG_DBG, "Released dio pool %d \n", count); + BCMLOG(BCMLOG_DBG, "Released dio pool %d\n", count); } /** @@ -973,7 +973,7 @@ int __devinit crystalhd_create_elem_pool(struct crystalhd_adp *adp, for (i = 0; i < pool_size; i++) { temp = kzalloc(sizeof(*temp), GFP_KERNEL); if (!temp) { - BCMLOG_ERR("kalloc failed \n"); + BCMLOG_ERR("kalloc failed\n"); return -ENOMEM; } crystalhd_free_elem(adp, temp); diff --git a/drivers/staging/cx25821/cx25821-alsa.c b/drivers/staging/cx25821/cx25821-alsa.c index 33e559d58b1b..aa3b04d75499 100644 --- a/drivers/staging/cx25821/cx25821-alsa.c +++ b/drivers/staging/cx25821/cx25821-alsa.c @@ -479,7 +479,7 @@ static int snd_cx25821_hw_params(struct snd_pcm_substream *substream, buf->vb.width, buf->vb.height, 1); if (ret < 0) { printk(KERN_INFO - "DEBUG: ERROR after cx25821_risc_databuffer_audio()\n"); + "DEBUG: ERROR after cx25821_risc_databuffer_audio()\n"); goto error; } diff --git a/drivers/staging/cxt1e1/Kconfig b/drivers/staging/cxt1e1/Kconfig new file mode 100644 index 000000000000..68e9b6d973f7 --- /dev/null +++ b/drivers/staging/cxt1e1/Kconfig @@ -0,0 +1,22 @@ +config CXT1E1 + tristate "SBE wanPMC-C[421]E1T1 hardware support" + depends on HDLC && PCI + ---help--- + This driver supports the SBE wanPMC-CxT1E1 1, 2 and 4 port T3 + channelized stream WAN adapter card which contains a HDLC/Transparent + mode controller. + + If you want to compile this driver as a module + say M here and read <file:Documentation/modules.txt>. + The module will be called 'cxt1e1'. + + If unsure, say N. + +config SBE_PMCC4_NCOMM + bool "SBE PMCC4 NCOMM support" + depends on CXT1E1 + ---help--- + SBE supplies optional support for NCOMM products. + + If you have purchased this optional support you must say Y or M + here to allow the driver to operate with the NCOMM product. diff --git a/drivers/staging/cxt1e1/Makefile b/drivers/staging/cxt1e1/Makefile new file mode 100644 index 000000000000..10020d7b79a8 --- /dev/null +++ b/drivers/staging/cxt1e1/Makefile @@ -0,0 +1,19 @@ +obj-$(CONFIG_CXT1E1) += cxt1e1.o + +EXTRA_CFLAGS += -DSBE_PMCC4_ENABLE +EXTRA_CFLAGS += -DSBE_ISR_TASKLET +EXTRA_CFLAGS += -DSBE_INCLUDE_SYMBOLS + +cxt1e1-objs += \ + ossiRelease.o \ + musycc.o \ + pmcc4_drv.o \ + comet.o \ + linux.o \ + functions.o \ + hwprobe.o \ + sbeproc.o \ + pmc93x6_eeprom.o \ + sbecrc.o \ + comet_tables.o \ + sbeid.o diff --git a/drivers/staging/cxt1e1/comet.c b/drivers/staging/cxt1e1/comet.c new file mode 100644 index 000000000000..b70909967038 --- /dev/null +++ b/drivers/staging/cxt1e1/comet.c @@ -0,0 +1,566 @@ +/* Copyright (C) 2003-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <asm/io.h> +#include <linux/hdlc.h> +#include "pmcc4_sysdep.h" +#include "sbecom_inline_linux.h" +#include "libsbew.h" +#include "pmcc4.h" +#include "comet.h" +#include "comet_tables.h" + +#ifdef SBE_INCLUDE_SYMBOLS +#define STATIC +#else +#define STATIC static +#endif + + +extern int log_level; + +#define COMET_NUM_SAMPLES 24 /* Number of entries in the waveform table */ +#define COMET_NUM_UNITS 5 /* Number of points per entry in table */ + +/* forward references */ +STATIC void SetPwrLevel (comet_t * comet); +STATIC void WrtRcvEqualizerTbl (ci_t * ci, comet_t * comet, u_int32_t *table); +STATIC void WrtXmtWaveformTbl (ci_t * ci, comet_t * comet, u_int8_t table[COMET_NUM_SAMPLES][COMET_NUM_UNITS]); + + +void *TWV_table[12] = { + TWVLongHaul0DB, TWVLongHaul7_5DB, TWVLongHaul15DB, TWVLongHaul22_5DB, + TWVShortHaul0, TWVShortHaul1, TWVShortHaul2, TWVShortHaul3, TWVShortHaul4, + TWVShortHaul5, + TWV_E1_75Ohm, /** PORT POINT - 75 Ohm not supported **/ + TWV_E1_120Ohm +}; + + +static int +lbo_tbl_lkup (int t1, int lbo) +{ + if ((lbo < CFG_LBO_LH0) || (lbo > CFG_LBO_E120)) /* error switches to + * default */ + { + if (t1) + lbo = CFG_LBO_LH0; /* default T1 waveform table */ + else + lbo = CFG_LBO_E120; /* default E1 waveform table */ + } + return (lbo - 1); /* make index ZERO relative */ +} + + +void +init_comet (void *ci, comet_t * comet, u_int32_t port_mode, int clockmaster, + u_int8_t moreParams) +{ + u_int8_t isT1mode; + u_int8_t tix = CFG_LBO_LH0; /* T1 default */ + + isT1mode = IS_FRAME_ANY_T1 (port_mode); + /* T1 or E1 */ + if (isT1mode) + { + pci_write_32 ((u_int32_t *) &comet->gbl_cfg, 0xa0); /* Select T1 Mode & PIO + * output enabled */ + tix = lbo_tbl_lkup (isT1mode, CFG_LBO_LH0); /* default T1 waveform + * table */ + } else + { + pci_write_32 ((u_int32_t *) &comet->gbl_cfg, 0x81); /* Select E1 Mode & PIO + * output enabled */ + tix = lbo_tbl_lkup (isT1mode, CFG_LBO_E120); /* default E1 waveform + * table */ + } + + if (moreParams & CFG_LBO_MASK) + tix = lbo_tbl_lkup (isT1mode, moreParams & CFG_LBO_MASK); /* dial-in requested + * waveform table */ + + /* Tx line Intfc cfg ** Set for analog & no special patterns */ + pci_write_32 ((u_int32_t *) &comet->tx_line_cfg, 0x00); /* Transmit Line + * Interface Config. */ + + /* master test ** Ignore Test settings for now */ + pci_write_32 ((u_int32_t *) &comet->mtest, 0x00); /* making sure it's + * Default value */ + + /* Turn on Center (CENT) and everything else off */ + pci_write_32 ((u_int32_t *) &comet->rjat_cfg, 0x10); /* RJAT cfg */ + /* Set Jitter Attenuation to recommend T1 values */ + if (isT1mode) + { + pci_write_32 ((u_int32_t *) &comet->rjat_n1clk, 0x2F); /* RJAT Divider N1 + * Control */ + pci_write_32 ((u_int32_t *) &comet->rjat_n2clk, 0x2F); /* RJAT Divider N2 + * Control */ + } else + { + pci_write_32 ((u_int32_t *) &comet->rjat_n1clk, 0xFF); /* RJAT Divider N1 + * Control */ + pci_write_32 ((u_int32_t *) &comet->rjat_n2clk, 0xFF); /* RJAT Divider N2 + * Control */ + } + + /* Turn on Center (CENT) and everything else off */ + pci_write_32 ((u_int32_t *) &comet->tjat_cfg, 0x10); /* TJAT Config. */ + + /* Do not bypass jitter attenuation and bypass elastic store */ + pci_write_32 ((u_int32_t *) &comet->rx_opt, 0x00); /* rx opts */ + + /* TJAT ctrl & TJAT divider ctrl */ + /* Set Jitter Attenuation to recommended T1 values */ + if (isT1mode) + { + pci_write_32 ((u_int32_t *) &comet->tjat_n1clk, 0x2F); /* TJAT Divider N1 + * Control */ + pci_write_32 ((u_int32_t *) &comet->tjat_n2clk, 0x2F); /* TJAT Divider N2 + * Control */ + } else + { + pci_write_32 ((u_int32_t *) &comet->tjat_n1clk, 0xFF); /* TJAT Divider N1 + * Control */ + pci_write_32 ((u_int32_t *) &comet->tjat_n2clk, 0xFF); /* TJAT Divider N2 + * Control */ + } + + /* 1c: rx ELST cfg 20: tx ELST cfg 28&38: rx&tx data link ctrl */ + if (isT1mode) + { /* Select 193-bit frame format */ + pci_write_32 ((u_int32_t *) &comet->rx_elst_cfg, 0x00); + pci_write_32 ((u_int32_t *) &comet->tx_elst_cfg, 0x00); + } else + { /* Select 256-bit frame format */ + pci_write_32 ((u_int32_t *) &comet->rx_elst_cfg, 0x03); + pci_write_32 ((u_int32_t *) &comet->tx_elst_cfg, 0x03); + pci_write_32 ((u_int32_t *) &comet->rxce1_ctl, 0x00); /* disable T1 data link + * receive */ + pci_write_32 ((u_int32_t *) &comet->txci1_ctl, 0x00); /* disable T1 data link + * transmit */ + } + + /* the following is a default value */ + /* Enable 8 out of 10 validation */ + pci_write_32 ((u_int32_t *) &comet->t1_rboc_ena, 0x00); /* t1RBOC + * enable(BOC:BitOriented + * Code) */ + if (isT1mode) + { + + /* IBCD cfg: aka Inband Code Detection ** loopback code length set to */ + pci_write_32 ((u_int32_t *) &comet->ibcd_cfg, 0x04); /* 6 bit down, 5 bit up + * (assert) */ + pci_write_32 ((u_int32_t *) &comet->ibcd_act, 0x08); /* line loopback + * activate pattern */ + pci_write_32 ((u_int32_t *) &comet->ibcd_deact, 0x24); /* deactivate code + * pattern (i.e.001) */ + } + /* 10: CDRC cfg 28&38: rx&tx data link 1 ctrl 48: t1 frmr cfg */ + /* 50: SIGX cfg, COSS (change of signaling state) 54: XBAS cfg */ + /* 60: t1 ALMI cfg */ + /* Configure Line Coding */ + + switch (port_mode) + { + case CFG_FRAME_SF: /* 1 - T1 B8ZS */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->t1_frmr_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->t1_xbas_cfg, 0x20); /* 5:B8ZS */ + pci_write_32 ((u_int32_t *) &comet->t1_almi_cfg, 0); + break; + case CFG_FRAME_ESF: /* 2 - T1 B8ZS */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->rxce1_ctl, 0x20); /* Bit 5: T1 DataLink + * Enable */ + pci_write_32 ((u_int32_t *) &comet->txci1_ctl, 0x20); /* 5: T1 DataLink Enable */ + pci_write_32 ((u_int32_t *) &comet->t1_frmr_cfg, 0x30); /* 4:ESF 5:ESFFA */ + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0x04); /* 2:ESF */ + pci_write_32 ((u_int32_t *) &comet->t1_xbas_cfg, 0x30); /* 4:ESF 5:B8ZS */ + pci_write_32 ((u_int32_t *) &comet->t1_almi_cfg, 0x10); /* 4:ESF */ + break; + case CFG_FRAME_E1PLAIN: /* 3 - HDB3 */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0x40); + break; + case CFG_FRAME_E1CAS: /* 4 - HDB3 */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0x60); + pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0); + break; + case CFG_FRAME_E1CRC: /* 5 - HDB3 */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0x10); + pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0xc2); + break; + case CFG_FRAME_E1CRC_CAS: /* 6 - HDB3 */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0x70); + pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0x82); + break; + case CFG_FRAME_SF_AMI: /* 7 - T1 AMI */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line + * Decoding */ + pci_write_32 ((u_int32_t *) &comet->t1_frmr_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->t1_xbas_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->t1_almi_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0); + break; + case CFG_FRAME_ESF_AMI: /* 8 - T1 AMI */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line + * Decoding */ + pci_write_32 ((u_int32_t *) &comet->rxce1_ctl, 0x20); /* 5: T1 DataLink Enable */ + pci_write_32 ((u_int32_t *) &comet->txci1_ctl, 0x20); /* 5: T1 DataLink Enable */ + pci_write_32 ((u_int32_t *) &comet->t1_frmr_cfg, 0x30); /* Bit 4:ESF 5:ESFFA */ + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0x04); /* 2:ESF */ + pci_write_32 ((u_int32_t *) &comet->t1_xbas_cfg, 0x10); /* 4:ESF */ + pci_write_32 ((u_int32_t *) &comet->t1_almi_cfg, 0x10); /* 4:ESF */ + break; + case CFG_FRAME_E1PLAIN_AMI: /* 9 - AMI */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line + * Decoding */ + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0x80); + pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0x40); + break; + case CFG_FRAME_E1CAS_AMI: /* 10 - AMI */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line + * Decoding */ + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0xe0); + pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0); + break; + case CFG_FRAME_E1CRC_AMI: /* 11 - AMI */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line + * Decoding */ + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0x90); + pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0xc2); + break; + case CFG_FRAME_E1CRC_CAS_AMI: /* 12 - AMI */ + pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line + * Decoding */ + pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0); + pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0xf0); + pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0x82); + break; + } /* end switch */ + + /*** + * Set Full Frame mode (NXDSO[1] = 0, NXDSO[0] = 0) + * CMODE=1: Clock slave mode with BRCLK as an input, + * DE=0: Use falling edge of BRCLK for data, + * FE=0: Use falling edge of BRCLK for frame, + * CMS=0: Use backplane freq, + * RATE[1:0]=0,0: T1 + ***/ + + + /* 0x30: "BRIF cfg"; 0x20 is 'CMODE', 0x03 is (bit) rate */ + /* note "rate bits can only be set once after reset" */ + if (clockmaster) + { /* CMODE == clockMode, 0=clock master (so + * all 3 others should be slave) */ + if (isT1mode) /* rate = 1.544 Mb/s */ + pci_write_32 ((u_int32_t *) &comet->brif_cfg, 0x00); /* Comet 0 Master + * Mode(CMODE=0) */ + else /* rate = 2.048 Mb/s */ + pci_write_32 ((u_int32_t *) &comet->brif_cfg, 0x01); /* Comet 0 Master + * Mode(CMODE=0) */ + + /* 31: BRIF frame pulse cfg 06: tx timing options */ + pci_write_32 ((u_int32_t *) &comet->brif_fpcfg, 0x00); /* Master Mode + * i.e.FPMODE=0 (@0x20) */ + if ((moreParams & CFG_CLK_PORT_MASK) == CFG_CLK_PORT_INTERNAL) + { + if (log_level >= LOG_SBEBUG12) + printk (">> init_comet: clockmaster internal clock\n"); + pci_write_32 ((u_int32_t *) &comet->tx_time, 0x0d); /* internal oscillator */ + } else /* external clock source */ + { + if (log_level >= LOG_SBEBUG12) + printk (">> init_comet: clockmaster external clock\n"); + pci_write_32 ((u_int32_t *) &comet->tx_time, 0x09); /* loop timing + * (external) */ + } + + } else /* slave */ + { + if (isT1mode) + pci_write_32 ((u_int32_t *) &comet->brif_cfg, 0x20); /* Slave Mode(CMODE=1, + * see above) */ + else + pci_write_32 ((u_int32_t *) &comet->brif_cfg, 0x21); /* Slave Mode (CMODE=1) */ + pci_write_32 ((u_int32_t *) &comet->brif_fpcfg, 0x20); /* Slave Mode i.e. + * FPMODE=1 (@0x20) */ + if (log_level >= LOG_SBEBUG12) + printk (">> init_comet: clockslave internal clock\n"); + pci_write_32 ((u_int32_t *) &comet->tx_time, 0x0d); /* oscillator timing */ + } + + /* 32: BRIF parity F-bit cfg */ + /* Totem-pole operation */ + pci_write_32 ((u_int32_t *) &comet->brif_pfcfg, 0x01); /* Receive Backplane + * Parity/F-bit */ + + /* dc: RLPS equalizer V ref */ + /* Configuration */ + if (isT1mode) + pci_write_32 ((u_int32_t *) &comet->rlps_eqvr, 0x2c); /* RLPS Equalizer + * Voltage */ + else + pci_write_32 ((u_int32_t *) &comet->rlps_eqvr, 0x34); /* RLPS Equalizer + * Voltage */ + + /* Reserved bit set and SQUELCH enabled */ + /* f8: RLPS cfg & status f9: RLPS ALOS detect/clear threshold */ + pci_write_32 ((u_int32_t *) &comet->rlps_cfgsts, 0x11); /* RLPS Configuration + * Status */ + if (isT1mode) + pci_write_32 ((u_int32_t *) &comet->rlps_alos_thresh, 0x55); /* ? */ + else + pci_write_32 ((u_int32_t *) &comet->rlps_alos_thresh, 0x22); /* ? */ + + + /* Set Full Frame mode (NXDSO[1] = 0, NXDSO[0] = 0) */ + /* CMODE=0: Clock slave mode with BTCLK as an input, DE=1: Use rising */ + /* edge of BTCLK for data, FE=1: Use rising edge of BTCLK for frame, */ + /* CMS=0: Use backplane freq, RATE[1:0]=0,0: T1 */ +/*** Transmit side is always an Input, Slave Clock*/ + /* 40: BTIF cfg 41: BTIF frame pulse cfg */ + if (isT1mode) + pci_write_32 ((u_int32_t *) &comet->btif_cfg, 0x38); /* BTIF Configuration + * Reg. */ + else + pci_write_32 ((u_int32_t *) &comet->btif_cfg, 0x39); /* BTIF Configuration + * Reg. */ + + pci_write_32 ((u_int32_t *) &comet->btif_fpcfg, 0x01); /* BTIF Frame Pulse + * Config. */ + + /* 0a: master diag 06: tx timing options */ + /* if set Comet to loop back */ + + /* Comets set to normal */ + pci_write_32 ((u_int32_t *) &comet->mdiag, 0x00); + + /* BTCLK driven by TCLKI internally (crystal driven) and Xmt Elasted */ + /* Store is enabled. */ + + WrtXmtWaveformTbl (ci, comet, TWV_table[tix]); + if (isT1mode) + WrtRcvEqualizerTbl ((ci_t *) ci, comet, &T1_Equalizer[0]); + else + WrtRcvEqualizerTbl ((ci_t *) ci, comet, &E1_Equalizer[0]); + SetPwrLevel (comet); +} + +/* +** Name: WrtXmtWaveform +** Description: Formulate the Data for the Pulse Waveform Storage +** Write register, (F2), from the sample and unit inputs. +** Write the data to the Pulse Waveform Storage Data register. +** Returns: Nothing +*/ +STATIC void +WrtXmtWaveform (ci_t * ci, comet_t * comet, u_int32_t sample, u_int32_t unit, u_int8_t data) +{ + u_int8_t WaveformAddr; + + WaveformAddr = (sample << 3) + (unit & 7); + pci_write_32 ((u_int32_t *) &comet->xlpg_pwave_addr, WaveformAddr); + pci_flush_write (ci); /* for write order preservation when + * Optimizing driver */ + pci_write_32 ((u_int32_t *) &comet->xlpg_pwave_data, 0x7F & data); +} + +/* +** Name: WrtXmtWaveformTbl +** Description: Fill in the Transmit Waveform Values +** for driving the transmitter DAC. +** Returns: Nothing +*/ +STATIC void +WrtXmtWaveformTbl (ci_t * ci, comet_t * comet, + u_int8_t table[COMET_NUM_SAMPLES][COMET_NUM_UNITS]) +{ + u_int32_t sample, unit; + + for (sample = 0; sample < COMET_NUM_SAMPLES; sample++) + { + for (unit = 0; unit < COMET_NUM_UNITS; unit++) + WrtXmtWaveform (ci, comet, sample, unit, table[sample][unit]); + } + + /* Enable transmitter and set output amplitude */ + pci_write_32 ((u_int32_t *) &comet->xlpg_cfg, table[COMET_NUM_SAMPLES][0]); +} + + +/* +** Name: WrtXmtWaveform +** Description: Fill in the Receive Equalizer RAM from the desired +** table. +** Returns: Nothing +** +** Remarks: Per PM4351 Device Errata, Receive Equalizer RAM Initialization +** is coded with early setup of indirect address. +*/ + +STATIC void +WrtRcvEqualizerTbl (ci_t * ci, comet_t * comet, u_int32_t *table) +{ + u_int32_t ramaddr; + volatile u_int32_t value; + + for (ramaddr = 0; ramaddr < 256; ramaddr++) + { + /*** the following lines are per Errata 7, 2.5 ***/ + { + pci_write_32 ((u_int32_t *) &comet->rlps_eq_rwsel, 0x80); /* Set up for a read + * operation */ + pci_flush_write (ci); /* for write order preservation when + * Optimizing driver */ + pci_write_32 ((u_int32_t *) &comet->rlps_eq_iaddr, (u_int8_t) ramaddr); /* write the addr, + * initiate a read */ + pci_flush_write (ci); /* for write order preservation when + * Optimizing driver */ + /* + * wait 3 line rate clock cycles to ensure address bits are + * captured by T1/E1 clock + */ + OS_uwait (4, "wret"); /* 683ns * 3 = 1366 ns, approx 2us (but + * use 4us) */ + } + + value = *table++; + pci_write_32 ((u_int32_t *) &comet->rlps_idata3, (u_int8_t) (value >> 24)); + pci_write_32 ((u_int32_t *) &comet->rlps_idata2, (u_int8_t) (value >> 16)); + pci_write_32 ((u_int32_t *) &comet->rlps_idata1, (u_int8_t) (value >> 8)); + pci_write_32 ((u_int32_t *) &comet->rlps_idata0, (u_int8_t) value); + pci_flush_write (ci); /* for write order preservation when + * Optimizing driver */ + + /* Storing RAM address, causes RAM to be updated */ + + pci_write_32 ((u_int32_t *) &comet->rlps_eq_rwsel, 0); /* Set up for a write + * operation */ + pci_flush_write (ci); /* for write order preservation when + * Optimizing driver */ + pci_write_32 ((u_int32_t *) &comet->rlps_eq_iaddr, (u_int8_t) ramaddr); /* write the addr, + * initiate a read */ + pci_flush_write (ci); /* for write order preservation when + * Optimizing driver */ + /* + * wait 3 line rate clock cycles to ensure address bits are captured + * by T1/E1 clock + */ + OS_uwait (4, "wret"); /* 683ns * 3 = 1366 ns, approx 2us (but + * use 4us) */ + } + + pci_write_32 ((u_int32_t *) &comet->rlps_eq_cfg, 0xCB); /* Enable Equalizer & + * set it to use 256 + * periods */ +} + + +/* +** Name: SetPwrLevel +** Description: Implement power level setting algorithm described below +** Returns: Nothing +*/ + +STATIC void +SetPwrLevel (comet_t * comet) +{ + volatile u_int32_t temp; + +/* +** Algorithm to Balance the Power Distribution of Ttip Tring +** +** Zero register F6 +** Write 0x01 to register F4 +** Write another 0x01 to register F4 +** Read register F4 +** Remove the 0x01 bit by Anding register F4 with 0xFE +** Write the resultant value to register F4 +** Repeat these steps for register F5 +** Write 0x01 to register F6 +*/ + pci_write_32 ((u_int32_t *) &comet->xlpg_fdata_sel, 0x00); /* XLPG Fuse Data Select */ + + pci_write_32 ((u_int32_t *) &comet->xlpg_atest_pctl, 0x01); /* XLPG Analog Test + * Positive control */ + pci_write_32 ((u_int32_t *) &comet->xlpg_atest_pctl, 0x01); + + temp = pci_read_32 ((u_int32_t *) &comet->xlpg_atest_pctl) & 0xfe; + pci_write_32 ((u_int32_t *) &comet->xlpg_atest_pctl, temp); + + pci_write_32 ((u_int32_t *) &comet->xlpg_atest_nctl, 0x01); /* XLPG Analog Test + * Negative control */ + pci_write_32 ((u_int32_t *) &comet->xlpg_atest_nctl, 0x01); + + temp = pci_read_32 ((u_int32_t *) &comet->xlpg_atest_nctl) & 0xfe; + pci_write_32 ((u_int32_t *) &comet->xlpg_atest_nctl, temp); + pci_write_32 ((u_int32_t *) &comet->xlpg_fdata_sel, 0x01); /* XLPG */ +} + + +/* +** Name: SetCometOps +** Description: Set up the selected Comet's clock edge drive for both +** the transmit out the analog side and receive to the +** backplane side. +** Returns: Nothing +*/ +#if 0 +STATIC void +SetCometOps (comet_t * comet) +{ + volatile u_int8_t rd_value; + + if (comet == mConfig.C4Func1Base + (COMET0_OFFSET >> 2)) + { + rd_value = (u_int8_t) pci_read_32 ((u_int32_t *) &comet->brif_cfg); /* read the BRIF + * Configuration */ + rd_value &= ~0x20; + pci_write_32 ((u_int32_t *) &comet->brif_cfg, (u_int32_t) rd_value); + + rd_value = (u_int8_t) pci_read_32 ((u_int32_t *) &comet->brif_fpcfg); /* read the BRIF Frame + * Pulse Configuration */ + rd_value &= ~0x20; + pci_write_32 ((u_int32_t *) &comet->brif_fpcfg, (u_int8_t) rd_value); + } else + { + rd_value = (u_int8_t) pci_read_32 ((u_int32_t *) &comet->brif_cfg); /* read the BRIF + * Configuration */ + rd_value |= 0x20; + pci_write_32 ((u_int32_t *) &comet->brif_cfg, (u_int32_t) rd_value); + + rd_value = (u_int8_t) pci_read_32 ((u_int32_t *) &comet->brif_fpcfg); /* read the BRIF Frame + * Pulse Configuration */ + rd_value |= 0x20; + pci_write_32 ((u_int32_t *) &comet->brif_fpcfg, (u_int8_t) rd_value); + } +} +#endif + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/comet.h b/drivers/staging/cxt1e1/comet.h new file mode 100644 index 000000000000..5cb3afda0112 --- /dev/null +++ b/drivers/staging/cxt1e1/comet.h @@ -0,0 +1,366 @@ +/* + * $Id: comet.h,v 1.3 2005/09/28 00:10:07 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_COMET_H_ +#define _INC_COMET_H_ + +/*----------------------------------------------------------------------------- + * comet.h - + * + * Copyright (C) 2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.3 $ + * Last changed on $Date: 2005/09/28 00:10:07 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: comet.h,v $ + * Revision 1.3 2005/09/28 00:10:07 rickd + * Add RCS header. Switch to structure usage. + * + * Revision 1.2 2005/04/28 23:43:03 rickd + * Add RCS tracking heading. + * + *----------------------------------------------------------------------------- + */ + +#if defined(__FreeBSD__) || defined (__NetBSD__) +#include <sys/types.h> +#else +#include <linux/types.h> +#endif + + +#define VINT32 volatile u_int32_t + +struct s_comet_reg +{ + VINT32 gbl_cfg; /* 00 Global Cfg */ + VINT32 clkmon; /* 01 Clk Monitor */ + VINT32 rx_opt; /* 02 RX Options */ + VINT32 rx_line_cfg; /* 03 RX Line Interface Cfg */ + VINT32 tx_line_cfg; /* 04 TX Line Interface Cfg */ + VINT32 tx_frpass; /* 05 TX Framing & Bypass Options */ + VINT32 tx_time; /* 06 TX Timing Options */ + VINT32 intr_1; /* 07 Intr Source #1 */ + VINT32 intr_2; /* 08 Intr Source #2 */ + VINT32 intr_3; /* 09 Intr Source #3 */ + VINT32 mdiag; /* 0A Master Diagnostics */ + VINT32 mtest; /* 0B Master Test */ + VINT32 adiag; /* 0C Analog Diagnostics */ + VINT32 rev_id; /* 0D Rev/Chip Id/Global PMON Update */ +#define pmon rev_id + VINT32 reset; /* 0E Reset */ + VINT32 prgd_phctl; /* 0F PRGD Positioning/Ctl & HDLC Ctl */ + VINT32 cdrc_cfg; /* 10 CDRC Cfg */ + VINT32 cdrc_ien; /* 11 CDRC Intr Enable */ + VINT32 cdrc_ists; /* 12 CDRC Intr Sts */ + VINT32 cdrc_alos; /* 13 CDRC Alternate Loss of Signal */ + + VINT32 rjat_ists; /* 14 RJAT Intr Sts */ + VINT32 rjat_n1clk; /* 15 RJAT Reference Clk Divisor (N1) Ctl */ + VINT32 rjat_n2clk; /* 16 RJAT Output Clk Divisor (N2) Ctl */ + VINT32 rjat_cfg; /* 17 RJAT Cfg */ + + VINT32 tjat_ists; /* 18 TJAT Intr Sts */ + VINT32 tjat_n1clk; /* 19 TJAT Reference Clk Divisor (N1) Ctl */ + VINT32 tjat_n2clk; /* 1A TJAT Output Clk Divisor (N2) Ctl */ + VINT32 tjat_cfg; /* 1B TJAT Cfg */ + + VINT32 rx_elst_cfg; /* 1C RX-ELST Cfg */ + VINT32 rx_elst_ists; /* 1D RX-ELST Intr Sts */ + VINT32 rx_elst_idle; /* 1E RX-ELST Idle Code */ + VINT32 _rx_elst_res1f; /* 1F RX-ELST Reserved */ + + VINT32 tx_elst_cfg; /* 20 TX-ELST Cfg */ + VINT32 tx_elst_ists; /* 21 TX-ELST Intr Sts */ + VINT32 _tx_elst_res22; /* 22 TX-ELST Reserved */ + VINT32 _tx_elst_res23; /* 23 TX-ELST Reserved */ + VINT32 __res24; /* 24 Reserved */ + VINT32 __res25; /* 25 Reserved */ + VINT32 __res26; /* 26 Reserved */ + VINT32 __res27; /* 27 Reserved */ + + VINT32 rxce1_ctl; /* 28 RXCE RX Data Link 1 Ctl */ + VINT32 rxce1_bits; /* 29 RXCE RX Data Link 1 Bit Select */ + VINT32 rxce2_ctl; /* 2A RXCE RX Data Link 2 Ctl */ + VINT32 rxce2_bits; /* 2B RXCE RX Data Link 2 Bit Select */ + VINT32 rxce3_ctl; /* 2C RXCE RX Data Link 3 Ctl */ + VINT32 rxce3_bits; /* 2D RXCE RX Data Link 3 Bit Select */ + VINT32 _rxce_res2E; /* 2E RXCE Reserved */ + VINT32 _rxce_res2F; /* 2F RXCE Reserved */ + + VINT32 brif_cfg; /* 30 BRIF RX Backplane Cfg */ + VINT32 brif_fpcfg; /* 31 BRIF RX Backplane Frame Pulse Cfg */ + VINT32 brif_pfcfg; /* 32 BRIF RX Backplane Parity/F-Bit Cfg */ + VINT32 brif_tsoff; /* 33 BRIF RX Backplane Time Slot Offset */ + VINT32 brif_boff; /* 34 BRIF RX Backplane Bit Offset */ + VINT32 _brif_res35; /* 35 BRIF RX Backplane Reserved */ + VINT32 _brif_res36; /* 36 BRIF RX Backplane Reserved */ + VINT32 _brif_res37; /* 37 BRIF RX Backplane Reserved */ + + VINT32 txci1_ctl; /* 38 TXCI TX Data Link 1 Ctl */ + VINT32 txci1_bits; /* 39 TXCI TX Data Link 2 Bit Select */ + VINT32 txci2_ctl; /* 3A TXCI TX Data Link 1 Ctl */ + VINT32 txci2_bits; /* 3B TXCI TX Data Link 2 Bit Select */ + VINT32 txci3_ctl; /* 3C TXCI TX Data Link 1 Ctl */ + VINT32 txci3_bits; /* 3D TXCI TX Data Link 2 Bit Select */ + VINT32 _txci_res3E; /* 3E TXCI Reserved */ + VINT32 _txci_res3F; /* 3F TXCI Reserved */ + + VINT32 btif_cfg; /* 40 BTIF TX Backplane Cfg */ + VINT32 btif_fpcfg; /* 41 BTIF TX Backplane Frame Pulse Cfg */ + VINT32 btif_pcfgsts; /* 42 BTIF TX Backplane Parity Cfg & Sts */ + VINT32 btif_tsoff; /* 43 BTIF TX Backplane Time Slot Offset */ + VINT32 btif_boff; /* 44 BTIF TX Backplane Bit Offset */ + VINT32 _btif_res45; /* 45 BTIF TX Backplane Reserved */ + VINT32 _btif_res46; /* 46 BTIF TX Backplane Reserved */ + VINT32 _btif_res47; /* 47 BTIF TX Backplane Reserved */ + VINT32 t1_frmr_cfg; /* 48 T1 FRMR Cfg */ + VINT32 t1_frmr_ien; /* 49 T1 FRMR Intr Enable */ + VINT32 t1_frmr_ists; /* 4A T1 FRMR Intr Sts */ + VINT32 __res_4B; /* 4B Reserved */ + VINT32 ibcd_cfg; /* 4C IBCD Cfg */ + VINT32 ibcd_ies; /* 4D IBCD Intr Enable/Sts */ + VINT32 ibcd_act; /* 4E IBCD Activate Code */ + VINT32 ibcd_deact; /* 4F IBCD Deactivate Code */ + + VINT32 sigx_cfg; /* 50 SIGX Cfg/Change of Signaling State */ + VINT32 sigx_acc_cos; /* 51 SIGX uP Access Sts/Change of Signaling State */ + VINT32 sigx_iac_cos; /* 52 SIGX Channel Indirect + * Addr/Ctl/Change of Signaling State */ + VINT32 sigx_idb_cos; /* 53 SIGX Channel Indirect Data + * Buffer/Change of Signaling State */ + + VINT32 t1_xbas_cfg; /* 54 T1 XBAS Cfg */ + VINT32 t1_xbas_altx; /* 55 T1 XBAS Alarm TX */ + VINT32 t1_xibc_ctl; /* 56 T1 XIBC Ctl */ + VINT32 t1_xibc_lbcode; /* 57 T1 XIBC Loopback Code */ + + VINT32 pmon_ies; /* 58 PMON Intr Enable/Sts */ + VINT32 pmon_fberr; /* 59 PMON Framing Bit Err Cnt */ + VINT32 pmon_feb_lsb; /* 5A PMON OFF/COFA/Far End Block Err Cnt (LSB) */ + VINT32 pmon_feb_msb; /* 5B PMON OFF/COFA/Far End Block Err Cnt (MSB) */ + VINT32 pmon_bed_lsb; /* 5C PMON Bit/Err/CRCE Cnt (LSB) */ + VINT32 pmon_bed_msb; /* 5D PMON Bit/Err/CRCE Cnt (MSB) */ + VINT32 pmon_lvc_lsb; /* 5E PMON LVC Cnt (LSB) */ + VINT32 pmon_lvc_msb; /* 5F PMON LVC Cnt (MSB) */ + + VINT32 t1_almi_cfg; /* 60 T1 ALMI Cfg */ + VINT32 t1_almi_ien; /* 61 T1 ALMI Intr Enable */ + VINT32 t1_almi_ists; /* 62 T1 ALMI Intr Sts */ + VINT32 t1_almi_detsts; /* 63 T1 ALMI Alarm Detection Sts */ + + VINT32 _t1_pdvd_res64; /* 64 T1 PDVD Reserved */ + VINT32 t1_pdvd_ies; /* 65 T1 PDVD Intr Enable/Sts */ + VINT32 _t1_xboc_res66; /* 66 T1 XBOC Reserved */ + VINT32 t1_xboc_code; /* 67 T1 XBOC Code */ + VINT32 _t1_xpde_res68; /* 68 T1 XPDE Reserved */ + VINT32 t1_xpde_ies; /* 69 T1 XPDE Intr Enable/Sts */ + + VINT32 t1_rboc_ena; /* 6A T1 RBOC Enable */ + VINT32 t1_rboc_sts; /* 6B T1 RBOC Code Sts */ + + VINT32 t1_tpsc_cfg; /* 6C TPSC Cfg */ + VINT32 t1_tpsc_sts; /* 6D TPSC uP Access Sts */ + VINT32 t1_tpsc_ciaddr; /* 6E TPSC Channel Indirect + * Addr/Ctl */ + VINT32 t1_tpsc_cidata; /* 6F TPSC Channel Indirect Data + * Buffer */ + VINT32 t1_rpsc_cfg; /* 70 RPSC Cfg */ + VINT32 t1_rpsc_sts; /* 71 RPSC uP Access Sts */ + VINT32 t1_rpsc_ciaddr; /* 72 RPSC Channel Indirect + * Addr/Ctl */ + VINT32 t1_rpsc_cidata; /* 73 RPSC Channel Indirect Data + * Buffer */ + VINT32 __res74; /* 74 Reserved */ + VINT32 __res75; /* 75 Reserved */ + VINT32 __res76; /* 76 Reserved */ + VINT32 __res77; /* 77 Reserved */ + + VINT32 t1_aprm_cfg; /* 78 T1 APRM Cfg/Ctl */ + VINT32 t1_aprm_load; /* 79 T1 APRM Manual Load */ + VINT32 t1_aprm_ists; /* 7A T1 APRM Intr Sts */ + VINT32 t1_aprm_1sec_2; /* 7B T1 APRM One Second Content Octet 2 */ + VINT32 t1_aprm_1sec_3; /* 7C T1 APRM One Second Content Octet 3 */ + VINT32 t1_aprm_1sec_4; /* 7D T1 APRM One Second Content Octet 4 */ + VINT32 t1_aprm_1sec_5; /* 7E T1 APRM One Second Content MSB (Octect 5) */ + VINT32 t1_aprm_1sec_6; /* 7F T1 APRM One Second Content MSB (Octect 6) */ + + VINT32 e1_tran_cfg; /* 80 E1 TRAN Cfg */ + VINT32 e1_tran_txalarm; /* 81 E1 TRAN TX Alarm/Diagnostic Ctl */ + VINT32 e1_tran_intctl; /* 82 E1 TRAN International Ctl */ + VINT32 e1_tran_extrab; /* 83 E1 TRAN Extra Bits Ctl */ + VINT32 e1_tran_ien; /* 84 E1 TRAN Intr Enable */ + VINT32 e1_tran_ists; /* 85 E1 TRAN Intr Sts */ + VINT32 e1_tran_nats; /* 86 E1 TRAN National Bit Codeword + * Select */ + VINT32 e1_tran_nat; /* 87 E1 TRAN National Bit Codeword */ + VINT32 __res88; /* 88 Reserved */ + VINT32 __res89; /* 89 Reserved */ + VINT32 __res8A; /* 8A Reserved */ + VINT32 __res8B; /* 8B Reserved */ + + VINT32 _t1_frmr_res8C; /* 8C T1 FRMR Reserved */ + VINT32 _t1_frmr_res8D; /* 8D T1 FRMR Reserved */ + VINT32 __res8E; /* 8E Reserved */ + VINT32 __res8F; /* 8F Reserved */ + + VINT32 e1_frmr_aopts; /* 90 E1 FRMR Frame Alignment Options */ + VINT32 e1_frmr_mopts; /* 91 E1 FRMR Maintenance Mode Options */ + VINT32 e1_frmr_ien; /* 92 E1 FRMR Framing Sts Intr Enable */ + VINT32 e1_frmr_mien; /* 93 E1 FRMR Maintenance/Alarm Sts Intr Enable */ + VINT32 e1_frmr_ists; /* 94 E1 FRMR Framing Sts Intr Indication */ + VINT32 e1_frmr_mists; /* 95 E1 FRMR Maintenance/Alarm Sts Indication Enable */ + VINT32 e1_frmr_sts; /* 96 E1 FRMR Framing Sts */ + VINT32 e1_frmr_masts; /* 97 E1 FRMR Maintenance/Alarm Sts */ + VINT32 e1_frmr_nat_bits; /* 98 E1 FRMR International/National Bits */ + VINT32 e1_frmr_crc_lsb; /* 99 E1 FRMR CRC Err Cnt - LSB */ + VINT32 e1_frmr_crc_msb; /* 9A E1 FRMR CRC Err Cnt - MSB */ + VINT32 e1_frmr_nat_ien; /* 9B E1 FRMR National Bit Codeword Intr Enables */ + VINT32 e1_frmr_nat_ists; /* 9C E1 FRMR National Bit Codeword Intr/Sts */ + VINT32 e1_frmr_nat; /* 9D E1 FRMR National Bit Codewords */ + VINT32 e1_frmr_fp_ien; /* 9E E1 FRMR Frame Pulse/Alarm Intr Enables */ + VINT32 e1_frmr_fp_ists; /* 9F E1 FRMR Frame Pulse/Alarm Intr/Sts */ + + VINT32 __resA0; /* A0 Reserved */ + VINT32 __resA1; /* A1 Reserved */ + VINT32 __resA2; /* A2 Reserved */ + VINT32 __resA3; /* A3 Reserved */ + VINT32 __resA4; /* A4 Reserved */ + VINT32 __resA5; /* A5 Reserved */ + VINT32 __resA6; /* A6 Reserved */ + VINT32 __resA7; /* A7 Reserved */ + + VINT32 tdpr1_cfg; /* A8 TDPR #1 Cfg */ + VINT32 tdpr1_utl; /* A9 TDPR #1 Upper TX Threshold */ + VINT32 tdpr1_ltl; /* AA TDPR #1 Lower TX Threshold */ + VINT32 tdpr1_ien; /* AB TDPR #1 Intr Enable */ + VINT32 tdpr1_ists; /* AC TDPR #1 Intr Sts/UDR Clear */ + VINT32 tdpr1_data; /* AD TDPR #1 TX Data */ + VINT32 __resAE; /* AE Reserved */ + VINT32 __resAF; /* AF Reserved */ + VINT32 tdpr2_cfg; /* B0 TDPR #2 Cfg */ + VINT32 tdpr2_utl; /* B1 TDPR #2 Upper TX Threshold */ + VINT32 tdpr2_ltl; /* B2 TDPR #2 Lower TX Threshold */ + VINT32 tdpr2_ien; /* B3 TDPR #2 Intr Enable */ + VINT32 tdpr2_ists; /* B4 TDPR #2 Intr Sts/UDR Clear */ + VINT32 tdpr2_data; /* B5 TDPR #2 TX Data */ + VINT32 __resB6; /* B6 Reserved */ + VINT32 __resB7; /* B7 Reserved1 */ + VINT32 tdpr3_cfg; /* B8 TDPR #3 Cfg */ + VINT32 tdpr3_utl; /* B9 TDPR #3 Upper TX Threshold */ + VINT32 tdpr3_ltl; /* BA TDPR #3 Lower TX Threshold */ + VINT32 tdpr3_ien; /* BB TDPR #3 Intr Enable */ + VINT32 tdpr3_ists; /* BC TDPR #3 Intr Sts/UDR Clear */ + VINT32 tdpr3_data; /* BD TDPR #3 TX Data */ + VINT32 __resBE; /* BE Reserved */ + VINT32 __resBF; /* BF Reserved */ + + VINT32 rdlc1_cfg; /* C0 RDLC #1 Cfg */ + VINT32 rdlc1_intctl; /* C1 RDLC #1 Intr Ctl */ + VINT32 rdlc1_sts; /* C2 RDLC #1 Sts */ + VINT32 rdlc1_data; /* C3 RDLC #1 Data */ + VINT32 rdlc1_paddr; /* C4 RDLC #1 Primary Addr Match */ + VINT32 rdlc1_saddr; /* C5 RDLC #1 Secondary Addr Match */ + VINT32 __resC6; /* C6 Reserved */ + VINT32 __resC7; /* C7 Reserved */ + VINT32 rdlc2_cfg; /* C8 RDLC #2 Cfg */ + VINT32 rdlc2_intctl; /* C9 RDLC #2 Intr Ctl */ + VINT32 rdlc2_sts; /* CA RDLC #2 Sts */ + VINT32 rdlc2_data; /* CB RDLC #2 Data */ + VINT32 rdlc2_paddr; /* CC RDLC #2 Primary Addr Match */ + VINT32 rdlc2_saddr; /* CD RDLC #2 Secondary Addr Match */ + VINT32 __resCE; /* CE Reserved */ + VINT32 __resCF; /* CF Reserved */ + VINT32 rdlc3_cfg; /* D0 RDLC #3 Cfg */ + VINT32 rdlc3_intctl; /* D1 RDLC #3 Intr Ctl */ + VINT32 rdlc3_sts; /* D2 RDLC #3 Sts */ + VINT32 rdlc3_data; /* D3 RDLC #3 Data */ + VINT32 rdlc3_paddr; /* D4 RDLC #3 Primary Addr Match */ + VINT32 rdlc3_saddr; /* D5 RDLC #3 Secondary Addr Match */ + + VINT32 csu_cfg; /* D6 CSU Cfg */ + VINT32 _csu_resD7; /* D7 CSU Reserved */ + + VINT32 rlps_idata3; /* D8 RLPS Indirect Data, 24-31 */ + VINT32 rlps_idata2; /* D9 RLPS Indirect Data, 16-23 */ + VINT32 rlps_idata1; /* DA RLPS Indirect Data, 8-15 */ + VINT32 rlps_idata0; /* DB RLPS Indirect Data, 0-7 */ + VINT32 rlps_eqvr; /* DC RLPS Equalizer Voltage Reference + * (E1 missing) */ + VINT32 _rlps_resDD; /* DD RLPS Reserved */ + VINT32 _rlps_resDE; /* DE RLPS Reserved */ + VINT32 _rlps_resDF; /* DF RLPS Reserved */ + + VINT32 prgd_ctl; /* E0 PRGD Ctl */ + VINT32 prgd_ies; /* E1 PRGD Intr Enable/Sts */ + VINT32 prgd_shift_len; /* E2 PRGD Shift Length */ + VINT32 prgd_tap; /* E3 PRGD Tap */ + VINT32 prgd_errin; /* E4 PRGD Err Insertion */ + VINT32 _prgd_resE5; /* E5 PRGD Reserved */ + VINT32 _prgd_resE6; /* E6 PRGD Reserved */ + VINT32 _prgd_resE7; /* E7 PRGD Reserved */ + VINT32 prgd_patin1; /* E8 PRGD Pattern Insertion #1 */ + VINT32 prgd_patin2; /* E9 PRGD Pattern Insertion #2 */ + VINT32 prgd_patin3; /* EA PRGD Pattern Insertion #3 */ + VINT32 prgd_patin4; /* EB PRGD Pattern Insertion #4 */ + VINT32 prgd_patdet1; /* EC PRGD Pattern Detector #1 */ + VINT32 prgd_patdet2; /* ED PRGD Pattern Detector #2 */ + VINT32 prgd_patdet3; /* EE PRGD Pattern Detector #3 */ + VINT32 prgd_patdet4; /* EF PRGD Pattern Detector #4 */ + + VINT32 xlpg_cfg; /* F0 XLPG Line Driver Cfg */ + VINT32 xlpg_ctlsts; /* F1 XLPG Ctl/Sts */ + VINT32 xlpg_pwave_addr; /* F2 XLPG Pulse Waveform Storage Write Addr */ + VINT32 xlpg_pwave_data; /* F3 XLPG Pulse Waveform Storage Data */ + VINT32 xlpg_atest_pctl; /* F4 XLPG Analog Test Positive Ctl */ + VINT32 xlpg_atest_nctl; /* F5 XLPG Analog Test Negative Ctl */ + VINT32 xlpg_fdata_sel; /* F6 XLPG Fuse Data Select */ + VINT32 _xlpg_resF7; /* F7 XLPG Reserved */ + + VINT32 rlps_cfgsts; /* F8 RLPS Cfg & Sts */ + VINT32 rlps_alos_thresh; /* F9 RLPS ALOS Detection/Clearance Threshold */ + VINT32 rlps_alos_dper; /* FA RLPS ALOS Detection Period */ + VINT32 rlps_alos_cper; /* FB RLPS ALOS Clearance Period */ + VINT32 rlps_eq_iaddr; /* FC RLPS Equalization Indirect Addr */ + VINT32 rlps_eq_rwsel; /* FD RLPS Equalization Read/WriteB Select */ + VINT32 rlps_eq_ctlsts; /* FE RLPS Equalizer Loop Sts & Ctl */ + VINT32 rlps_eq_cfg; /* FF RLPS Equalizer Cfg */ +}; + +typedef struct s_comet_reg comet_t; + +/* 00AH: MDIAG Register bit definitions */ +#define COMET_MDIAG_ID5 0x40 +#define COMET_MDIAG_LBMASK 0x3F +#define COMET_MDIAG_PAYLB 0x20 +#define COMET_MDIAG_LINELB 0x10 +#define COMET_MDIAG_RAIS 0x08 +#define COMET_MDIAG_DDLB 0x04 +#define COMET_MDIAG_TXMFP 0x02 +#define COMET_MDIAG_TXLOS 0x01 +#define COMET_MDIAG_LBOFF 0x00 + +#undef VINT32 + +#ifdef __KERNEL__ +extern void +init_comet (void *, comet_t *, u_int32_t, int, u_int8_t); +#endif + +#endif /* _INC_COMET_H_ */ diff --git a/drivers/staging/cxt1e1/comet_tables.c b/drivers/staging/cxt1e1/comet_tables.c new file mode 100644 index 000000000000..db1293c71a6d --- /dev/null +++ b/drivers/staging/cxt1e1/comet_tables.c @@ -0,0 +1,561 @@ +/* + * $Id: comet_tables.c,v 1.2 2005/10/17 23:55:27 rickd PMCC4_3_1B $ + */ + +/*----------------------------------------------------------------------------- + * comet_tables.c - waveform tables for the PM4351 'COMET' + * + * Copyright (C) 2003-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.2 $ + * Last changed on $Date: 2005/10/17 23:55:27 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: comet_tables.c,v $ + * Revision 1.2 2005/10/17 23:55:27 rickd + * Note that 75 Ohm transmit waveform is not supported on PMCC4. + * + * Revision 1.1 2005/09/28 00:10:05 rickd + * Cosmetic alignment of tables for readability. + * + * Revision 1.0 2005/05/10 22:47:53 rickd + * Initial revision + * + *----------------------------------------------------------------------------- + */ + +char SBEid_pmcc4_comet_tblc[] = + "@(#)comet_tables.c - $Revision: 1.2 $ (c) Copyright 2004-2005 SBE, Inc."; + + +#include <linux/types.h> + +/***************************************************************************** +* +* Array names: +* +* TWVLongHaul0DB +* TWVLongHaul7_5DB +* TWVLongHaul15DB +* TWVLongHaul22_5DB +* TWVShortHaul0 +* TWVShortHaul1 +* TWVShortHaul2 +* TWVShortHaul3 +* TWVShortHaul4 +* TWVShortHaul5 +* TWV_E1_120Ohm +* TWV_E1_75Ohm <not supported> +* T1_Equalizer +* E1_Equalizer +* +*****************************************************************************/ + +u_int8_t TWVLongHaul0DB[25][5] =/* T1 Long Haul 0 DB */ +{ + {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */ + {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */ + {0x20, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */ + {0x32, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */ + {0x3E, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */ + {0x3D, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */ + {0x3C, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */ + {0x3B, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */ + {0x39, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */ + {0x39, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */ + {0x38, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */ + {0x37, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */ + {0x36, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */ + {0x34, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */ + {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */ + {0x4F, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */ + {0x4C, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */ + {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */ + {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */ + {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */ + {0x0C} /* PMC's suggested value */ +/* {0x14} Output Amplitude */ +}; + +u_int8_t TWVLongHaul7_5DB[25][5] = /* T1 Long Haul 7.5 DB */ +{ + {0x00, 0x10, 0x00, 0x00, 0x00}, /* Sample 0 */ + {0x01, 0x0E, 0x00, 0x00, 0x00}, /* Sample 1 */ + {0x02, 0x0C, 0x00, 0x00, 0x00}, /* Sample 2 */ + {0x04, 0x0A, 0x00, 0x00, 0x00}, /* Sample 3 */ + {0x08, 0x08, 0x00, 0x00, 0x00}, /* Sample 4 */ + {0x0C, 0x06, 0x00, 0x00, 0x00}, /* Sample 5 */ + {0x10, 0x04, 0x00, 0x00, 0x00}, /* Sample 6 */ + {0x16, 0x02, 0x00, 0x00, 0x00}, /* Sample 7 */ + {0x1A, 0x01, 0x00, 0x00, 0x00}, /* Sample 8 */ + {0x1E, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */ + {0x22, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */ + {0x26, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */ + {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */ + {0x2B, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */ + {0x2C, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */ + {0x2D, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */ + {0x2C, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */ + {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */ + {0x24, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */ + {0x20, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */ + {0x1C, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */ + {0x18, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */ + {0x14, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */ + {0x12, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */ + {0x07} /* PMC's suggested value */ +/* { 0x0A } Output Amplitude */ +}; + +u_int8_t TWVLongHaul15DB[25][5] = /* T1 Long Haul 15 DB */ +{ + {0x00, 0x2A, 0x09, 0x01, 0x00}, /* Sample 0 */ + {0x00, 0x28, 0x08, 0x01, 0x00}, /* Sample 1 */ + {0x00, 0x26, 0x08, 0x01, 0x00}, /* Sample 2 */ + {0x00, 0x24, 0x07, 0x01, 0x00}, /* Sample 3 */ + {0x01, 0x22, 0x07, 0x01, 0x00}, /* Sample 4 */ + {0x02, 0x20, 0x06, 0x01, 0x00}, /* Sample 5 */ + {0x04, 0x1E, 0x06, 0x01, 0x00}, /* Sample 6 */ + {0x07, 0x1C, 0x05, 0x00, 0x00}, /* Sample 7 */ + {0x0A, 0x1B, 0x05, 0x00, 0x00}, /* Sample 8 */ + {0x0D, 0x19, 0x05, 0x00, 0x00}, /* Sample 9 */ + {0x10, 0x18, 0x04, 0x00, 0x00}, /* Sample 10 */ + {0x14, 0x16, 0x04, 0x00, 0x00}, /* Sample 11 */ + {0x18, 0x15, 0x04, 0x00, 0x00}, /* Sample 12 */ + {0x1B, 0x13, 0x03, 0x00, 0x00}, /* Sample 13 */ + {0x1E, 0x12, 0x03, 0x00, 0x00}, /* Sample 14 */ + {0x21, 0x10, 0x03, 0x00, 0x00}, /* Sample 15 */ + {0x24, 0x0F, 0x03, 0x00, 0x00}, /* Sample 16 */ + {0x27, 0x0D, 0x03, 0x00, 0x00}, /* Sample 17 */ + {0x2A, 0x0D, 0x02, 0x00, 0x00}, /* Sample 18 */ + {0x2D, 0x0B, 0x02, 0x00, 0x00}, /* Sample 19 */ + {0x30, 0x0B, 0x02, 0x00, 0x00}, /* Sample 20 */ + {0x30, 0x0A, 0x02, 0x00, 0x00}, /* Sample 21 */ + {0x2E, 0x0A, 0x02, 0x00, 0x00}, /* Sample 22 */ + {0x2C, 0x09, 0x02, 0x00, 0x00}, /* Sample 23 */ + {0x03} /* Output Amplitude */ +}; + +u_int8_t TWVLongHaul22_5DB[25][5] = /* T1 Long Haul 22.5 DB */ +{ + {0x00, 0x1F, 0x16, 0x06, 0x01}, /* Sample 0 */ + {0x00, 0x20, 0x15, 0x05, 0x01}, /* Sample 1 */ + {0x00, 0x21, 0x15, 0x05, 0x01}, /* Sample 2 */ + {0x00, 0x22, 0x14, 0x05, 0x01}, /* Sample 3 */ + {0x00, 0x22, 0x13, 0x04, 0x00}, /* Sample 4 */ + {0x00, 0x23, 0x12, 0x04, 0x00}, /* Sample 5 */ + {0x01, 0x23, 0x12, 0x04, 0x00}, /* Sample 6 */ + {0x01, 0x24, 0x11, 0x03, 0x00}, /* Sample 7 */ + {0x01, 0x23, 0x10, 0x03, 0x00}, /* Sample 8 */ + {0x02, 0x23, 0x10, 0x03, 0x00}, /* Sample 9 */ + {0x03, 0x22, 0x0F, 0x03, 0x00}, /* Sample 10 */ + {0x05, 0x22, 0x0E, 0x03, 0x00}, /* Sample 11 */ + {0x07, 0x21, 0x0E, 0x02, 0x00}, /* Sample 12 */ + {0x09, 0x20, 0x0D, 0x02, 0x00}, /* Sample 13 */ + {0x0B, 0x1E, 0x0C, 0x02, 0x00}, /* Sample 14 */ + {0x0E, 0x1D, 0x0C, 0x02, 0x00}, /* Sample 15 */ + {0x10, 0x1B, 0x0B, 0x02, 0x00}, /* Sample 16 */ + {0x13, 0x1B, 0x0A, 0x02, 0x00}, /* Sample 17 */ + {0x15, 0x1A, 0x0A, 0x02, 0x00}, /* Sample 18 */ + {0x17, 0x19, 0x09, 0x01, 0x00}, /* Sample 19 */ + {0x19, 0x19, 0x08, 0x01, 0x00}, /* Sample 20 */ + {0x1B, 0x18, 0x08, 0x01, 0x00}, /* Sample 21 */ + {0x1D, 0x17, 0x07, 0x01, 0x00}, /* Sample 22 */ + {0x1E, 0x17, 0x06, 0x01, 0x00}, /* Sample 23 */ + {0x02} /* Output Amplitude */ +}; + +u_int8_t TWVShortHaul0[25][5] = /* T1 Short Haul 0 - 110 ft */ +{ + {0x00, 0x45, 0x00, 0x00, 0x00}, /* Sample 0 */ + {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */ + {0x20, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */ + {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */ + {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */ + {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */ + {0x3C, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */ + {0x3B, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */ + {0x39, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */ + {0x39, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */ + {0x38, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */ + {0x37, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */ + {0x36, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */ + {0x34, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */ + {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */ + {0x59, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */ + {0x55, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */ + {0x50, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */ + {0x4D, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */ + {0x48, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */ + {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */ + {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */ + {0x0C} /* Output Amplitude */ +}; + +u_int8_t TWVShortHaul1[25][5] = /* T1 Short Haul 110 - 220 ft */ +{ + {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */ + {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */ + {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */ + {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */ + {0x36, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */ + {0x34, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */ + {0x30, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */ + {0x2F, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */ + {0x2E, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */ + {0x2D, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */ + {0x2C, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */ + {0x2B, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */ + {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */ + {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */ + {0x26, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */ + {0x68, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */ + {0x54, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */ + {0x4F, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */ + {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */ + {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */ + {0x10} /* Output Amplitude */ +}; + +u_int8_t TWVShortHaul2[25][5] = /* T1 Short Haul 220 - 330 ft */ +{ + {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */ + {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */ + {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */ + {0x3A, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */ + {0x3A, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */ + {0x38, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */ + {0x30, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */ + {0x2F, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */ + {0x2E, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */ + {0x2D, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */ + {0x2C, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */ + {0x2B, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */ + {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */ + {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */ + {0x23, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */ + {0x6C, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */ + {0x60, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */ + {0x4F, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */ + {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */ + {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */ + {0x11} /* Output Amplitude */ +}; + +u_int8_t TWVShortHaul3[25][5] = /* T1 Short Haul 330 - 440 ft */ +{ + {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */ + {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */ + {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */ + {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */ + {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */ + {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */ + {0x2F, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */ + {0x2E, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */ + {0x2D, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */ + {0x2C, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */ + {0x2B, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */ + {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */ + {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */ + {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */ + {0x19, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */ + {0x7F, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */ + {0x60, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */ + {0x4F, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */ + {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */ + {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */ + {0x12} /* Output Amplitude */ +}; + +u_int8_t TWVShortHaul4[25][5] = /* T1 Short Haul 440 - 550 ft */ +{ + {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */ + {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */ + {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */ + {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */ + {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */ + {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */ + {0x30, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */ + {0x2B, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */ + {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */ + {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */ + {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */ + {0x27, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */ + {0x26, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */ + {0x26, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */ + {0x24, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */ + {0x7F, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */ + {0x7F, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */ + {0x4F, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */ + {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */ + {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */ + {0x14} /* Output Amplitude */ +}; + +u_int8_t TWVShortHaul5[25][5] = /* T1 Short Haul 550 - 660 ft */ +{ + {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */ + {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */ + {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */ + {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */ + {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */ + {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */ + {0x3F, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */ + {0x30, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */ + {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */ + {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */ + {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */ + {0x27, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */ + {0x26, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */ + {0x25, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */ + {0x24, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */ + {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */ + {0x7F, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */ + {0x7F, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */ + {0x5F, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */ + {0x50, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */ + {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */ + {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */ + {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */ + {0x15} /* Output Amplitude */ +}; + +u_int8_t TWV_E1_120Ohm[25][5] = /* E1 120 Ohm */ +{ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 0 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 1 */ + {0x0A, 0x00, 0x00, 0x00, 0x00}, /* Sample 2 */ + {0x3F, 0x00, 0x00, 0x00, 0x00}, /* Sample 3 */ + {0x3F, 0x00, 0x00, 0x00, 0x00}, /* Sample 4 */ + {0x39, 0x00, 0x00, 0x00, 0x00}, /* Sample 5 */ + {0x38, 0x00, 0x00, 0x00, 0x00}, /* Sample 6 */ + {0x36, 0x00, 0x00, 0x00, 0x00}, /* Sample 7 */ + {0x36, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */ + {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */ + {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */ + {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */ + {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */ + {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */ + {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */ + {0x2D, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */ + {0x0C} /* PMC's suggested value */ +/* { 0x10 } Output Amplitude */ +}; + + + +u_int8_t TWV_E1_75Ohm[25][5] = /* E1 75 Ohm */ +{ +#ifdef PMCC4_DOES_NOT_SUPPORT + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 0 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 1 */ + {0x0A, 0x00, 0x00, 0x00, 0x00}, /* Sample 2 */ + {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 3 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 4 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 5 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 6 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 7 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */ + {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */ + {0x32, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */ + {0x14, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */ + {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */ +#endif + {0x0C} /* Output Amplitude */ +}; + + +u_int32_t T1_Equalizer[256] = /* T1 Receiver Equalizer */ +{ + 0x03FE1840, 0x03F61840, 0x03EE1840, 0x03E61840, /* 000 - 003 */ + 0x03DE1840, 0x03D61840, 0x03D61840, 0x03D61840, /* 004 - 007 */ + 0x03CE1840, 0x03CE1840, 0x03CE1840, 0x03CE1840, /* 008 - 011 */ + 0x03C61840, 0x03C61840, 0x03C61840, 0x0BBE1840, /* 012 - 015 */ + 0x0BBE1840, 0x0BBE1840, 0x0BBE1840, 0x0BB61840, /* 016 - 019 */ + 0x0BB61840, 0x0BB61840, 0x0BB61840, 0x13AE1838, /* 020 - 023 */ + 0x13AE183C, 0x13AE1840, 0x13AE1840, 0x13AE1840, /* 024 - 027 */ + 0x13AE1840, 0x1BB618B8, 0x1BAE18B8, 0x1BAE18BC, /* 028 - 031 */ + 0x1BAE18C0, 0x1BAE18C0, 0x23A618C0, 0x23A618C0, /* 032 - 035 */ + 0x23A618C0, 0x23A618C0, 0x23A618C0, 0x239E18C0, /* 036 - 039 */ + 0x239E18C0, 0x239E18C0, 0x239E18C0, 0x239E18C0, /* 040 - 043 */ + 0x2B9618C0, 0x2B9618C0, 0x2B9618C0, 0x33961940, /* 044 - 047 */ + 0x37961940, 0x37961940, 0x37961940, 0x3F9E19C0, /* 048 - 051 */ + 0x3F9E19C0, 0x3F9E19C0, 0x3FA61A40, 0x3FA61A40, /* 052 - 055 */ + 0x3FA61A40, 0x3FA61A40, 0x3F9619C0, 0x3F9619C0, /* 056 - 059 */ + 0x3F9619C0, 0x3F9619C0, 0x479E1A40, 0x479E1A40, /* 060 - 063 */ + 0x479E1A40, 0x47961A40, 0x47961A40, 0x47961A40, /* 064 - 067 */ + 0x47961A40, 0x4F8E1A40, 0x4F8E1A40, 0x4F8E1A40, /* 068 - 071 */ + 0x4F8E1A40, 0x4F8E1A40, 0x57861A40, 0x57861A40, /* 072 - 075 */ + 0x57861A40, 0x57861A40, 0x57861A40, 0x5F861AC0, /* 076 - 079 */ + 0x5F861AC0, 0x5F861AC0, 0x5F861AC0, 0x5F861AC0, /* 080 - 083 */ + 0x5F861AC0, 0x5F7E1AC0, 0x5F7E1AC0, 0x5F7E1AC0, /* 084 - 087 */ + 0x5F7E1AC0, 0x5F7E1AC0, 0x677E2AC0, 0x677E2AC0, /* 088 - 091 */ + 0x677E2AC0, 0x677E2AC0, 0x67762AC0, 0x67762AC0, /* 092 - 095 */ + 0x67762AC0, 0x67762AC0, 0x67762AC0, 0x6F6E2AC0, /* 096 - 099 */ + 0x6F6E2AC0, 0x6F6E2AC0, 0x6F6E2AC0, 0x776E3AC0, /* 100 - 103 */ + 0x776E3AC0, 0x776E3AC0, 0x776E3AC0, 0x7F663AC0, /* 104 - 107 */ + 0x7F663AC0, 0x7F664AC0, 0x7F664AC0, 0x7F664AC0, /* 108 - 111 */ + 0x7F664AC0, 0x87665AC0, 0x87665AC0, 0x87665AC0, /* 112 - 115 */ + 0x87665AC0, 0x87665AC0, 0x875E5AC0, 0x875E5AC0, /* 116 - 119 */ + 0x875E5AC0, 0x875E5AC0, 0x875E5AC0, 0x8F5E6AC0, /* 120 - 123 */ + 0x8F5E6AC0, 0x8F5E6AC0, 0x8F5E6AC0, 0x975E7AC0, /* 124 - 127 */ + 0x975E7AC0, 0x975E7AC0, 0x975E7AC0, 0x9F5E8AC0, /* 128 - 131 */ + 0x9F5E8AC0, 0x9F5E8AC0, 0x9F5E8AC0, 0x9F5E8AC0, /* 132 - 135 */ + 0xA7569AC0, 0xA7569AC0, 0xA7569AC0, 0xA7569AC0, /* 136 - 139 */ + 0xA756AAC0, 0xA756AAC0, 0xA756AAC0, 0xAF4EAAC0, /* 140 - 143 */ + 0xAF4EAAC0, 0xAF4EAAC0, 0xAF4EAAC0, 0xAF4EAAC0, /* 144 - 147 */ + 0xB746AAC0, 0xB746AAC0, 0xB746AAC0, 0xB746AAC0, /* 148 - 151 */ + 0xB746AAC0, 0xB746AAC0, 0xB746AAC0, 0xB746BAC0, /* 152 - 155 */ + 0xB746BAC0, 0xB746BAC0, 0xBF4EBB40, 0xBF4EBB40, /* 156 - 159 */ + 0xBF4EBB40, 0xBF4EBB40, 0xBF4EBB40, 0xBF4EBB40, /* 160 - 163 */ + 0xBF4EBB40, 0xBF4EBB40, 0xBF4EBB40, 0xBE46CB40, /* 164 - 167 */ + 0xBE46CB40, 0xBE46CB40, 0xBE46CB40, 0xBE46CB40, /* 168 - 171 */ + 0xBE46CB40, 0xBE46DB40, 0xBE46DB40, 0xBE46DB40, /* 172 - 175 */ + 0xC63ECB40, 0xC63ECB40, 0xC63EDB40, 0xC63EDB40, /* 176 - 179 */ + 0xC63EDB40, 0xC644DB40, 0xC644DB40, 0xC644DB40, /* 180 - 183 */ + 0xC644DB40, 0xC63CDB40, 0xC63CDB40, 0xC63CDB40, /* 184 - 187 */ + 0xC63CDB40, 0xD634DB40, 0xD634DB40, 0xD634DB40, /* 188 - 191 */ + 0xD634DB40, 0xD634DB40, 0xDE2CDB3C, 0xDE2CDB3C, /* 192 - 195 */ + 0xDE2CDB3C, 0xE62CDB40, 0xE62CDB40, 0xE62CDB40, /* 196 - 199 */ + 0xE62CDB40, 0xE62CDB40, 0xE62CEB40, 0xE62CEB40, /* 200 - 203 */ + 0xE62CEB40, 0xEE2CFB40, 0xEE2CFB40, 0xEE2CFB40, /* 204 - 207 */ + 0xEE2D0B40, 0xEE2D0B40, 0xEE2D0B40, 0xEE2D0B40, /* 208 - 211 */ + 0xEE2D0B40, 0xF5250B38, 0xF5250B3C, 0xF5250B40, /* 212 - 215 */ + 0xF5251B40, 0xF5251B40, 0xF5251B40, 0xF5251B40, /* 216 - 219 */ + 0xF5251B40, 0xFD252B40, 0xFD252B40, 0xFD252B40, /* 220 - 223 */ + 0xFD252B40, 0xFD252740, 0xFD252740, 0xFD252740, /* 224 - 227 */ + 0xFD252340, 0xFD252340, 0xFD252340, 0xFD253340, /* 228 - 231 */ + 0xFD253340, 0xFD253340, 0xFD253340, 0xFD253340, /* 232 - 235 */ + 0xFD253340, 0xFD253340, 0xFD253340, 0xFC254340, /* 236 - 239 */ + 0xFD254340, 0xFD254340, 0xFD254344, 0xFC254348, /* 240 - 243 */ + 0xFC25434C, 0xFD2543BC, 0xFD2543C0, 0xFC2543C0, /* 244 - 247 */ + 0xFC2343C0, 0xFC2343C0, 0xFD2343C0, 0xFC2143C0, /* 248 - 251 */ + 0xFC2143C0, 0xFC2153C0, 0xFD2153C0, 0xFC2153C0 /* 252 - 255 */ +}; + + +u_int32_t E1_Equalizer[256] = /* E1 Receiver Equalizer */ +{ + 0x07DE182C, 0x07DE182C, 0x07D6182C, 0x07D6182C, /* 000 - 003 */ + 0x07D6182C, 0x07CE182C, 0x07CE182C, 0x07CE182C, /* 004 - 007 */ + 0x07C6182C, 0x07C6182C, 0x07C6182C, 0x07BE182C, /* 008 - 011 */ + 0x07BE182C, 0x07BE182C, 0x07BE182C, 0x07BE182C, /* 012 - 015 */ + 0x07B6182C, 0x07B6182C, 0x07B6182C, 0x07B6182C, /* 016 - 019 */ + 0x07B6182C, 0x07AE182C, 0x07AE182C, 0x07AE182C, /* 020 - 023 */ + 0x07AE182C, 0x07AE182C, 0x07B618AC, 0x07AE18AC, /* 024 - 027 */ + 0x07AE18AC, 0x07AE18AC, 0x07AE18AC, 0x07A618AC, /* 028 - 031 */ + 0x07A618AC, 0x07A618AC, 0x07A618AC, 0x079E18AC, /* 032 - 035 */ + 0x07A6192C, 0x07A6192C, 0x07A6192C, 0x0FA6192C, /* 036 - 039 */ + 0x0FA6192C, 0x0F9E192C, 0x0F9E192C, 0x0F9E192C, /* 040 - 043 */ + 0x179E192C, 0x17A619AC, 0x179E19AC, 0x179E19AC, /* 044 - 047 */ + 0x179619AC, 0x1F9619AC, 0x1F9619AC, 0x1F8E19AC, /* 048 - 051 */ + 0x1F8E19AC, 0x1F8E19AC, 0x278E19AC, 0x278E1A2C, /* 052 - 055 */ + 0x278E1A2C, 0x278E1A2C, 0x278E1A2C, 0x2F861A2C, /* 056 - 059 */ + 0x2F861A2C, 0x2F861A2C, 0x2F7E1A2C, 0x2F7E1A2C, /* 060 - 063 */ + 0x2F7E1A2C, 0x377E1A2C, 0x377E1AAC, 0x377E1AAC, /* 064 - 067 */ + 0x377E1AAC, 0x377E1AAC, 0x3F7E2AAC, 0x3F7E2AAC, /* 068 - 071 */ + 0x3F762AAC, 0x3F862B2C, 0x3F7E2B2C, 0x477E2B2C, /* 072 - 075 */ + 0x477E2F2C, 0x477E2F2C, 0x477E2F2C, 0x47762F2C, /* 076 - 079 */ + 0x4F762F2C, 0x4F762F2C, 0x4F6E2F2C, 0x4F6E2F2C, /* 080 - 083 */ + 0x4F6E2F2C, 0x576E2F2C, 0x576E2F2C, 0x576E3F2C, /* 084 - 087 */ + 0x576E3F2C, 0x576E3F2C, 0x5F6E3F2C, 0x5F6E4F2C, /* 088 - 091 */ + 0x5F6E4F2C, 0x5F6E4F2C, 0x5F664F2C, 0x67664F2C, /* 092 - 095 */ + 0x67664F2C, 0x675E4F2C, 0x675E4F2C, 0x67664F2C, /* 096 - 099 */ + 0x67664F2C, 0x67665F2C, 0x6F6E5F2C, 0x6F6E6F2C, /* 100 - 103 */ + 0x6F6E6F2C, 0x6F6E7F2C, 0x6F6E7F2C, 0x6F6E7F2C, /* 104 - 107 */ + 0x77667F2C, 0x77667F2C, 0x775E6F2C, 0x775E7F2C, /* 108 - 111 */ + 0x775E7F2C, 0x7F5E7F2C, 0x7F5E8F2C, 0x7F5E8F2C, /* 112 - 115 */ + 0x7F5E8F2C, 0x87568F2C, 0x87568F2C, 0x87568F2C, /* 116 - 119 */ + 0x874E8F2C, 0x874E8F2C, 0x874E8F2C, 0x8F4E9F2C, /* 120 - 123 */ + 0x8F4E9F2C, 0x8F4EAF2C, 0x8F4EAF2C, 0x8F4EAF2C, /* 124 - 127 */ + 0x974EAF2C, 0x974EAF2C, 0x974EAB2C, 0x974EAB2C, /* 128 - 131 */ + 0x974EAB2C, 0x9F4EAB2C, 0x9F4EBB2C, 0x9F4EBB2C, /* 132 - 135 */ + 0x9F4EBB2C, 0x9F4ECB2C, 0xA74ECB2C, 0xA74ECB2C, /* 136 - 139 */ + 0xA746CB2C, 0xA746CB2C, 0xA746CB2C, 0xA746DB2C, /* 140 - 143 */ + 0xAF46DB2C, 0xAF46EB2C, 0xAF46EB2C, 0xAF4EEB2C, /* 144 - 147 */ + 0xAE4EEB2C, 0xAE4EEB2C, 0xB546FB2C, 0xB554FB2C, /* 148 - 151 */ + 0xB54CEB2C, 0xB554FB2C, 0xB554FB2C, 0xBD54FB2C, /* 152 - 155 */ + 0xBD4CFB2C, 0xBD4CFB2C, 0xBD4CFB2C, 0xBD44EB2C, /* 156 - 159 */ + 0xC544FB2C, 0xC544FB2C, 0xC544FB2C, 0xC5450B2C, /* 160 - 163 */ + 0xC5450B2C, 0xC5450B2C, 0xCD450B2C, 0xCD450B2C, /* 164 - 167 */ + 0xCD3D0B2C, 0xCD3D0B2C, 0xCD3D0B2C, 0xD53D0B2C, /* 168 - 171 */ + 0xD53D0B2C, 0xD53D1B2C, 0xD53D1B2C, 0xD53D1B2C, /* 172 - 175 */ + 0xDD3D1B2C, 0xDD3D1B2C, 0xDD351B2C, 0xDD351B2C, /* 176 - 179 */ + 0xDD351B2C, 0xE5351B2C, 0xE5351B2C, 0xE52D1B2C, /* 180 - 183 */ + 0xE52D1B2C, 0xE52D3B2C, 0xED2D4B2C, 0xED2D1BA8, /* 184 - 187 */ + 0xED2D1BAC, 0xED2D17AC, 0xED2D17AC, 0xED2D27AC, /* 188 - 191 */ + 0xF52D27AC, 0xF52D27AC, 0xF52D2BAC, 0xF52D2BAC, /* 192 - 195 */ + 0xF52D2BAC, 0xFD2D2BAC, 0xFD2B2BAC, 0xFD2B2BAC, /* 196 - 199 */ + 0xFD2B2BAC, 0xFD2B2BAC, 0xFD232BAC, 0xFD232BAC, /* 200 - 203 */ + 0xFD232BAC, 0xFD212BAC, 0xFD212BAC, 0xFD292BAC, /* 204 - 207 */ + 0xFD292BAC, 0xFD2927AC, 0xFD2937AC, 0xFD2923AC, /* 208 - 211 */ + 0xFD2923AC, 0xFD2923AC, 0xFD2923AC, 0xFD2123AC, /* 212 - 215 */ + 0xFD2123AC, 0xFD2123AC, 0xFD2133AC, 0xFD2133AC, /* 216 - 219 */ + 0xFD2133AC, 0xFD2143AC, 0xFD2143AC, 0xFD2143AC, /* 220 - 223 */ + 0xFC2143AC, 0xFC2143AC, 0xFC1943AC, 0xFC1943AC, /* 224 - 227 */ + 0xFC1943AC, 0xFC1943AC, 0xFC1953AC, 0xFC1953AC, /* 228 - 231 */ + 0xFC1953AC, 0xFC1953AC, 0xFC1963AC, 0xFC1963AC, /* 232 - 235 */ + 0xFC1963AC, 0xFC1973AC, 0xFC1973AC, 0xFC1973AC, /* 236 - 239 */ + 0xFC1973AC, 0xFC1973AC, 0xFC1983AC, 0xFC1983AC, /* 240 - 243 */ + 0xFC1983AC, 0xFC1983AC, 0xFC1983AC, 0xFC1993AC, /* 244 - 247 */ + 0xFC1993AC, 0xFC1993AC, 0xFC19A3AC, 0xFC19A3AC, /* 248 - 251 */ + 0xFC19B3AC, 0xFC19B3AC, 0xFC19B3AC, 0xFC19B3AC /* 252 - 255 */ +}; + +/*** End-of-Files ***/ diff --git a/drivers/staging/cxt1e1/comet_tables.h b/drivers/staging/cxt1e1/comet_tables.h new file mode 100644 index 000000000000..80424a26a169 --- /dev/null +++ b/drivers/staging/cxt1e1/comet_tables.h @@ -0,0 +1,85 @@ +/* + * $Id: comet_tables.h,v 1.5 2006/01/02 22:37:31 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_COMET_TBLS_H_ +#define _INC_COMET_TBLS_H_ + +/*----------------------------------------------------------------------------- + * comet_tables.h - Waveform Tables for the PM4351 'COMET' + * + * Copyright (C) 2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.5 $ + * Last changed on $Date: 2006/01/02 22:37:31 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: comet_tables.h,v $ + * Revision 1.5 2006/01/02 22:37:31 rickd + * Double indexed arrays need sizings to avoid CC errors under + * gcc 4.0.0 + * + * Revision 1.4 2005/10/17 23:55:28 rickd + * The 75 Ohm transmit waveform is not supported on PMCC4. + * + * Revision 1.3 2005/09/28 00:10:08 rickd + * Add GNU License info. Structures moved to -C- file. + * + * Revision 1.2 2005/04/28 23:43:04 rickd + * Add RCS tracking heading. + * + *----------------------------------------------------------------------------- + */ + + +/***************************************************************************** +* +* Array names: +* +* TWVLongHaul0DB +* TWVLongHaul7_5DB +* TWVLongHaul15DB +* TWVLongHaul22_5DB +* TWVShortHaul0 +* TWVShortHaul1 +* TWVShortHaul2 +* TWVShortHaul3 +* TWVShortHaul4 +* TWVShortHaul5 +* TWV_E1_120Ohm +* TWV_E1_75Ohm <not supported> +* T1_Equalizer +* E1_Equalizer +* +*****************************************************************************/ + +extern u_int8_t TWVLongHaul0DB[25][5]; /* T1 Long Haul 0 DB */ +extern u_int8_t TWVLongHaul7_5DB[25][5]; /* T1 Long Haul 7.5 DB */ +extern u_int8_t TWVLongHaul15DB[25][5]; /* T1 Long Haul 15 DB */ +extern u_int8_t TWVLongHaul22_5DB[25][5]; /* T1 Long Haul 22.5 DB */ +extern u_int8_t TWVShortHaul0[25][5]; /* T1 Short Haul 0-110 ft */ +extern u_int8_t TWVShortHaul1[25][5]; /* T1 Short Haul 110-220 ft */ +extern u_int8_t TWVShortHaul2[25][5]; /* T1 Short Haul 220-330 ft */ +extern u_int8_t TWVShortHaul3[25][5]; /* T1 Short Haul 330-440 ft */ +extern u_int8_t TWVShortHaul4[25][5]; /* T1 Short Haul 440-550 ft */ +extern u_int8_t TWVShortHaul5[25][5]; /* T1 Short Haul 550-660 ft */ +extern u_int8_t TWV_E1_75Ohm[25][5]; /* E1 75 Ohm */ +extern u_int8_t TWV_E1_120Ohm[25][5]; /* E1 120 Ohm */ +extern u_int32_t T1_Equalizer[256]; /* T1 Receiver Equalizer */ +extern u_int32_t E1_Equalizer[256]; /* E1 Receiver Equalizer */ + +#endif /* _INC_COMET_TBLS_H_ */ diff --git a/drivers/staging/cxt1e1/functions.c b/drivers/staging/cxt1e1/functions.c new file mode 100644 index 000000000000..c95c62dfb04b --- /dev/null +++ b/drivers/staging/cxt1e1/functions.c @@ -0,0 +1,366 @@ +/* Copyright (C) 2003-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/slab.h> +#include <asm/io.h> +#include <asm/byteorder.h> +#include <linux/netdevice.h> +#include <linux/delay.h> +#include <linux/hdlc.h> +#include "pmcc4_sysdep.h" +#include "sbecom_inline_linux.h" +#include "libsbew.h" +#include "pmcc4.h" + + +#ifdef SBE_INCLUDE_SYMBOLS +#define STATIC +#else +#define STATIC static +#endif + +#if defined(CONFIG_SBE_HDLC_V7) || defined(CONFIG_SBE_WAN256T3_HDLC_V7) || \ + defined(CONFIG_SBE_HDLC_V7_MODULE) || defined(CONFIG_SBE_WAN256T3_HDLC_V7_MODULE) +#define _v7_hdlc_ 1 +#else +#define _v7_hdlc_ 0 +#endif + +#if _v7_hdlc_ +#define V7(x) (x ## _v7) +extern int hdlc_netif_rx_v7 (hdlc_device *, struct sk_buff *); +extern int register_hdlc_device_v7 (hdlc_device *); +extern int unregister_hdlc_device_v7 (hdlc_device *); + +#else +#define V7(x) x +#endif + + +#ifndef USE_MAX_INT_DELAY +static int dummy = 0; + +#endif + +extern int log_level; +extern int drvr_state; + + +#if 1 +u_int32_t +pci_read_32 (u_int32_t *p) +{ +#ifdef FLOW_DEBUG + u_int32_t v; + + FLUSH_PCI_READ (); + v = le32_to_cpu (*p); + if (log_level >= LOG_DEBUG) + printk ("pci_read : %x = %x\n", (u_int32_t) p, v); + return v; +#else + FLUSH_PCI_READ (); /* */ + return le32_to_cpu (*p); +#endif +} + +void +pci_write_32 (u_int32_t *p, u_int32_t v) +{ +#ifdef FLOW_DEBUG + if (log_level >= LOG_DEBUG) + printk ("pci_write: %x = %x\n", (u_int32_t) p, v); +#endif + *p = cpu_to_le32 (v); + FLUSH_PCI_WRITE (); /* This routine is called from routines + * which do multiple register writes + * which themselves need flushing between + * writes in order to guarantee write + * ordering. It is less code-cumbersome + * to flush here-in then to investigate + * and code the many other register + * writing routines. */ +} +#endif + + +void +pci_flush_write (ci_t * ci) +{ + volatile u_int32_t v; + + /* issue a PCI read to flush PCI write thru bridge */ + v = *(u_int32_t *) &ci->reg->glcd; /* any address would do */ + + /* + * return nothing, this just reads PCI bridge interface to flush + * previously written data + */ +} + + +STATIC void +watchdog_func (unsigned long arg) +{ + struct watchdog *wd = (void *) arg; + + if (drvr_state != SBE_DRVR_AVAILABLE) + { + if (log_level >= LOG_MONITOR) + printk (KERN_WARNING "watchdog_func: drvr not available (%x)\n", drvr_state); + return; + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + /* Initialize the tq entry only the first time */ + if (wd->init_tq) + { + wd->init_tq = 0; + wd->tq.routine = wd->func; + wd->tq.sync = 0; + wd->tq.data = wd->softc; + } + schedule_task (&wd->tq); +#else + schedule_work (&wd->work); +#endif + mod_timer (&wd->h, jiffies + wd->ticks); +} + +int OS_init_watchdog(struct watchdog *wdp, void (*f) (void *), void *c, int usec) +{ + wdp->func = f; + wdp->softc = c; + wdp->ticks = (HZ) * (usec / 1000) / 1000; + INIT_WORK(&wdp->work, (void *)f); + init_timer (&wdp->h); + { + ci_t *ci = (ci_t *) c; + + wdp->h.data = (unsigned long) &ci->wd; + } + wdp->h.function = watchdog_func; + return 0; +} + +void +OS_uwait (int usec, char *description) +{ + int tmp; + + if (usec >= 1000) + { + mdelay (usec / 1000); + /* now delay residual */ + tmp = (usec / 1000) * 1000; /* round */ + tmp = usec - tmp; /* residual */ + if (tmp) + { /* wait on residual */ + udelay (tmp); + } + } else + { + udelay (usec); + } +} + +/* dummy short delay routine called as a subroutine so that compiler + * does not optimize/remove its intent (a short delay) + */ + +void +OS_uwait_dummy (void) +{ +#ifndef USE_MAX_INT_DELAY + dummy++; +#else + udelay (1); +#endif +} + + +void +OS_sem_init (void *sem, int state) +{ + switch (state) + { + case SEM_TAKEN: + init_MUTEX_LOCKED ((struct semaphore *) sem); + break; + case SEM_AVAILABLE: + init_MUTEX ((struct semaphore *) sem); + break; + default: /* otherwise, set sem.count to state's + * value */ + sema_init (sem, state); + break; + } +} + + +int +sd_line_is_ok (void *user) +{ + struct net_device *ndev = (struct net_device *) user; + + return (netif_carrier_ok (ndev)); +} + +void +sd_line_is_up (void *user) +{ + struct net_device *ndev = (struct net_device *) user; + + netif_carrier_on (ndev); + return; +} + +void +sd_line_is_down (void *user) +{ + struct net_device *ndev = (struct net_device *) user; + + netif_carrier_off (ndev); + return; +} + +void +sd_disable_xmit (void *user) +{ + struct net_device *dev = (struct net_device *) user; + + netif_stop_queue (dev); + return; +} + +void +sd_enable_xmit (void *user) +{ + struct net_device *dev = (struct net_device *) user; + + netif_wake_queue (dev); + return; +} + +int +sd_queue_stopped (void *user) +{ + struct net_device *ndev = (struct net_device *) user; + + return (netif_queue_stopped (ndev)); +} + +void sd_recv_consume(void *token, size_t len, void *user) +{ + struct net_device *ndev = user; + struct sk_buff *skb = token; + + skb->dev = ndev; + skb_put (skb, len); + skb->protocol = hdlc_type_trans(skb, ndev); + netif_rx(skb); +} + + +/** + ** Read some reserved location w/in the COMET chip as a usable + ** VMETRO trigger point or other trace marking event. + **/ + +#include "comet.h" + +extern ci_t *CI; /* dummy pointer to board ZERO's data */ +void +VMETRO_TRACE (void *x) +{ + u_int32_t y = (u_int32_t) x; + + pci_write_32 ((u_int32_t *) &CI->cpldbase->leds, y); +} + + +void +VMETRO_TRIGGER (ci_t * ci, int x) +{ + comet_t *comet; + volatile u_int32_t data; + + comet = ci->port[0].cometbase; /* default to COMET # 0 */ + + switch (x) + { + default: + case 0: + data = pci_read_32 ((u_int32_t *) &comet->__res24); /* 0x90 */ + break; + case 1: + data = pci_read_32 ((u_int32_t *) &comet->__res25); /* 0x94 */ + break; + case 2: + data = pci_read_32 ((u_int32_t *) &comet->__res26); /* 0x98 */ + break; + case 3: + data = pci_read_32 ((u_int32_t *) &comet->__res27); /* 0x9C */ + break; + case 4: + data = pci_read_32 ((u_int32_t *) &comet->__res88); /* 0x220 */ + break; + case 5: + data = pci_read_32 ((u_int32_t *) &comet->__res89); /* 0x224 */ + break; + case 6: + data = pci_read_32 ((u_int32_t *) &comet->__res8A); /* 0x228 */ + break; + case 7: + data = pci_read_32 ((u_int32_t *) &comet->__res8B); /* 0x22C */ + break; + case 8: + data = pci_read_32 ((u_int32_t *) &comet->__resA0); /* 0x280 */ + break; + case 9: + data = pci_read_32 ((u_int32_t *) &comet->__resA1); /* 0x284 */ + break; + case 10: + data = pci_read_32 ((u_int32_t *) &comet->__resA2); /* 0x288 */ + break; + case 11: + data = pci_read_32 ((u_int32_t *) &comet->__resA3); /* 0x28C */ + break; + case 12: + data = pci_read_32 ((u_int32_t *) &comet->__resA4); /* 0x290 */ + break; + case 13: + data = pci_read_32 ((u_int32_t *) &comet->__resA5); /* 0x294 */ + break; + case 14: + data = pci_read_32 ((u_int32_t *) &comet->__resA6); /* 0x298 */ + break; + case 15: + data = pci_read_32 ((u_int32_t *) &comet->__resA7); /* 0x29C */ + break; + case 16: + data = pci_read_32 ((u_int32_t *) &comet->__res74); /* 0x1D0 */ + break; + case 17: + data = pci_read_32 ((u_int32_t *) &comet->__res75); /* 0x1D4 */ + break; + case 18: + data = pci_read_32 ((u_int32_t *) &comet->__res76); /* 0x1D8 */ + break; + case 19: + data = pci_read_32 ((u_int32_t *) &comet->__res77); /* 0x1DC */ + break; + } +} + + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/hwprobe.c b/drivers/staging/cxt1e1/hwprobe.c new file mode 100644 index 000000000000..0f9d6539a9a6 --- /dev/null +++ b/drivers/staging/cxt1e1/hwprobe.c @@ -0,0 +1,400 @@ +/* Copyright (C) 2007 One Stop Systems + * Copyright (C) 2003-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/netdevice.h> +#include <linux/hdlc.h> +#include <linux/if_arp.h> +#include <asm/uaccess.h> +#include <linux/rtnetlink.h> +#include <linux/pci.h> +#include "pmcc4_sysdep.h" +#include "sbecom_inline_linux.h" +#include "libsbew.h" +#include "pmcc4_private.h" +#include "pmcc4.h" +#include "pmcc4_ioctls.h" +#include "pmc93x6_eeprom.h" +#ifdef CONFIG_PROC_FS +#include "sbeproc.h" +#endif + +#ifdef SBE_INCLUDE_SYMBOLS +#define STATIC +#else +#define STATIC static +#endif + +extern int log_level; +extern int error_flag; +extern int drvr_state; + +/* forward references */ +void c4_stopwd (ci_t *); +struct net_device * __init c4_add_dev (hdw_info_t *, int, unsigned long, unsigned long, int, int); + + +struct s_hdw_info hdw_info[MAX_BOARDS]; + + +void __init +show_two (hdw_info_t * hi, int brdno) +{ + ci_t *ci; + struct pci_dev *pdev; + char *bid; + char *bp, banner[80]; + char sn[6]; + + bp = banner; + memset (banner, 0, 80); /* clear print buffer */ + + ci = (ci_t *)(netdev_priv(hi->ndev)); + bid = sbeid_get_bdname (ci); + switch (hi->promfmt) + { + case PROM_FORMAT_TYPE1: + memcpy (sn, (FLD_TYPE1 *) (hi->mfg_info.pft1.Serial), 6); + break; + case PROM_FORMAT_TYPE2: + memcpy (sn, (FLD_TYPE2 *) (hi->mfg_info.pft2.Serial), 6); + break; + default: + memset (sn, 0, 6); + break; + } + + sprintf (banner, "%s: %s S/N %06X, MUSYCC Rev %02X", + hi->devname, bid, + ((sn[3] << 16) & 0xff0000) | + ((sn[4] << 8) & 0x00ff00) | + (sn[5] & 0x0000ff), + (u_int8_t) hi->revid[0]); + + printk ("%s\n", banner); + + pdev = hi->pdev[0]; + printk ("%s: %s at v/p=%lx/%lx (%02x:%02x.%x) irq %d\n", + hi->devname, "MUSYCC", + (unsigned long) hi->addr_mapped[0], hi->addr[0], + hi->pci_busno, (u_int8_t) PCI_SLOT (pdev->devfn), + (u_int8_t) PCI_FUNC (pdev->devfn), pdev->irq); + + pdev = hi->pdev[1]; + printk ("%s: %s at v/p=%lx/%lx (%02x:%02x.%x) irq %d\n", + hi->devname, "EBUS ", + (unsigned long) hi->addr_mapped[1], hi->addr[1], + hi->pci_busno, (u_int8_t) PCI_SLOT (pdev->devfn), + (u_int8_t) PCI_FUNC (pdev->devfn), pdev->irq); +} + + +void __init +hdw_sn_get (hdw_info_t * hi, int brdno) +{ + /* obtain hardware EEPROM information */ + long addr; + + addr = (long) hi->addr_mapped[1] + EEPROM_OFFSET; + + /* read EEPROM with largest known format size... */ + pmc_eeprom_read_buffer (addr, 0, (char *) hi->mfg_info.data, sizeof (FLD_TYPE2)); + +#if 0 + { + unsigned char *ucp = (unsigned char *) &hi->mfg_info.data; + + printk ("eeprom[00]: %02x %02x %02x %02x %02x %02x %02x %02x\n", + *(ucp + 0), *(ucp + 1), *(ucp + 2), *(ucp + 3), *(ucp + 4), *(ucp + 5), *(ucp + 6), *(ucp + 7)); + printk ("eeprom[08]: %02x %02x %02x %02x %02x %02x %02x %02x\n", + *(ucp + 8), *(ucp + 9), *(ucp + 10), *(ucp + 11), *(ucp + 12), *(ucp + 13), *(ucp + 14), *(ucp + 15)); + printk ("eeprom[16]: %02x %02x %02x %02x %02x %02x %02x %02x\n", + *(ucp + 16), *(ucp + 17), *(ucp + 18), *(ucp + 19), *(ucp + 20), *(ucp + 21), *(ucp + 22), *(ucp + 23)); + printk ("eeprom[24]: %02x %02x %02x %02x %02x %02x %02x %02x\n", + *(ucp + 24), *(ucp + 25), *(ucp + 26), *(ucp + 27), *(ucp + 28), *(ucp + 29), *(ucp + 30), *(ucp + 31)); + printk ("eeprom[32]: %02x %02x %02x %02x %02x %02x %02x %02x\n", + *(ucp + 32), *(ucp + 33), *(ucp + 34), *(ucp + 35), *(ucp + 36), *(ucp + 37), *(ucp + 38), *(ucp + 39)); + printk ("eeprom[40]: %02x %02x %02x %02x %02x %02x %02x %02x\n", + *(ucp + 40), *(ucp + 41), *(ucp + 42), *(ucp + 43), *(ucp + 44), *(ucp + 45), *(ucp + 46), *(ucp + 47)); + } +#endif +#if 0 + printk ("sn: %x %x %x %x %x %x\n", + hi->mfg_info.Serial[0], + hi->mfg_info.Serial[1], + hi->mfg_info.Serial[2], + hi->mfg_info.Serial[3], + hi->mfg_info.Serial[4], + hi->mfg_info.Serial[5]); +#endif + + if ((hi->promfmt = pmc_verify_cksum (&hi->mfg_info.data)) == PROM_FORMAT_Unk) + { + /* bad crc, data is suspect */ + if (log_level >= LOG_WARN) + printk ("%s: EEPROM cksum error\n", hi->devname); + hi->mfg_info_sts = EEPROM_CRCERR; + } else + hi->mfg_info_sts = EEPROM_OK; +} + + +void __init +prep_hdw_info (void) +{ + hdw_info_t *hi; + int i; + + for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++) + { + hi->pci_busno = 0xff; + hi->pci_slot = 0xff; + hi->pci_pin[0] = 0; + hi->pci_pin[1] = 0; + hi->ndev = 0; + hi->addr[0] = 0L; + hi->addr[1] = 0L; + hi->addr_mapped[0] = 0L; + hi->addr_mapped[1] = 0L; + } +} + +void +cleanup_ioremap (void) +{ + hdw_info_t *hi; + int i; + + for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++) + { + if (hi->pci_slot == 0xff) + break; + if (hi->addr_mapped[0]) + { + iounmap ((void *) (hi->addr_mapped[0])); + release_mem_region ((long) hi->addr[0], hi->len[0]); + hi->addr_mapped[0] = 0; + } + if (hi->addr_mapped[1]) + { + iounmap ((void *) (hi->addr_mapped[1])); + release_mem_region ((long) hi->addr[1], hi->len[1]); + hi->addr_mapped[1] = 0; + } + } +} + + +void +cleanup_devs (void) +{ + hdw_info_t *hi; + int i; + + for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++) + { + if (hi->pci_slot == 0xff || !hi->ndev) + break; + c4_stopwd(netdev_priv(hi->ndev)); +#ifdef CONFIG_PROC_FS + sbecom_proc_brd_cleanup(netdev_priv(hi->ndev)); +#endif + unregister_netdev (hi->ndev); + free_irq (hi->pdev[0]->irq, hi->ndev); +#ifdef CONFIG_SBE_PMCC4_NCOMM + free_irq (hi->pdev[1]->irq, hi->ndev); +#endif + OS_kfree (hi->ndev); + } +} + + +STATIC int __init +c4_hdw_init (struct pci_dev * pdev, int found) +{ + hdw_info_t *hi; + int i; + int fun, slot; + unsigned char busno = 0xff; + + /* our MUSYCC chip supports two functions, 0 & 1 */ + if ((fun = PCI_FUNC (pdev->devfn)) > 1) + { + printk (KERN_WARNING "%s: unexpected devfun: 0x%x\n", THIS_MODULE->name, pdev->devfn); + return 0; + } + if (pdev->bus) /* obtain bus number */ + busno = pdev->bus->number; + else + busno = 0; /* default for system PCI inconsistency */ + slot = pdev->devfn & ~0x07; + + /* + * Functions 0 & 1 for a given board (identified by same bus(busno) and + * slot(slot)) are placed into the same 'hardware' structure. The first + * part of the board's functionality will be placed into an unpopulated + * element, identified by "slot==(0xff)". The second part of a board's + * functionality will match the previously loaded slot/busno. + */ + for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++) + { + /* + * match with board's first found interface, otherwise this is first + * found + */ + if ((hi->pci_slot == 0xff) || /* new board */ + ((hi->pci_slot == slot) && (hi->bus == pdev->bus))) + break; /* found for-loop exit */ + } + if (i == MAX_BOARDS) /* no match in above loop means MAX + * exceeded */ + { + printk (KERN_WARNING "%s: exceeded number of allowed devices (>%d)?\n", + THIS_MODULE->name, MAX_BOARDS); + return 0; + } + if (pdev->bus) + hi->pci_busno = pdev->bus->number; + else + hi->pci_busno = 0; /* default for system PCI inconsistency */ + hi->pci_slot = slot; + pci_read_config_byte (pdev, PCI_INTERRUPT_PIN, &hi->pci_pin[fun]); + pci_read_config_byte (pdev, PCI_REVISION_ID, &hi->revid[fun]); + hi->bus = pdev->bus; + hi->addr[fun] = pci_resource_start (pdev, 0); + hi->len[fun] = pci_resource_end (pdev, 0) - hi->addr[fun] + 1; + hi->pdev[fun] = pdev; + + { + /* + * create device name from module name, plus add the appropriate + * board number + */ + char *cp = hi->devname; + + strcpy (cp, THIS_MODULE->name); + cp += strlen (cp); /* reposition */ + *cp++ = '-'; + *cp++ = '0' + (found / 2); /* there are two found interfaces per + * board */ + *cp = 0; /* termination */ + } + + return 1; +} + + +status_t __init +c4hw_attach_all (void) +{ + hdw_info_t *hi; + struct pci_dev *pdev = NULL; + int found = 0, i, j; + + error_flag = 0; + prep_hdw_info (); + /*** scan PCI bus for all possible boards */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) + while ((pdev = pci_get_device (PCI_VENDOR_ID_CONEXANT, + PCI_DEVICE_ID_CN8474, + pdev))) +#else + while ((pdev = pci_find_device (PCI_VENDOR_ID_CONEXANT, + PCI_DEVICE_ID_CN8474, + pdev))) +#endif + { + if (c4_hdw_init (pdev, found)) + found++; + } + if (!found) + { + printk (KERN_WARNING "%s: No boards found.\n", THIS_MODULE->name); + return ENODEV; + } + /* sanity check for consistant hardware found */ + for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++) + { + if (hi->pci_slot != 0xff && (!hi->addr[0] || !hi->addr[1])) + { + printk (KERN_WARNING "%s: something very wrong with pci_get_device.\n", hi->devname); + return EIO; + } + } + /* bring board's memory regions on/line */ + for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++) + { + if (hi->pci_slot == 0xff) + break; + for (j = 0; j < 2; j++) + { + if (request_mem_region (hi->addr[j], hi->len[j], hi->devname) == 0) + { + printk (KERN_WARNING "%s: memory in use, addr=0x%lx, len=0x%lx ?\n", + hi->devname, hi->addr[j], hi->len[j]); + cleanup_ioremap (); + return ENOMEM; + } + hi->addr_mapped[j] = (unsigned long) ioremap (hi->addr[j], hi->len[j]); + if (!hi->addr_mapped[j]) + { + printk (KERN_WARNING "%s: ioremap fails, addr=0x%lx, len=0x%lx ?\n", + hi->devname, hi->addr[j], hi->len[j]); + cleanup_ioremap (); + return ENOMEM; + } +#ifdef SBE_MAP_DEBUG + printk (KERN_WARNING "%s: io remapped from phys %x to virt %x\n", + hi->devname, (u_int32_t) hi->addr[j], (u_int32_t) hi->addr_mapped[j]); +#endif + } + } + + drvr_state = SBE_DRVR_AVAILABLE; + + /* Have now memory mapped all boards. Now allow board's access to system */ + for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++) + { + if (hi->pci_slot == 0xff) + break; + if (pci_enable_device (hi->pdev[0]) || + pci_enable_device (hi->pdev[1])) + { + drvr_state = SBE_DRVR_DOWN; + printk (KERN_WARNING "%s: failed to enable card %d slot %d\n", + hi->devname, i, hi->pci_slot); + cleanup_devs (); + cleanup_ioremap (); + return EIO; + } + pci_set_master (hi->pdev[0]); + pci_set_master (hi->pdev[1]); + if (!(hi->ndev = c4_add_dev (hi, i, (long) hi->addr_mapped[0], + (long) hi->addr_mapped[1], + hi->pdev[0]->irq, + hi->pdev[1]->irq))) + { + drvr_state = SBE_DRVR_DOWN; + cleanup_ioremap (); + /* NOTE: c4_add_dev() does its own device cleanup */ +#if 0 + cleanup_devs (); +#endif + return error_flag; /* error_flag set w/in add_dev() */ + } + show_two (hi, i); /* displays found information */ + } + return 0; +} + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/libsbew.h b/drivers/staging/cxt1e1/libsbew.h new file mode 100644 index 000000000000..5c99646cd103 --- /dev/null +++ b/drivers/staging/cxt1e1/libsbew.h @@ -0,0 +1,581 @@ +/* + * $Id: libsbew.h,v 2.1 2005/10/27 18:54:19 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_LIBSBEW_H_ +#define _INC_LIBSBEW_H_ + +/*----------------------------------------------------------------------------- + * libsbew.h - common library elements, charge across mulitple boards + * + * This file contains common Ioctl structures and contents definitions. + * + * Copyright (C) 2004-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 2.1 $ + * Last changed on $Date: 2005/10/27 18:54:19 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: libsbew.h,v $ + * Revision 2.1 2005/10/27 18:54:19 rickd + * Add E1PLAIN support. + * + * Revision 2.0 2005/09/28 00:10:08 rickd + * Customized for PMCC4 comet-per-port design. + * + * Revision 1.15 2005/03/29 00:51:31 rickd + * File imported from C1T3 port, Revision 1.15 + *----------------------------------------------------------------------------- + */ + +#ifndef __KERNEL__ +#include <sys/types.h> +#endif + +#ifdef __cplusplus +extern "C" +{ +#endif + +/********************************/ +/** set driver logging level **/ +/********************************/ + +/* routine/ioctl: wancfg_set_loglevel() - SBE_IOC_SET_LOGLEVEL */ + +#define LOG_NONE 0 +#define LOG_ERROR 1 +#define LOG_SBEBUG3 3 /* hidden, for development/debug usage */ +#define LOG_LSCHANGE 5 /* line state change logging */ +#define LOG_LSIMMEDIATE 6 /* line state change logging w/o hysterisis */ +#define LOG_WARN 8 +#define LOG_MONITOR 10 +#define LOG_SBEBUG12 12 /* hidden, for development/debug usage */ +#define LOG_MONITOR2 14 /* hidden, for development/debug usage */ +#define LOG_DEBUG 16 + + /* TEMPORARY DEFINES *//* RLD DEBUG */ +#define c4_LOG_NONE LOG_NONE +#define c4_LOG_ERROR LOG_ERROR +#define c4_LOG_WARN LOG_WARN +#define c4_LOG_sTrace LOG_MONITOR /* do some trace logging into + * functions */ +#define c4_LOG_DEBUG LOG_DEBUG +#define c4_LOG_MAX LOG_DEBUG + + + +/******************************/ +/** get driver information **/ +/******************************/ + +/* routine/ioctl: wancfg_get_drvinfo() - SBE_IOC_GET_DRVINFO */ + +#define REL_STRLEN 80 + struct sbe_drv_info + { + int rel_strlen; + char release[REL_STRLEN]; + }; + + +/*****************************/ +/** get board information **/ +/*****************************/ + +/* routine/ioctl: wancfg_get_brdinfo() - SBE_IOC_GET_BRDINFO */ + +#define CHNM_STRLEN 16 + struct sbe_brd_info + { + u_int32_t brd_id; /* SBE's unique PCI VENDOR/DEVID */ + u_int32_t brd_sn; + int brd_chan_cnt; /* number of channels being used */ + int brd_port_cnt; /* number of ports being used */ + unsigned char brdno; /* our board number */ + unsigned char brd_pci_speed; /* PCI speed, 33/66Mhz */ + u_int8_t brd_mac_addr[6]; + char first_iname[CHNM_STRLEN]; /* first assigned channel's + * interface name */ + char last_iname[CHNM_STRLEN]; /* last assigned channel's + * interface name */ + u_int8_t brd_hdw_id; /* on/board unique hdw ID */ + u_int8_t reserved8[3]; /* alignment preservation */ + u_int32_t reserved32[3]; /* size preservation */ + }; + +/* These IDs are sometimes available thru pci_ids.h, but not currently. */ + +#define PCI_VENDOR_ID_SBE 0x1176 +#define PCI_DEVICE_ID_WANPMC_C4T1E1 0x0701 /* BID 0x0X, BTYP 0x0X */ +#define PCI_DEVICE_ID_WANPTMC_C4T1E1 0x0702 /* BID 0x41 */ +#define PCI_DEVICE_ID_WANADAPT_HC4T1E1 0x0703 /* BID 0x44 */ +#define PCI_DEVICE_ID_WANPTMC_256T3_T1 0x0704 /* BID 0x42 (T1 Version) */ +#define PCI_DEVICE_ID_WANPCI_C4T1E1 0x0705 /* BID 0x1X, BTYP 0x0X */ +#define PCI_DEVICE_ID_WANPMC_C1T3 0x0706 /* BID 0x45 */ +#define PCI_DEVICE_ID_WANPCI_C2T1E1 0x0707 /* BID 0x1X, BTYP 0x2X */ +#define PCI_DEVICE_ID_WANPCI_C1T1E1 0x0708 /* BID 0x1X, BTYP 0x1X */ +#define PCI_DEVICE_ID_WANPMC_C2T1E1 0x0709 /* BID 0x0X, BTYP 0x2X */ +#define PCI_DEVICE_ID_WANPMC_C1T1E1 0x070A /* BID 0x0X, BTYP 0x1X */ +#define PCI_DEVICE_ID_WANPTMC_256T3_E1 0x070B /* BID 0x46 (E1 Version) */ +#define PCI_DEVICE_ID_WANPTMC_C24TE1 0x070C /* BID 0x47 */ +#define PCI_DEVICE_ID_WANPMC_C4T1E1_L 0x070D /* BID 0x2X, BTYPE 0x0X w/FP + * LEDs */ +#define PCI_DEVICE_ID_WANPMC_C2T1E1_L 0x070E /* BID 0x2X, BTYPE 0x2X w/FP + * LEDs */ +#define PCI_DEVICE_ID_WANPMC_C1T1E1_L 0x070F /* BID 0x2X, BTYPE 0x1X w/FP + * LEDs */ +#define PCI_DEVICE_ID_WANPMC_2SSI 0x0801 +#define PCI_DEVICE_ID_WANPCI_4SSI 0x0802 +#define PCI_DEVICE_ID_WANPMC_2T3E3 0x0900 /* BID 0x43 */ +#define SBE_BOARD_ID(v,id) ((v<<16) | id) + +#define BINFO_PCI_SPEED_unk 0 +#define BINFO_PCI_SPEED_33 1 +#define BINFO_PCI_SPEED_66 2 + +/***************************/ +/** obtain interface ID **/ +/***************************/ + +/* routine/ioctl: wancfg_get_iid() - SBE_IOC_IID_GET */ + + struct sbe_iid_info + { + u_int32_t channum; /* channel requested */ + char iname[CHNM_STRLEN]; /* channel's interface name */ + }; + +/**************************************/ +/** get board address information **/ +/**************************************/ + +/* routine/ioctl: wancfg_get_brdaddr() - SBE_IOC_BRDADDR_GET */ + + struct sbe_brd_addr + { + unsigned char func; /* select PCI address space function */ + unsigned char brdno; /* returns brdno requested */ + unsigned char irq; + unsigned char size; /* returns size of address */ +#define BRDADDR_SIZE_64 1 +#define BRDADDR_SIZE_32 2 + int reserved1; /* mod64 align, reserved for future use */ + + union + { + unsigned long virt64; /* virtual/mapped address */ + u_int32_t virt32[2]; + } v; + union + { + unsigned long phys64; /* physical bus address */ + u_int32_t phys32[2]; + } p; + int reserved2[4]; /* reserved for future use */ + }; + +/**********************************/ +/** read/write board registers **/ +/**********************************/ + +/* routine/ioctl: wancfg_read_vec() - SBE_IOC_READ_VEC */ +/* routine/ioctl: wancfg_write_vec() - SBE_IOC_WRITE_VEC */ + + struct sbecom_wrt_vec + { + u_int32_t reg; + u_int32_t data; + }; + +#define C1T3_CHIP_MSCC_32 0x01000000 +#define C1T3_CHIP_TECT3_8 0x02000000 +#define C1T3_CHIP_CPLD_8 0x03000000 +#define C1T3_CHIP_EEPROM_8 0x04000000 + +#define W256T3_CHIP_MUSYCC_32 0x02000000 +#define W256T3_CHIP_TEMUX_8 0x10000000 +#define W256T3_CHIP_T8110_8 0x20000000 +#define W256T3_CHIP_T8110_32 0x22000000 +#define W256T3_CHIP_CPLD_8 0x30000000 +#define W256T3_CHIP_EEPROM_8 0x40000000 + + +/**********************************/ +/** read write port parameters **/ +/**********************************/ + +/* routine/ioctl: wancfg_getset_port_param() - SBE_IOC_PORT_GET */ +/* routine/ioctl: wancfg_set_port_param() - SBE_IOC_PORT_SET */ + +/* NOTE: this structure supports hardware which supports individual per/port control */ + +struct sbecom_port_param +{ + u_int8_t portnum; + u_int8_t port_mode; /* variations of T1 or E1 mode */ + u_int8_t portStatus; + u_int8_t portP; /* more port parameters (clock source - 0x80; + * and LBO - 0xf; */ + /* bits 0x70 are reserved for future use ) */ +#ifdef SBE_PMCC4_ENABLE + u_int32_t hypersize; /* RLD DEBUG - add this in until I learn how to make this entry obsolete */ +#endif + int reserved[3-1]; /* reserved for future use */ + int _res[4]; +}; + +#define CFG_CLK_PORT_MASK 0x80 /* Loop timing */ +#define CFG_CLK_PORT_INTERNAL 0x80 /* Loop timing */ +#define CFG_CLK_PORT_EXTERNAL 0x00 /* Loop timing */ + +#define CFG_LBO_MASK 0x0F +#define CFG_LBO_unk 0 /* <not defined> */ +#define CFG_LBO_LH0 1 /* T1 Long Haul (default) */ +#define CFG_LBO_LH7_5 2 /* T1 Long Haul */ +#define CFG_LBO_LH15 3 /* T1 Long Haul */ +#define CFG_LBO_LH22_5 4 /* T1 Long Haul */ +#define CFG_LBO_SH110 5 /* T1 Short Haul */ +#define CFG_LBO_SH220 6 /* T1 Short Haul */ +#define CFG_LBO_SH330 7 /* T1 Short Haul */ +#define CFG_LBO_SH440 8 /* T1 Short Haul */ +#define CFG_LBO_SH550 9 /* T1 Short Haul */ +#define CFG_LBO_SH660 10 /* T1 Short Haul */ +#define CFG_LBO_E75 11 /* E1 75 Ohm */ +#define CFG_LBO_E120 12 /* E1 120 Ohm (default) */ + + +/*************************************/ +/** read write channel parameters **/ +/*************************************/ + +/* routine/ioctl: wancfg_getset_chan_param() - SBE_IOC_CHAN_GET */ +/* routine/ioctl: wancfg_set_chan_param() - SBE_IOC_CHAN_SET */ + +/* NOTE: this structure supports hardware which supports individual per/channel control */ + + struct sbecom_chan_param + { + u_int32_t channum; /* 0: */ +#ifdef SBE_PMCC4_ENABLE + u_int32_t card; /* RLD DEBUG - add this in until I learn how to make this entry obsolete */ + u_int32_t port; /* RLD DEBUG - add this in until I learn how to make this entry obsolete */ + u_int8_t bitmask[32]; +#endif + u_int32_t intr_mask; /* 4: interrupt mask, specify ored + * (SS7_)INTR_* to disable */ + u_int8_t status; /* 8: channel transceiver status (TX_ENABLED, + * RX_ENABLED) */ + u_int8_t chan_mode; /* 9: protocol mode */ + u_int8_t idlecode; /* A: idle code, in (FLAG_7E, FLAG_FF, + * FLAG_00) */ + u_int8_t pad_fill_count; /* B: pad fill count (1-127), 0 - pad + * fill disabled */ + u_int8_t data_inv; /* C: channel data inversion selection */ + u_int8_t mode_56k; /* D: 56kbps mode */ + u_int8_t reserved[2 + 8]; /* E: */ + }; + +/* SS7 interrupt signals <intr_mask> */ +#define SS7_INTR_SFILT 0x00000020 +#define SS7_INTR_SDEC 0x00000040 +#define SS7_INTR_SINC 0x00000080 +#define SS7_INTR_SUERR 0x00000100 +/* Other interrupts that can be masked */ +#define INTR_BUFF 0x00000002 +#define INTR_EOM 0x00000004 +#define INTR_MSG 0x00000008 +#define INTR_IDLE 0x00000010 + +/* transceiver status flags <status> */ +#define TX_ENABLED 0x01 +#define RX_ENABLED 0x02 + +/* Protocol modes <mode> */ +#define CFG_CH_PROTO_TRANS 0 +#define CFG_CH_PROTO_SS7 1 +#define CFG_CH_PROTO_HDLC_FCS16 2 +#define CFG_CH_PROTO_HDLC_FCS32 3 +#define CFG_CH_PROTO_ISLP_MODE 4 + +/* Possible idle code assignments <idlecode> */ +#define CFG_CH_FLAG_7E 0 +#define CFG_CH_FLAG_FF 1 +#define CFG_CH_FLAG_00 2 + +/* data inversion selection <data_inv> */ +#define CFG_CH_DINV_NONE 0x00 +#define CFG_CH_DINV_RX 0x01 +#define CFG_CH_DINV_TX 0x02 + + +/* Posssible resettable chipsets/functions */ +#define RESET_DEV_TEMUX 1 +#define RESET_DEV_TECT3 RESET_DEV_TEMUX +#define RESET_DEV_PLL 2 + + +/*********************************************/ +/** read reset channel thruput statistics **/ +/*********************************************/ + +/* routine/ioctl: wancfg_get_chan_stats() - SBE_IOC_CHAN_GET_STAT */ +/* routine/ioctl: wancfg_del_chan_stats() - SBE_IOC_CHAN_DEL_STAT */ +/* routine/ioctl: wancfg_get_card_chan_stats() - SBE_IOC_CARD_CHAN_STAT */ + + struct sbecom_chan_stats + { + unsigned long rx_packets; /* total packets received */ + unsigned long tx_packets; /* total packets transmitted */ + unsigned long rx_bytes; /* total bytes received */ + unsigned long tx_bytes; /* total bytes transmitted */ + unsigned long rx_errors;/* bad packets received */ + unsigned long tx_errors;/* packet transmit problems */ + unsigned long rx_dropped; /* no space in linux buffers */ + unsigned long tx_dropped; /* no space available in linux */ + + /* detailed rx_errors: */ + unsigned long rx_length_errors; + unsigned long rx_over_errors; /* receiver ring buff overflow */ + unsigned long rx_crc_errors; /* recved pkt with crc error */ + unsigned long rx_frame_errors; /* recv'd frame alignment error */ + unsigned long rx_fifo_errors; /* recv'r fifo overrun */ + unsigned long rx_missed_errors; /* receiver missed packet */ + + /* detailed tx_errors */ + unsigned long tx_aborted_errors; + unsigned long tx_fifo_errors; + unsigned long tx_pending; + }; + + +/****************************************/ +/** read write card level parameters **/ +/****************************************/ + + /* NOTE: this structure supports hardware which supports per/card control */ + + struct sbecom_card_param + { + u_int8_t framing_type; /* 0: CBP or M13 */ + u_int8_t loopback; /* 1: one of LOOPBACK_* */ + u_int8_t line_build_out; /* 2: boolean */ + u_int8_t receive_eq; /* 3: boolean */ + u_int8_t transmit_ones; /* 4: boolean */ + u_int8_t clock; /* 5: 0 - internal, i>0 - external (recovered + * from framer i) */ + u_int8_t h110enable; /* 6: */ + u_int8_t disable_leds; /* 7: */ + u_int8_t reserved1; /* 8: available - old 256t3 hypersized, but + * never used */ + u_int8_t rear_io; /* 9: rear I/O off/on */ + u_int8_t disable_tx; /* A: disable TX off/on */ + u_int8_t mute_los; /* B: mute LOS off/on */ + u_int8_t los_threshold; /* C: LOS threshold norm/low + * (default: norm) */ + u_int8_t ds1_mode; /* D: DS1 mode T1/E1 (default: T1) */ + u_int8_t ds3_unchan; /* E: DS3 unchannelized mode off/on */ + u_int8_t reserved[1 + 16]; /* reserved for expansion - must be + * ZERO filled */ + }; + +/* framing types <framing_type> */ +#define FRAMING_M13 0 +#define FRAMING_CBP 1 + +/* card level loopback options <loopback> */ +#define CFG_CARD_LOOPBACK_NONE 0x00 +#define CFG_CARD_LOOPBACK_DIAG 0x01 +#define CFG_CARD_LOOPBACK_LINE 0x02 +#define CFG_CARD_LOOPBACK_PAYLOAD 0x03 + +/* line level loopback options <loopback> */ +#define CFG_LIU_LOOPBACK_NONE 0x00 +#define CFG_LIU_LOOPBACK_ANALOG 0x10 +#define CFG_LIU_LOOPBACK_DIGITAL 0x11 +#define CFG_LIU_LOOPBACK_REMOTE 0x12 + +/* card level clock options <clock> */ +#define CFG_CLK_INTERNAL 0x00 +#define CFG_CLK_EXTERNAL 0x01 + +/* legacy 256T3 loopback values */ +#define LOOPBACK_NONE 0 +#define LOOPBACK_LIU_ANALOG 1 +#define LOOPBACK_LIU_DIGITAL 2 +#define LOOPBACK_FRAMER_DS3 3 +#define LOOPBACK_FRAMER_T1 4 +#define LOOPBACK_LIU_REMOTE 5 + +/* DS1 mode <ds1_mode> */ +#define CFG_DS1_MODE_MASK 0x0f +#define CFG_DS1_MODE_T1 0x00 +#define CFG_DS1_MODE_E1 0x01 +#define CFG_DS1_MODE_CHANGE 0x80 + +/* DS3 unchannelized values <ds1_unchan> */ +#define CFG_DS3_UNCHAN_MASK 0x01 +#define CFG_DS3_UNCHAN_OFF 0x00 +#define CFG_DS3_UNCHAN_ON 0x01 + + +/************************************/ +/** read write framer parameters **/ +/************************************/ + +/* routine/ioctl: wancfg_get_framer() - SBE_IOC_FRAMER_GET */ +/* routine/ioctl: wancfg_set_framer() - SBE_IOC_FRAMER_SET */ + + struct sbecom_framer_param + { + u_int8_t framer_num; + u_int8_t frame_type; /* SF, ESF, E1PLAIN, E1CAS, E1CRC, E1CRC+CAS */ + u_int8_t loopback_type; /* DIGITAL, LINE, PAYLOAD */ + u_int8_t auto_alarms;/* auto alarms */ + u_int8_t reserved[12]; /* reserved for expansion - must be + * ZERO filled */ + }; + +/* frame types <frame_type> */ +#define CFG_FRAME_NONE 0 +#define CFG_FRAME_SF 1 /* T1 B8ZS */ +#define CFG_FRAME_ESF 2 /* T1 B8ZS */ +#define CFG_FRAME_E1PLAIN 3 /* HDB3 w/o CAS,CRC */ +#define CFG_FRAME_E1CAS 4 /* HDB3 */ +#define CFG_FRAME_E1CRC 5 /* HDB3 */ +#define CFG_FRAME_E1CRC_CAS 6 /* HDB3 */ +#define CFG_FRAME_SF_AMI 7 /* T1 AMI */ +#define CFG_FRAME_ESF_AMI 8 /* T1 AMI */ +#define CFG_FRAME_E1PLAIN_AMI 9 /* E1 AMI w/o CAS,CRC */ +#define CFG_FRAME_E1CAS_AMI 10 /* E1 AMI */ +#define CFG_FRAME_E1CRC_AMI 11 /* E1 AMI */ +#define CFG_FRAME_E1CRC_CAS_AMI 12 /* E1 AMI */ + +#define IS_FRAME_ANY_T1(field) \ + (((field) == CFG_FRAME_NONE) || \ + ((field) == CFG_FRAME_SF) || \ + ((field) == CFG_FRAME_ESF) || \ + ((field) == CFG_FRAME_SF_AMI) || \ + ((field) == CFG_FRAME_ESF_AMI)) + +#define IS_FRAME_ANY_T1ESF(field) \ + (((field) == CFG_FRAME_ESF) || \ + ((field) == CFG_FRAME_ESF_AMI)) + +#define IS_FRAME_ANY_E1(field) \ + (((field) == CFG_FRAME_E1PLAIN) || \ + ((field) == CFG_FRAME_E1CAS) || \ + ((field) == CFG_FRAME_E1CRC) || \ + ((field) == CFG_FRAME_E1CRC_CAS) || \ + ((field) == CFG_FRAME_E1PLAIN_AMI) || \ + ((field) == CFG_FRAME_E1CAS_AMI) || \ + ((field) == CFG_FRAME_E1CRC_AMI) || \ + ((field) == CFG_FRAME_E1CRC_CAS_AMI)) + +#define IS_FRAME_ANY_AMI(field) \ + (((field) == CFG_FRAME_SF_AMI) || \ + ((field) == CFG_FRAME_ESF_AMI) || \ + ((field) == CFG_FRAME_E1PLAIN_AMI) || \ + ((field) == CFG_FRAME_E1CAS_AMI) || \ + ((field) == CFG_FRAME_E1CRC_AMI) || \ + ((field) == CFG_FRAME_E1CRC_CAS_AMI)) + +/* frame level loopback options <loopback_type> */ +#define CFG_FRMR_LOOPBACK_NONE 0 +#define CFG_FRMR_LOOPBACK_DIAG 1 +#define CFG_FRMR_LOOPBACK_LINE 2 +#define CFG_FRMR_LOOPBACK_PAYLOAD 3 + + +/****************************************/ +/** read reset card error statistics **/ +/****************************************/ + +/* routine/ioctl: wancfg_get_card_stats() - SBE_IOC_CARD_GET_STAT */ +/* routine/ioctl: wancfg_del_card_stats() - SBE_IOC_CARD_DEL_STAT */ + + struct temux_card_stats + { + struct temux_stats + { + /* TEMUX DS3 PMON counters */ + u_int32_t lcv; + u_int32_t err_framing; + u_int32_t febe; + u_int32_t err_cpbit; + u_int32_t err_parity; + /* TEMUX DS3 FRMR status */ + u_int8_t los; + u_int8_t oof; + u_int8_t red; + u_int8_t yellow; + u_int8_t idle; + u_int8_t ais; + u_int8_t cbit; + /* TEMUX DS3 FEAC receiver */ + u_int8_t feac; + u_int8_t feac_last; + } t; + u_int32_t tx_pending; /* total */ + }; + +/**************************************************************/ + + struct wancfg + { + int cs, ds; + char *p; + }; + typedef struct wancfg wcfg_t; + + extern wcfg_t *wancfg_init (char *, char *); + extern int wancfg_card_blink (wcfg_t *, int); + extern int wancfg_ctl (wcfg_t *, int, void *, int, void *, int); + extern int wancfg_del_card_stats (wcfg_t *); + extern int wancfg_del_chan_stats (wcfg_t *, int); + extern int wancfg_enable_ports (wcfg_t *, int); + extern int wancfg_free (wcfg_t *); + extern int wancfg_get_brdaddr (wcfg_t *, struct sbe_brd_addr *); + extern int wancfg_get_brdinfo (wcfg_t *, struct sbe_brd_info *); + extern int wancfg_get_card (wcfg_t *, struct sbecom_card_param *); + extern int wancfg_get_card_chan_stats (wcfg_t *, struct sbecom_chan_stats *); + extern int wancfg_get_card_sn (wcfg_t *); + extern int wancfg_get_card_stats (wcfg_t *, struct temux_card_stats *); + extern int wancfg_get_chan (wcfg_t *, int, struct sbecom_chan_param *); + extern int wancfg_get_chan_stats (wcfg_t *, int, struct sbecom_chan_stats *); + extern int wancfg_get_drvinfo (wcfg_t *, int, struct sbe_drv_info *); + extern int wancfg_get_framer (wcfg_t *, int, struct sbecom_framer_param *); + extern int wancfg_get_iid (wcfg_t *, int, struct sbe_iid_info *); + extern int wancfg_get_sn (wcfg_t *, unsigned int *); + extern int wancfg_read (wcfg_t *, int, struct sbecom_wrt_vec *); + extern int wancfg_reset_device (wcfg_t *, int); + extern int wancfg_set_card (wcfg_t *, struct sbecom_card_param *); + extern int wancfg_set_chan (wcfg_t *, int, struct sbecom_chan_param *); + extern int wancfg_set_framer (wcfg_t *, int, struct sbecom_framer_param *); + extern int wancfg_set_loglevel (wcfg_t *, uint); + extern int wancfg_write (wcfg_t *, int, struct sbecom_wrt_vec *); + +#ifdef NOT_YET_COMMON + extern int wancfg_get_tsioc (wcfg_t *, struct wanc1t3_ts_hdr *, struct wanc1t3_ts_param *); + extern int wancfg_set_tsioc (wcfg_t *, struct wanc1t3_ts_param *); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /*** _INC_LIBSBEW_H_ ***/ diff --git a/drivers/staging/cxt1e1/linux.c b/drivers/staging/cxt1e1/linux.c new file mode 100644 index 000000000000..23e184da9723 --- /dev/null +++ b/drivers/staging/cxt1e1/linux.c @@ -0,0 +1,1354 @@ +/* Copyright (C) 2007-2008 One Stop Systems + * Copyright (C) 2003-2006 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/types.h> +#include <linux/netdevice.h> +#include <linux/hdlc.h> +#include <linux/if_arp.h> +#include <linux/init.h> +#include <asm/uaccess.h> +#include <linux/rtnetlink.h> +#include <linux/skbuff.h> +#include "pmcc4_sysdep.h" +#include "sbecom_inline_linux.h" +#include "libsbew.h" +#include "pmcc4.h" +#include "pmcc4_ioctls.h" +#include "pmcc4_private.h" +#include "sbeproc.h" + +/***************************************************************************************** + * Error out early if we have compiler trouble. + * + * (This section is included from the kernel's init/main.c as a friendly + * spiderman recommendation...) + * + * Versions of gcc older than that listed below may actually compile and link + * okay, but the end product can have subtle run time bugs. To avoid associated + * bogus bug reports, we flatly refuse to compile with a gcc that is known to be + * too old from the very beginning. + */ +#if (__GNUC__ < 3) || (__GNUC__ == 3 && __GNUC_MINOR__ < 2) +#error Sorry, your GCC is too old. It builds incorrect kernels. +#endif + +#if __GNUC__ == 4 && __GNUC_MINOR__ == 1 && __GNUC_PATCHLEVEL__ == 0 +#warning gcc-4.1.0 is known to miscompile the kernel. A different compiler version is recommended. +#endif + +/*****************************************************************************************/ + +#ifdef SBE_INCLUDE_SYMBOLS +#define STATIC +#else +#define STATIC static +#endif + +#define CHANNAME "hdlc" + +/*******************************************************************/ +/* forward references */ +status_t c4_chan_work_init (mpi_t *, mch_t *); +void musycc_wq_chan_restart (void *); +status_t __init c4_init (ci_t *, u_char *, u_char *); +status_t __init c4_init2 (ci_t *); +ci_t *__init c4_new (void *); +int __init c4hw_attach_all (void); +void __init hdw_sn_get (hdw_info_t *, int); + +#ifdef CONFIG_SBE_PMCC4_NCOMM +irqreturn_t c4_ebus_intr_th_handler (void *); + +#endif +int c4_frame_rw (ci_t *, struct sbecom_port_param *); +status_t c4_get_port (ci_t *, int); +int c4_loop_port (ci_t *, int, u_int8_t); +int c4_musycc_rw (ci_t *, struct c4_musycc_param *); +int c4_new_chan (ci_t *, int, int, void *); +status_t c4_set_port (ci_t *, int); +int c4_pld_rw (ci_t *, struct sbecom_port_param *); +void cleanup_devs (void); +void cleanup_ioremap (void); +status_t musycc_chan_down (ci_t *, int); +irqreturn_t musycc_intr_th_handler (void *); +int musycc_start_xmit (ci_t *, int, void *); + +extern char pmcc4_OSSI_release[]; +extern ci_t *CI; +extern struct s_hdw_info hdw_info[]; + +#if defined(CONFIG_SBE_HDLC_V7) || defined(CONFIG_SBE_WAN256T3_HDLC_V7) || \ + defined(CONFIG_SBE_HDLC_V7_MODULE) || defined(CONFIG_SBE_WAN256T3_HDLC_V7_MODULE) +#define _v7_hdlc_ 1 +#else +#define _v7_hdlc_ 0 +#endif + +#if _v7_hdlc_ +#define V7(x) (x ## _v7) +extern int hdlc_netif_rx_v7 (hdlc_device *, struct sk_buff *); +extern int register_hdlc_device_v7 (hdlc_device *); +extern int unregister_hdlc_device_v7 (hdlc_device *); + +#else +#define V7(x) x +#endif + +int error_flag; /* module load error reporting */ +int log_level = LOG_ERROR; +int log_level_default = LOG_ERROR; +module_param(log_level, int, 0444); + +int max_mru = MUSYCC_MRU; +int max_mru_default = MUSYCC_MRU; +module_param(max_mru, int, 0444); + +int max_mtu = MUSYCC_MTU; +int max_mtu_default = MUSYCC_MTU; +module_param(max_mtu, int, 0444); + +int max_txdesc_used = MUSYCC_TXDESC_MIN; +int max_txdesc_default = MUSYCC_TXDESC_MIN; +module_param(max_txdesc_used, int, 0444); + +int max_rxdesc_used = MUSYCC_RXDESC_MIN; +int max_rxdesc_default = MUSYCC_RXDESC_MIN; +module_param(max_rxdesc_used, int, 0444); + +/****************************************************************************/ +/****************************************************************************/ +/****************************************************************************/ + +void * +getuserbychan (int channum) +{ + mch_t *ch; + + ch = c4_find_chan (channum); + return ch ? ch->user : 0; +} + + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +#define DEV_TO_PRIV(dev) ( * (struct c4_priv **) ((hdlc_device*)(dev)+1)) +#else + +char * +get_hdlc_name (hdlc_device * hdlc) +{ + struct c4_priv *priv = hdlc->priv; + struct net_device *dev = getuserbychan (priv->channum); + + return dev->name; +} +#endif + + +static status_t +mkret (int bsd) +{ + if (bsd > 0) + return -bsd; + else + return bsd; +} + +/***************************************************************************/ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41) +#include <linux/workqueue.h> + +/*** + * One workqueue (wq) per port (since musycc allows simultaneous group + * commands), with individual data for each channel: + * + * mpi_t -> struct workqueue_struct *wq_port; (dynamically allocated using + * create_workqueue()) + * + * With work structure (work) statically allocated for each channel: + * + * mch_t -> struct work_struct ch_work; (statically allocated using ???) + * + ***/ + + +/* + * Called by the start transmit routine when a channel TX_ENABLE is to be + * issued. This queues the transmission start request among other channels + * within a port's group. + */ +void +c4_wk_chan_restart (mch_t * ch) +{ + mpi_t *pi = ch->up; + +#ifdef RLD_RESTART_DEBUG + printk (">> c4_wk_chan_restart: queueing Port %d Chan %d, mch_t @ %p\n", pi->portnum, ch->channum, ch); +#endif + + /* create new entry w/in workqueue for this channel and let'er rip */ + + /** queue_work (struct workqueue_struct *queue, + ** struct work_struct *work); + **/ + queue_work (pi->wq_port, &ch->ch_work); +} + +status_t +c4_wk_chan_init (mpi_t * pi, mch_t * ch) +{ + /* + * this will be used to restart a stopped channel + */ + + /** INIT_WORK (struct work_struct *work, + ** void (*function)(void *), + ** void *data); + **/ + INIT_WORK(&ch->ch_work, (void *)musycc_wq_chan_restart); + return 0; /* success */ +} + +status_t +c4_wq_port_init (mpi_t * pi) +{ + + char name[16], *np; /* NOTE: name of the queue limited by system + * to 10 characters */ + + if (pi->wq_port) + return 0; /* already initialized */ + + np = name; + memset (name, 0, 16); + sprintf (np, "%s%d", pi->up->devname, pi->portnum); /* IE pmcc4-01) */ + +#ifdef RLD_RESTART_DEBUG + printk (">> c4_wq_port_init: creating workqueue <%s> for Port %d.\n", name, pi->portnum); /* RLD DEBUG */ +#endif + if (!(pi->wq_port = create_singlethread_workqueue (name))) + return ENOMEM; + return 0; /* success */ +} + +void +c4_wq_port_cleanup (mpi_t * pi) +{ + /* + * PORT POINT: cannot call this if WQ is statically allocated w/in + * structure since it calls kfree(wq); + */ + if (pi->wq_port) + { + destroy_workqueue (pi->wq_port); /* this also calls + * flush_workqueue() */ + pi->wq_port = 0; + } +} +#endif + +/***************************************************************************/ + +irqreturn_t +c4_linux_interrupt (int irq, void *dev_instance) +{ + struct net_device *ndev = dev_instance; + + return musycc_intr_th_handler(netdev_priv(ndev)); +} + + +#ifdef CONFIG_SBE_PMCC4_NCOMM +irqreturn_t +c4_ebus_interrupt (int irq, void *dev_instance) +{ + struct net_device *ndev = dev_instance; + + return c4_ebus_intr_th_handler(netdev_priv(ndev)); +} +#endif + + +static int +void_open (struct net_device * ndev) +{ + printk ("%s: trying to open master device !\n", ndev->name); + return -1; +} + + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +#if !defined(GENERIC_HDLC_VERSION) || (GENERIC_HDLC_VERSION < 4) + +/** Linux 2.4.18-19 **/ +STATIC int +chan_open (hdlc_device * hdlc) +{ + status_t ret; + + if ((ret = c4_chan_up (DEV_TO_PRIV (hdlc)->ci, DEV_TO_PRIV (hdlc)->channum))) + return -ret; + MOD_INC_USE_COUNT; + netif_start_queue (hdlc_to_dev (hdlc)); + return 0; /* no error = success */ +} + +#else + +/** Linux 2.4.20 and higher **/ +STATIC int +chan_open (struct net_device * ndev) +{ + hdlc_device *hdlc = dev_to_hdlc (ndev); + status_t ret; + + hdlc->proto = IF_PROTO_HDLC; + if ((ret = hdlc_open (hdlc))) + { + printk ("%s: hdlc_open failure, err %d.\n", THIS_MODULE->name, ret); + return ret; + } + if ((ret = c4_chan_up (DEV_TO_PRIV (hdlc)->ci, DEV_TO_PRIV (hdlc)->channum))) + return -ret; + MOD_INC_USE_COUNT; + netif_start_queue (hdlc_to_dev (hdlc)); + return 0; /* no error = success */ +} +#endif + +#else + +/** Linux 2.6 **/ +STATIC int +chan_open (struct net_device * ndev) +{ + hdlc_device *hdlc = dev_to_hdlc (ndev); + const struct c4_priv *priv = hdlc->priv; + int ret; + + if ((ret = hdlc_open (ndev))) + { + printk ("%s: hdlc_open failure, err %d.\n", THIS_MODULE->name, ret); + return ret; + } + if ((ret = c4_chan_up (priv->ci, priv->channum))) + return -ret; + try_module_get (THIS_MODULE); + netif_start_queue (ndev); + return 0; /* no error = success */ +} +#endif + + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +#if !defined(GENERIC_HDLC_VERSION) || (GENERIC_HDLC_VERSION < 4) + +/** Linux 2.4.18-19 **/ +STATIC void +chan_close (hdlc_device * hdlc) +{ + netif_stop_queue (hdlc_to_dev (hdlc)); + musycc_chan_down ((ci_t *) 0, DEV_TO_PRIV (hdlc)->channum); + MOD_DEC_USE_COUNT; +} +#else + +/** Linux 2.4.20 and higher **/ +STATIC int +chan_close (struct net_device * ndev) +{ + hdlc_device *hdlc = dev_to_hdlc (ndev); + + netif_stop_queue (hdlc_to_dev (hdlc)); + musycc_chan_down ((ci_t *) 0, DEV_TO_PRIV (hdlc)->channum); + hdlc_close (hdlc); + MOD_DEC_USE_COUNT; + return 0; +} +#endif + +#else + +/** Linux 2.6 **/ +STATIC int +chan_close (struct net_device * ndev) +{ + hdlc_device *hdlc = dev_to_hdlc (ndev); + const struct c4_priv *priv = hdlc->priv; + + netif_stop_queue (ndev); + musycc_chan_down ((ci_t *) 0, priv->channum); + hdlc_close (ndev); + module_put (THIS_MODULE); + return 0; +} +#endif + + +#if !defined(GENERIC_HDLC_VERSION) || (GENERIC_HDLC_VERSION < 4) + +/** Linux 2.4.18-19 **/ +STATIC int +chan_ioctl (hdlc_device * hdlc, struct ifreq * ifr, int cmd) +{ + if (cmd == HDLCSCLOCK) + { + ifr->ifr_ifru.ifru_ivalue = LINE_DEFAULT; + return 0; + } + return -EINVAL; +} +#endif + + +#if !defined(GENERIC_HDLC_VERSION) || (GENERIC_HDLC_VERSION < 4) +STATIC int +chan_dev_ioctl (struct net_device * hdlc, struct ifreq * ifr, int cmd) +{ + if (cmd == HDLCSCLOCK) + { + ifr->ifr_ifru.ifru_ivalue = LINE_DEFAULT; + return 0; + } + return -EINVAL; +} +#else +STATIC int +chan_dev_ioctl (struct net_device * dev, struct ifreq * ifr, int cmd) +{ + return hdlc_ioctl (dev, ifr, cmd); +} + + +STATIC int +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +chan_attach_noop (hdlc_device * hdlc, unsigned short foo_1, unsigned short foo_2) +#else +chan_attach_noop (struct net_device * ndev, unsigned short foo_1, unsigned short foo_2) +#endif +{ + return 0; /* our driver has nothing to do here, show's + * over, go home */ +} +#endif + + +STATIC struct net_device_stats * +chan_get_stats (struct net_device * ndev) +{ + mch_t *ch; + struct net_device_stats *nstats; + struct sbecom_chan_stats *stats; + int channum; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + channum = DEV_TO_PRIV (ndev)->channum; +#else + { + struct c4_priv *priv; + + priv = (struct c4_priv *) dev_to_hdlc (ndev)->priv; + channum = priv->channum; + } +#endif + + ch = c4_find_chan (channum); + if (ch == NULL) + return NULL; + + nstats = &ndev->stats; + stats = &ch->s; + + memset (nstats, 0, sizeof (struct net_device_stats)); + nstats->rx_packets = stats->rx_packets; + nstats->tx_packets = stats->tx_packets; + nstats->rx_bytes = stats->rx_bytes; + nstats->tx_bytes = stats->tx_bytes; + nstats->rx_errors = stats->rx_length_errors + + stats->rx_over_errors + + stats->rx_crc_errors + + stats->rx_frame_errors + + stats->rx_fifo_errors + + stats->rx_missed_errors; + nstats->tx_errors = stats->tx_dropped + + stats->tx_aborted_errors + + stats->tx_fifo_errors; + nstats->rx_dropped = stats->rx_dropped; + nstats->tx_dropped = stats->tx_dropped; + + nstats->rx_length_errors = stats->rx_length_errors; + nstats->rx_over_errors = stats->rx_over_errors; + nstats->rx_crc_errors = stats->rx_crc_errors; + nstats->rx_frame_errors = stats->rx_frame_errors; + nstats->rx_fifo_errors = stats->rx_fifo_errors; + nstats->rx_missed_errors = stats->rx_missed_errors; + + nstats->tx_aborted_errors = stats->tx_aborted_errors; + nstats->tx_fifo_errors = stats->tx_fifo_errors; + + return nstats; +} + + +static ci_t * +get_ci_by_dev (struct net_device * ndev) +{ + return (ci_t *)(netdev_priv(ndev)); +} + + +#if !defined(GENERIC_HDLC_VERSION) || (GENERIC_HDLC_VERSION < 4) +STATIC int +c4_linux_xmit (hdlc_device * hdlc, struct sk_buff * skb) +{ + int rval; + + rval = musycc_start_xmit (DEV_TO_PRIV (hdlc)->ci, DEV_TO_PRIV (hdlc)->channum, skb); + return -rval; +} +#else /* new */ +STATIC int +c4_linux_xmit (struct sk_buff * skb, struct net_device * ndev) +{ + const struct c4_priv *priv; + int rval; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + priv = DEV_TO_PRIV (ndev); +#else + hdlc_device *hdlc = dev_to_hdlc (ndev); + + priv = hdlc->priv; +#endif + + rval = musycc_start_xmit (priv->ci, priv->channum, skb); + return -rval; +} +#endif /* GENERIC_HDLC_VERSION */ + +static const struct net_device_ops chan_ops = { + .ndo_open = chan_open, + .ndo_stop = chan_close, + .ndo_start_xmit = c4_linux_xmit, + .ndo_do_ioctl = chan_dev_ioctl, + .ndo_get_stats = chan_get_stats, +}; + +STATIC struct net_device * +create_chan (struct net_device * ndev, ci_t * ci, + struct sbecom_chan_param * cp) +{ + hdlc_device *hdlc; + struct net_device *dev; + hdw_info_t *hi; + int ret; + + if (c4_find_chan (cp->channum)) + return 0; /* channel already exists */ + + { + struct c4_priv *priv; + + /* allocate then fill in private data structure */ + priv = OS_kmalloc (sizeof (struct c4_priv)); + if (!priv) + { + printk (KERN_WARNING "%s: no memory for net_device !\n", ci->devname); + return 0; + } + dev = alloc_hdlcdev (priv); + if (!dev) + { + printk (KERN_WARNING "%s: no memory for hdlc_device !\n", ci->devname); + OS_kfree (priv); + return 0; + } + priv->ci = ci; + priv->channum = cp->channum; + } + + hdlc = dev_to_hdlc (dev); + + dev->base_addr = 0; /* not I/O mapped */ + dev->irq = ndev->irq; + dev->type = ARPHRD_RAWHDLC; + *dev->name = 0; /* default ifconfig name = "hdlc" */ + + hi = (hdw_info_t *) ci->hdw_info; + if (hi->mfg_info_sts == EEPROM_OK) + { + switch (hi->promfmt) + { + case PROM_FORMAT_TYPE1: + memcpy (dev->dev_addr, (FLD_TYPE1 *) (hi->mfg_info.pft1.Serial), 6); + break; + case PROM_FORMAT_TYPE2: + memcpy (dev->dev_addr, (FLD_TYPE2 *) (hi->mfg_info.pft2.Serial), 6); + break; + default: + memset (dev->dev_addr, 0, 6); + break; + } + } else + { + memset (dev->dev_addr, 0, 6); + } + + hdlc->xmit = c4_linux_xmit; + + dev->netdev_ops = &chan_ops; + /* + * The native hdlc stack calls this 'attach' routine during + * hdlc_raw_ioctl(), passing parameters for line encoding and parity. + * Since hdlc_raw_ioctl() stack does not interrogate whether an 'attach' + * routine is actually registered or not, we supply a dummy routine which + * does nothing (since encoding and parity are setup for our driver via a + * special configuration application). + */ + + hdlc->attach = chan_attach_noop; + + rtnl_unlock (); /* needed due to Ioctl calling sequence */ + ret = register_hdlc_device (dev); + /* NOTE: <stats> setting must occur AFTER registration in order to "take" */ + dev->tx_queue_len = MAX_DEFAULT_IFQLEN; + + rtnl_lock (); /* needed due to Ioctl calling sequence */ + if (ret) + { + if (log_level >= LOG_WARN) + printk ("%s: create_chan[%d] registration error = %d.\n", + ci->devname, cp->channum, ret); + free_netdev (dev); /* cleanup */ + return 0; /* failed to register */ + } + return dev; +} + + +/* the idea here is to get port information and pass it back (using pointer) */ +STATIC status_t +do_get_port (struct net_device * ndev, void *data) +{ + int ret; + ci_t *ci; /* ci stands for card information */ + struct sbecom_port_param pp;/* copy data to kernel land */ + + if (copy_from_user (&pp, data, sizeof (struct sbecom_port_param))) + return -EFAULT; + if (pp.portnum >= MUSYCC_NPORTS) + return -EFAULT; + ci = get_ci_by_dev (ndev); + if (!ci) + return -EINVAL; /* get card info */ + + ret = mkret (c4_get_port (ci, pp.portnum)); + if (ret) + return ret; + if (copy_to_user (data, &ci->port[pp.portnum].p, + sizeof (struct sbecom_port_param))) + return -EFAULT; + return 0; +} + +/* this function copys the user data and then calls the real action function */ +STATIC status_t +do_set_port (struct net_device * ndev, void *data) +{ + ci_t *ci; /* ci stands for card information */ + struct sbecom_port_param pp;/* copy data to kernel land */ + + if (copy_from_user (&pp, data, sizeof (struct sbecom_port_param))) + return -EFAULT; + if (pp.portnum >= MUSYCC_NPORTS) + return -EFAULT; + ci = get_ci_by_dev (ndev); + if (!ci) + return -EINVAL; /* get card info */ + + if (pp.portnum >= ci->max_port) /* sanity check */ + return ENXIO; + + memcpy (&ci->port[pp.portnum].p, &pp, sizeof (struct sbecom_port_param)); + return mkret (c4_set_port (ci, pp.portnum)); +} + +/* work the port loopback mode as per directed */ +STATIC status_t +do_port_loop (struct net_device * ndev, void *data) +{ + struct sbecom_port_param pp; + ci_t *ci; + + if (copy_from_user (&pp, data, sizeof (struct sbecom_port_param))) + return -EFAULT; + ci = get_ci_by_dev (ndev); + if (!ci) + return -EINVAL; + return mkret (c4_loop_port (ci, pp.portnum, pp.port_mode)); +} + +/* set the specified register with the given value / or just read it */ +STATIC status_t +do_framer_rw (struct net_device * ndev, void *data) +{ + struct sbecom_port_param pp; + ci_t *ci; + int ret; + + if (copy_from_user (&pp, data, sizeof (struct sbecom_port_param))) + return -EFAULT; + ci = get_ci_by_dev (ndev); + if (!ci) + return -EINVAL; + ret = mkret (c4_frame_rw (ci, &pp)); + if (ret) + return ret; + if (copy_to_user (data, &pp, sizeof (struct sbecom_port_param))) + return -EFAULT; + return 0; +} + +/* set the specified register with the given value / or just read it */ +STATIC status_t +do_pld_rw (struct net_device * ndev, void *data) +{ + struct sbecom_port_param pp; + ci_t *ci; + int ret; + + if (copy_from_user (&pp, data, sizeof (struct sbecom_port_param))) + return -EFAULT; + ci = get_ci_by_dev (ndev); + if (!ci) + return -EINVAL; + ret = mkret (c4_pld_rw (ci, &pp)); + if (ret) + return ret; + if (copy_to_user (data, &pp, sizeof (struct sbecom_port_param))) + return -EFAULT; + return 0; +} + +/* set the specified register with the given value / or just read it */ +STATIC status_t +do_musycc_rw (struct net_device * ndev, void *data) +{ + struct c4_musycc_param mp; + ci_t *ci; + int ret; + + if (copy_from_user (&mp, data, sizeof (struct c4_musycc_param))) + return -EFAULT; + ci = get_ci_by_dev (ndev); + if (!ci) + return -EINVAL; + ret = mkret (c4_musycc_rw (ci, &mp)); + if (ret) + return ret; + if (copy_to_user (data, &mp, sizeof (struct c4_musycc_param))) + return -EFAULT; + return 0; +} + +STATIC status_t +do_get_chan (struct net_device * ndev, void *data) +{ + struct sbecom_chan_param cp; + int ret; + + if (copy_from_user (&cp, data, + sizeof (struct sbecom_chan_param))) + return -EFAULT; + + if ((ret = mkret (c4_get_chan (cp.channum, &cp)))) + return ret; + + if (copy_to_user (data, &cp, sizeof (struct sbecom_chan_param))) + return -EFAULT; + return 0; +} + +STATIC status_t +do_set_chan (struct net_device * ndev, void *data) +{ + struct sbecom_chan_param cp; + int ret; + ci_t *ci; + + if (copy_from_user (&cp, data, sizeof (struct sbecom_chan_param))) + return -EFAULT; + ci = get_ci_by_dev (ndev); + if (!ci) + return -EINVAL; + switch (ret = mkret (c4_set_chan (cp.channum, &cp))) + { + case 0: + return 0; + default: + return ret; + } +} + +STATIC status_t +do_create_chan (struct net_device * ndev, void *data) +{ + ci_t *ci; + struct net_device *dev; + struct sbecom_chan_param cp; + int ret; + + if (copy_from_user (&cp, data, sizeof (struct sbecom_chan_param))) + return -EFAULT; + ci = get_ci_by_dev (ndev); + if (!ci) + return -EINVAL; + dev = create_chan (ndev, ci, &cp); + if (!dev) + return -EBUSY; + ret = mkret (c4_new_chan (ci, cp.port, cp.channum, dev)); + if (ret) + { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + rtnl_unlock (); /* needed due to Ioctl calling sequence */ + V7 (unregister_hdlc_device) (dev_to_hdlc (dev)); + rtnl_lock (); /* needed due to Ioctl calling sequence */ + OS_kfree (DEV_TO_PRIV (dev)); + OS_kfree (dev); +#else + rtnl_unlock (); /* needed due to Ioctl calling sequence */ + unregister_hdlc_device (dev); + rtnl_lock (); /* needed due to Ioctl calling sequence */ + free_netdev (dev); +#endif + } + return ret; +} + +STATIC status_t +do_get_chan_stats (struct net_device * ndev, void *data) +{ + struct c4_chan_stats_wrap ccs; + int ret; + + if (copy_from_user (&ccs, data, + sizeof (struct c4_chan_stats_wrap))) + return -EFAULT; + switch (ret = mkret (c4_get_chan_stats (ccs.channum, &ccs.stats))) + { + case 0: + break; + default: + return ret; + } + if (copy_to_user (data, &ccs, + sizeof (struct c4_chan_stats_wrap))) + return -EFAULT; + return 0; +} +STATIC status_t +do_set_loglevel (struct net_device * ndev, void *data) +{ + unsigned int log_level; + + if (copy_from_user (&log_level, data, sizeof (int))) + return -EFAULT; + sbecom_set_loglevel (log_level); + return 0; +} + +STATIC status_t +do_deluser (struct net_device * ndev, int lockit) +{ + if (ndev->flags & IFF_UP) + return -EBUSY; + + { + ci_t *ci; + mch_t *ch; + const struct c4_priv *priv; + int channum; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + priv = DEV_TO_PRIV (ndev); +#else + priv = (struct c4_priv *) dev_to_hdlc (ndev)->priv; +#endif + ci = priv->ci; + channum = priv->channum; + + ch = c4_find_chan (channum); + if (ch == NULL) + return -ENOENT; + ch->user = 0; /* will be freed, below */ + } + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + if (lockit) + rtnl_unlock (); /* needed if Ioctl calling sequence */ + V7 (unregister_hdlc_device) (dev_to_hdlc (ndev)); + if (lockit) + rtnl_lock (); /* needed if Ioctl calling sequence */ + OS_kfree (DEV_TO_PRIV (ndev)); + OS_kfree (ndev); +#else + if (lockit) + rtnl_unlock (); /* needed if Ioctl calling sequence */ + unregister_hdlc_device (ndev); + if (lockit) + rtnl_lock (); /* needed if Ioctl calling sequence */ + free_netdev (ndev); +#endif + return 0; +} + +int +do_del_chan (struct net_device * musycc_dev, void *data) +{ + struct sbecom_chan_param cp; + char buf[sizeof (CHANNAME) + 3]; + struct net_device *dev; + int ret; + + if (copy_from_user (&cp, data, + sizeof (struct sbecom_chan_param))) + return -EFAULT; + sprintf (buf, CHANNAME "%d", cp.channum); + if (!(dev = dev_get_by_name (&init_net, buf))) + return -ENOENT; + dev_put (dev); + ret = do_deluser (dev, 1); + if (ret) + return ret; + return c4_del_chan (cp.channum); +} +int c4_reset_board (void *); + +int +do_reset (struct net_device * musycc_dev, void *data) +{ + const struct c4_priv *priv; + int i; + + for (i = 0; i < 128; i++) + { + struct net_device *ndev; + char buf[sizeof (CHANNAME) + 3]; + + sprintf (buf, CHANNAME "%d", i); + if (!(ndev = dev_get_by_name(&init_net, buf))) + continue; + priv = dev_to_hdlc (ndev)->priv; + + if ((unsigned long) (priv->ci) == + (unsigned long) (netdev_priv(musycc_dev))) + { + ndev->flags &= ~IFF_UP; + dev_put (ndev); + netif_stop_queue (ndev); + do_deluser (ndev, 1); + } else + dev_put (ndev); + } + return 0; +} + +int +do_reset_chan_stats (struct net_device * musycc_dev, void *data) +{ + struct sbecom_chan_param cp; + + if (copy_from_user (&cp, data, + sizeof (struct sbecom_chan_param))) + return -EFAULT; + return mkret (c4_del_chan_stats (cp.channum)); +} + +STATIC status_t +c4_ioctl (struct net_device * ndev, struct ifreq * ifr, int cmd) +{ + ci_t *ci; + void *data; + int iocmd, iolen; + status_t ret; + static struct data + { + union + { + u_int8_t c; + u_int32_t i; + struct sbe_brd_info bip; + struct sbe_drv_info dip; + struct sbe_iid_info iip; + struct sbe_brd_addr bap; + struct sbecom_chan_stats stats; + struct sbecom_chan_param param; + struct temux_card_stats cards; + struct sbecom_card_param cardp; + struct sbecom_framer_param frp; + } u; + } arg; + + + if (!capable (CAP_SYS_ADMIN)) + return -EPERM; + if (cmd != SIOCDEVPRIVATE + 15) + return -EINVAL; + if (!(ci = get_ci_by_dev (ndev))) + return -EINVAL; + if (ci->state != C_RUNNING) + return -ENODEV; + if (copy_from_user (&iocmd, ifr->ifr_data, sizeof (iocmd))) + return -EFAULT; +#if 0 + if (copy_from_user (&len, ifr->ifr_data + sizeof (iocmd), sizeof (len))) + return -EFAULT; +#endif + +#if 0 + printk ("c4_ioctl: iocmd %x, dir %x type %x nr %x iolen %d.\n", iocmd, + _IOC_DIR (iocmd), _IOC_TYPE (iocmd), _IOC_NR (iocmd), + _IOC_SIZE (iocmd)); +#endif + iolen = _IOC_SIZE (iocmd); + data = ifr->ifr_data + sizeof (iocmd); + if (copy_from_user (&arg, data, iolen)) + return -EFAULT; + + ret = 0; + switch (iocmd) + { + case SBE_IOC_PORT_GET: + //printk (">> SBE_IOC_PORT_GET Ioctl...\n"); + ret = do_get_port (ndev, data); + break; + case SBE_IOC_PORT_SET: + //printk (">> SBE_IOC_PORT_SET Ioctl...\n"); + ret = do_set_port (ndev, data); + break; + case SBE_IOC_CHAN_GET: + //printk (">> SBE_IOC_CHAN_GET Ioctl...\n"); + ret = do_get_chan (ndev, data); + break; + case SBE_IOC_CHAN_SET: + //printk (">> SBE_IOC_CHAN_SET Ioctl...\n"); + ret = do_set_chan (ndev, data); + break; + case C4_DEL_CHAN: + //printk (">> C4_DEL_CHAN Ioctl...\n"); + ret = do_del_chan (ndev, data); + break; + case SBE_IOC_CHAN_NEW: + ret = do_create_chan (ndev, data); + break; + case SBE_IOC_CHAN_GET_STAT: + ret = do_get_chan_stats (ndev, data); + break; + case SBE_IOC_LOGLEVEL: + ret = do_set_loglevel (ndev, data); + break; + case SBE_IOC_RESET_DEV: + ret = do_reset (ndev, data); + break; + case SBE_IOC_CHAN_DEL_STAT: + ret = do_reset_chan_stats (ndev, data); + break; + case C4_LOOP_PORT: + ret = do_port_loop (ndev, data); + break; + case C4_RW_FRMR: + ret = do_framer_rw (ndev, data); + break; + case C4_RW_MSYC: + ret = do_musycc_rw (ndev, data); + break; + case C4_RW_PLD: + ret = do_pld_rw (ndev, data); + break; + case SBE_IOC_IID_GET: + ret = (iolen == sizeof (struct sbe_iid_info)) ? c4_get_iidinfo (ci, &arg.u.iip) : -EFAULT; + if (ret == 0) /* no error, copy data */ + if (copy_to_user (data, &arg, iolen)) + return -EFAULT; + break; + default: + //printk (">> c4_ioctl: EINVAL - unknown iocmd <%x>\n", iocmd); + ret = -EINVAL; + break; + } + return mkret (ret); +} + +static const struct net_device_ops c4_ops = { + .ndo_open = void_open, + .ndo_start_xmit = c4_linux_xmit, + .ndo_do_ioctl = c4_ioctl, +}; + +static void c4_setup(struct net_device *dev) +{ + dev->type = ARPHRD_VOID; + dev->netdev_ops = &c4_ops; +} + +struct net_device *__init +c4_add_dev (hdw_info_t * hi, int brdno, unsigned long f0, unsigned long f1, + int irq0, int irq1) +{ + struct net_device *ndev; + ci_t *ci; + + ndev = alloc_netdev(sizeof(ci_t), SBE_IFACETMPL, c4_setup); + if (!ndev) + { + printk (KERN_WARNING "%s: no memory for struct net_device !\n", hi->devname); + error_flag = ENOMEM; + return 0; + } + ci = (ci_t *)(netdev_priv(ndev)); + ndev->irq = irq0; + + ci->hdw_info = hi; + ci->state = C_INIT; /* mark as hardware not available */ + ci->next = c4_list; + c4_list = ci; + ci->brdno = ci->next ? ci->next->brdno + 1 : 0; + + if (CI == 0) + CI = ci; /* DEBUG, only board 0 usage */ + + strcpy (ci->devname, hi->devname); + ci->release = &pmcc4_OSSI_release[0]; + + /* tasklet */ +#if defined(SBE_ISR_TASKLET) + tasklet_init (&ci->ci_musycc_isr_tasklet, + (void (*) (unsigned long)) musycc_intr_bh_tasklet, + (unsigned long) ci); + + if (atomic_read (&ci->ci_musycc_isr_tasklet.count) == 0) + tasklet_disable_nosync (&ci->ci_musycc_isr_tasklet); +#elif defined(SBE_ISR_IMMEDIATE) + ci->ci_musycc_isr_tq.routine = (void *) (unsigned long) musycc_intr_bh_tasklet; + ci->ci_musycc_isr_tq.data = ci; +#endif + + + if (register_netdev (ndev) || + (c4_init (ci, (u_char *) f0, (u_char *) f1) != SBE_DRVR_SUCCESS)) + { + OS_kfree (netdev_priv(ndev)); + OS_kfree (ndev); + error_flag = ENODEV; + return 0; + } + /************************************************************* + * int request_irq(unsigned int irq, + * void (*handler)(int, void *, struct pt_regs *), + * unsigned long flags, const char *dev_name, void *dev_id); + * wherein: + * irq -> The interrupt number that is being requested. + * handler -> Pointer to handling function being installed. + * flags -> A bit mask of options related to interrupt management. + * dev_name -> String used in /proc/interrupts to show owner of interrupt. + * dev_id -> Pointer (for shared interrupt lines) to point to its own + * private data area (to identify which device is interrupting). + * + * extern void free_irq(unsigned int irq, void *dev_id); + **************************************************************/ + + if (request_irq (irq0, &c4_linux_interrupt, +#if defined(SBE_ISR_TASKLET) + IRQF_DISABLED | IRQF_SHARED, +#elif defined(SBE_ISR_IMMEDIATE) + IRQF_DISABLED | IRQF_SHARED, +#elif defined(SBE_ISR_INLINE) + IRQF_SHARED, +#endif + ndev->name, ndev)) + { + printk (KERN_WARNING "%s: MUSYCC could not get irq: %d\n", + ndev->name, irq0); + unregister_netdev (ndev); + OS_kfree (netdev_priv(ndev)); + OS_kfree (ndev); + error_flag = EIO; + return 0; + } +#ifdef CONFIG_SBE_PMCC4_NCOMM + if (request_irq (irq1, &c4_ebus_interrupt, IRQF_SHARED, ndev->name, ndev)) + { + printk (KERN_WARNING "%s: EBUS could not get irq: %d\n", + hi->devname, irq1); + unregister_netdev (ndev); + free_irq (irq0, ndev); + OS_kfree (ndev->priv); + OS_kfree (ndev); + error_flag = EIO; + return 0; + } +#endif + + /* setup board identification information */ + + { + u_int32_t tmp; + + hdw_sn_get (hi, brdno); /* also sets PROM format type (promfmt) + * for later usage */ + + switch (hi->promfmt) + { + case PROM_FORMAT_TYPE1: + memcpy (ndev->dev_addr, (FLD_TYPE1 *) (hi->mfg_info.pft1.Serial), 6); + memcpy (&tmp, (FLD_TYPE1 *) (hi->mfg_info.pft1.Id), 4); /* unaligned data + * acquisition */ + ci->brd_id = cpu_to_be32 (tmp); + break; + case PROM_FORMAT_TYPE2: + memcpy (ndev->dev_addr, (FLD_TYPE2 *) (hi->mfg_info.pft2.Serial), 6); + memcpy (&tmp, (FLD_TYPE2 *) (hi->mfg_info.pft2.Id), 4); /* unaligned data + * acquisition */ + ci->brd_id = cpu_to_be32 (tmp); + break; + default: + ci->brd_id = 0; + memset (ndev->dev_addr, 0, 6); + break; + } + +#if 1 + sbeid_set_hdwbid (ci); /* requires bid to be preset */ +#else + sbeid_set_bdtype (ci); /* requires hdw_bid to be preset */ +#endif + + } + +#ifdef CONFIG_PROC_FS + sbecom_proc_brd_init (ci); +#endif +#if defined(SBE_ISR_TASKLET) + tasklet_enable (&ci->ci_musycc_isr_tasklet); +#endif + + + if ((error_flag = c4_init2 (ci)) != SBE_DRVR_SUCCESS) + { +#ifdef CONFIG_PROC_FS + sbecom_proc_brd_cleanup (ci); +#endif + unregister_netdev (ndev); + free_irq (irq1, ndev); + free_irq (irq0, ndev); + OS_kfree (netdev_priv(ndev)); + OS_kfree (ndev); + return 0; /* failure, error_flag is set */ + } + return ndev; +} + +STATIC int __init +c4_mod_init (void) +{ + int rtn; + + printk (KERN_WARNING "%s: %s\n", THIS_MODULE->name, pmcc4_OSSI_release); + if ((rtn = c4hw_attach_all ())) + return -rtn; /* installation failure - see system log */ + + /* housekeeping notifications */ + if (log_level != log_level_default) + printk (KERN_INFO "%s NOTE: driver parameter <log_level> changed from default %d to %d.\n", + THIS_MODULE->name, log_level_default, log_level); + if (max_mru != max_mru_default) + printk (KERN_INFO "%s NOTE: driver parameter <max_mru> changed from default %d to %d.\n", + THIS_MODULE->name, max_mru_default, max_mru); + if (max_mtu != max_mtu_default) + printk (KERN_INFO "%s NOTE: driver parameter <max_mtu> changed from default %d to %d.\n", + THIS_MODULE->name, max_mtu_default, max_mtu); + if (max_rxdesc_used != max_rxdesc_default) + { + if (max_rxdesc_used > 2000) + max_rxdesc_used = 2000; /* out-of-bounds reset */ + printk (KERN_INFO "%s NOTE: driver parameter <max_rxdesc_used> changed from default %d to %d.\n", + THIS_MODULE->name, max_rxdesc_default, max_rxdesc_used); + } + if (max_txdesc_used != max_txdesc_default) + { + if (max_txdesc_used > 1000) + max_txdesc_used = 1000; /* out-of-bounds reset */ + printk (KERN_INFO "%s NOTE: driver parameter <max_txdesc_used> changed from default %d to %d.\n", + THIS_MODULE->name, max_txdesc_default, max_txdesc_used); + } + return 0; /* installation success */ +} + + + /* + * find any still allocated hdlc registrations and unregister via call to + * do_deluser() + */ + +STATIC void __exit +cleanup_hdlc (void) +{ + hdw_info_t *hi; + ci_t *ci; + struct net_device *ndev; + int i, j, k; + + for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++) + { + if (hi->ndev) /* a board has been attached */ + { + ci = (ci_t *)(netdev_priv(hi->ndev)); + for (j = 0; j < ci->max_port; j++) + for (k = 0; k < MUSYCC_NCHANS; k++) + if ((ndev = ci->port[j].chan[k]->user)) + { + do_deluser (ndev, 0); + } + } + } +} + + +STATIC void __exit +c4_mod_remove (void) +{ + cleanup_hdlc (); /* delete any missed channels */ + cleanup_devs (); + c4_cleanup (); + cleanup_ioremap (); + printk (KERN_INFO "SBE %s - driver removed.\n", THIS_MODULE->name); +} + +module_init (c4_mod_init); +module_exit (c4_mod_remove); + +#ifndef SBE_INCLUDE_SYMBOLS +#ifndef CONFIG_SBE_WANC24_NCOMM +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +EXPORT_NO_SYMBOLS; +#endif +#endif +#endif + +MODULE_AUTHOR ("SBE Technical Services <support@sbei.com>"); +MODULE_DESCRIPTION ("wanPCI-CxT1E1 Generic HDLC WAN Driver module"); +#ifdef MODULE_LICENSE +MODULE_LICENSE ("GPL"); +#endif + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/musycc.c b/drivers/staging/cxt1e1/musycc.c new file mode 100644 index 000000000000..650c9c02f223 --- /dev/null +++ b/drivers/staging/cxt1e1/musycc.c @@ -0,0 +1,2180 @@ +/* + * $Id: musycc.c,v 2.1 2007/08/15 23:32:17 rickd PMCC4_3_1B $ + */ + +unsigned int max_intcnt = 0; +unsigned int max_bh = 0; + +/*----------------------------------------------------------------------------- + * musycc.c - + * + * Copyright (C) 2007 One Stop Systems, Inc. + * Copyright (C) 2003-2006 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@onestopsystems.com + * One Stop Systems, Inc. Escondido, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 2.1 $ + * Last changed on $Date: 2007/08/15 23:32:17 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: musycc.c,v $ + * Revision 2.1 2007/08/15 23:32:17 rickd + * Use 'if 0' instead of GNU comment delimeter to avoid line wrap induced compiler errors. + * + * Revision 2.0 2007/08/15 22:13:20 rickd + * Update to printf pointer %p usage and correct some UINT to ULONG for + * 64bit comptibility. + * + * Revision 1.7 2006/04/21 00:56:40 rickd + * workqueue files now prefixed with <sbecom> prefix. + * + * Revision 1.6 2005/10/27 18:54:19 rickd + * Clean out old code. Default to HDLC_FCS16, not TRANS. + * + * Revision 1.5 2005/10/17 23:55:28 rickd + * Initial port of NCOMM support patches from original work found + * in pmc_c4t1e1 as updated by NCOMM. Ref: CONFIG_SBE_PMCC4_NCOMM. + * + * Revision 1.4 2005/10/13 20:35:25 rickd + * Cleanup warning for unused <flags> variable. + * + * Revision 1.3 2005/10/13 19:19:22 rickd + * Disable redundant driver removal cleanup code. + * + * Revision 1.2 2005/10/11 18:36:16 rickd + * Clean up warning messages caused by de-implemented some <flags> associated + * with spin_lock() removals. + * + * Revision 1.1 2005/10/05 00:45:28 rickd + * Re-enable xmit on flow-controlled and full channel to fix restart hang. + * Add some temp spin-lock debug code (rld_spin_owner). + * + * Revision 1.0 2005/09/28 00:10:06 rickd + * Initial release for C4T1E1 support. Lots of transparent + * mode updates. + * + *----------------------------------------------------------------------------- + */ + +char SBEid_pmcc4_musyccc[] = +"@(#)musycc.c - $Revision: 2.1 $ (c) Copyright 2004-2006 SBE, Inc."; + + +#include <linux/types.h> +#include "pmcc4_sysdep.h" +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/init.h> +#include "sbecom_inline_linux.h" +#include "libsbew.h" +#include "pmcc4_private.h" +#include "pmcc4.h" +#include "musycc.h" + +#ifdef SBE_INCLUDE_SYMBOLS +#define STATIC +#else +#define STATIC static +#endif + +#define sd_find_chan(ci,ch) c4_find_chan(ch) + + +/*******************************************************************/ +/* global driver variables */ +extern ci_t *c4_list; +extern int drvr_state; +extern int log_level; + +extern int max_mru; +extern int max_mtu; +extern int max_rxdesc_used; +extern int max_txdesc_used; +extern ci_t *CI; /* dummy pointr to board ZEROE's data - DEBUG + * USAGE */ + + +/*******************************************************************/ +/* forward references */ +void c4_fifo_free (mpi_t *, int); +void c4_wk_chan_restart (mch_t *); +void musycc_bh_tx_eom (mpi_t *, int); +int musycc_chan_up (ci_t *, int); +status_t __init musycc_init (ci_t *); +STATIC void __init musycc_init_port (mpi_t *); +void musycc_intr_bh_tasklet (ci_t *); +void musycc_serv_req (mpi_t *, u_int32_t); +void musycc_update_timeslots (mpi_t *); + +/*******************************************************************/ + +#if 1 +STATIC int +musycc_dump_rxbuffer_ring (mch_t * ch, int lockit) +{ + struct mdesc *m; + unsigned long flags = 0; + + u_int32_t status; + int n; + + if (lockit) + { + spin_lock_irqsave (&ch->ch_rxlock, flags); + } + if (ch->rxd_num == 0) + { + printk (" ZERO receive buffers allocated for this channel."); + } else + { + FLUSH_MEM_READ (); + m = &ch->mdr[ch->rxix_irq_srv]; + for (n = ch->rxd_num; n; n--) + { + status = le32_to_cpu (m->status); + { + printk ("%c %08lx[%2d]: sts %08x (%c%c%c%c:%d.) Data [%08x] Next [%08x]\n", + (m == &ch->mdr[ch->rxix_irq_srv]) ? 'F' : ' ', + (unsigned long) m, n, + status, + m->data ? (status & HOST_RX_OWNED ? 'H' : 'M') : '-', + status & POLL_DISABLED ? 'P' : '-', + status & EOBIRQ_ENABLE ? 'b' : '-', + status & EOMIRQ_ENABLE ? 'm' : '-', + status & LENGTH_MASK, + le32_to_cpu (m->data), le32_to_cpu (m->next)); +#ifdef RLD_DUMP_BUFDATA + { + u_int32_t *dp; + int len = status & LENGTH_MASK; + +#if 1 + if (m->data && (status & HOST_RX_OWNED)) +#else + if (m->data) /* always dump regardless of valid RX + * data */ +#endif + { + dp = (u_int32_t *) OS_phystov ((void *) (le32_to_cpu (m->data))); + if (len >= 0x10) + printk (" %x[%x]: %08X %08X %08X %08x\n", (u_int32_t) dp, len, + *dp, *(dp + 1), *(dp + 2), *(dp + 3)); + else if (len >= 0x08) + printk (" %x[%x]: %08X %08X\n", (u_int32_t) dp, len, + *dp, *(dp + 1)); + else + printk (" %x[%x]: %08X\n", (u_int32_t) dp, len, *dp); + } + } +#endif + } + m = m->snext; + } + } /* -for- */ + printk ("\n"); + + if (lockit) + { + spin_unlock_irqrestore (&ch->ch_rxlock, flags); + } + return 0; +} +#endif + +#if 1 +STATIC int +musycc_dump_txbuffer_ring (mch_t * ch, int lockit) +{ + struct mdesc *m; + unsigned long flags = 0; + u_int32_t status; + int n; + + if (lockit) + { + spin_lock_irqsave (&ch->ch_txlock, flags); + } + if (ch->txd_num == 0) + { + printk (" ZERO transmit buffers allocated for this channel."); + } else + { + FLUSH_MEM_READ (); + m = ch->txd_irq_srv; + for (n = ch->txd_num; n; n--) + { + status = le32_to_cpu (m->status); + { + printk ("%c%c %08lx[%2d]: sts %08x (%c%c%c%c:%d.) Data [%08x] Next [%08x]\n", + (m == ch->txd_usr_add) ? 'F' : ' ', + (m == ch->txd_irq_srv) ? 'L' : ' ', + (unsigned long) m, n, + status, + m->data ? (status & MUSYCC_TX_OWNED ? 'M' : 'H') : '-', + status & POLL_DISABLED ? 'P' : '-', + status & EOBIRQ_ENABLE ? 'b' : '-', + status & EOMIRQ_ENABLE ? 'm' : '-', + status & LENGTH_MASK, + le32_to_cpu (m->data), le32_to_cpu (m->next)); +#ifdef RLD_DUMP_BUFDATA + { + u_int32_t *dp; + int len = status & LENGTH_MASK; + + if (m->data) + { + dp = (u_int32_t *) OS_phystov ((void *) (le32_to_cpu (m->data))); + if (len >= 0x10) + printk (" %x[%x]: %08X %08X %08X %08x\n", (u_int32_t) dp, len, + *dp, *(dp + 1), *(dp + 2), *(dp + 3)); + else if (len >= 0x08) + printk (" %x[%x]: %08X %08X\n", (u_int32_t) dp, len, + *dp, *(dp + 1)); + else + printk (" %x[%x]: %08X\n", (u_int32_t) dp, len, *dp); + } + } +#endif + } + m = m->snext; + } + } /* -for- */ + printk ("\n"); + + if (lockit) + { + spin_unlock_irqrestore (&ch->ch_txlock, flags); + } + return 0; +} +#endif + + +/* + * The following supports a backdoor debug facility which can be used to + * display the state of a board's channel. + */ + +status_t +musycc_dump_ring (ci_t * ci, unsigned int chan) +{ + mch_t *ch; + + if (chan >= MAX_CHANS_USED) + { + return SBE_DRVR_FAIL; /* E2BIG */ + } + { + int bh; + + bh = atomic_read (&ci->bh_pending); + printk (">> bh_pend %d [%d] ihead %d itail %d [%d] th_cnt %d bh_cnt %d wdcnt %d note %d\n", + bh, max_bh, ci->iqp_headx, ci->iqp_tailx, max_intcnt, + ci->intlog.drvr_intr_thcount, + ci->intlog.drvr_intr_bhcount, + ci->wdcount, ci->wd_notify); + max_bh = 0; /* reset counter */ + max_intcnt = 0; /* reset counter */ + } + + if (!(ch = sd_find_chan (dummy, chan))) + { + printk (">> musycc_dump_ring: channel %d not up.\n", chan); + return ENOENT; + } + printk (">> CI %p CHANNEL %3d @ %p: state %x status/p %x/%x\n", ci, chan, ch, ch->state, + ch->status, ch->p.status); + printk ("--------------------------------\nTX Buffer Ring - Channel %d, txd_num %d. (bd/ch pend %d %d), TXD required %d, txpkt %lu\n", + chan, ch->txd_num, + (u_int32_t) atomic_read (&ci->tx_pending), (u_int32_t) atomic_read (&ch->tx_pending), ch->txd_required, ch->s.tx_packets); + printk ("++ User 0x%p IRQ_SRV 0x%p USR_ADD 0x%p QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n", + ch->user, ch->txd_irq_srv, ch->txd_usr_add, + sd_queue_stopped (ch->user), + ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode); + musycc_dump_txbuffer_ring (ch, 1); + printk ("RX Buffer Ring - Channel %d, rxd_num %d. IRQ_SRV[%d] 0x%p, start_rx %x rxpkt %lu\n", + chan, ch->rxd_num, ch->rxix_irq_srv, + &ch->mdr[ch->rxix_irq_srv], ch->ch_start_rx, ch->s.rx_packets); + musycc_dump_rxbuffer_ring (ch, 1); + + return SBE_DRVR_SUCCESS; +} + + +status_t +musycc_dump_rings (ci_t * ci, unsigned int start_chan) +{ + unsigned int chan; + + for (chan = start_chan; chan < (start_chan + 5); chan++) + musycc_dump_ring (ci, chan); + return SBE_DRVR_SUCCESS; +} + + +/* + * NOTE on musycc_init_mdt(): These MUSYCC writes are only operational after + * a MUSYCC GROUP_INIT command has been issued. + */ + +void +musycc_init_mdt (mpi_t * pi) +{ + u_int32_t *addr, cfg; + int i; + + /* + * This Idle Code insertion takes effect prior to channel's first + * transmitted message. After that, each message contains its own Idle + * Code information which is to be issued after the message is + * transmitted (Ref.MUSYCC 5.2.2.3: MCENBL bit in Group Configuration + * Descriptor). + */ + + addr = (u_int32_t *) ((u_long) pi->reg + MUSYCC_MDT_BASE03_ADDR); + cfg = CFG_CH_FLAG_7E << IDLE_CODE; + + for (i = 0; i < 32; addr++, i++) + { + pci_write_32 (addr, cfg); + } +} + + +/* Set TX thp to the next unprocessed md */ + +void +musycc_update_tx_thp (mch_t * ch) +{ + struct mdesc *md; + unsigned long flags; + + spin_lock_irqsave (&ch->ch_txlock, flags); + while (1) + { + md = ch->txd_irq_srv; + FLUSH_MEM_READ (); + if (!md->data) + { + /* No MDs with buffers to process */ + spin_unlock_irqrestore (&ch->ch_txlock, flags); + return; + } + if ((le32_to_cpu (md->status)) & MUSYCC_TX_OWNED) + { + /* this is the MD to restart TX with */ + break; + } + /* + * Otherwise, we have a valid, host-owned message descriptor which + * has been successfully transmitted and whose buffer can be freed, + * so... process this MD, it's owned by the host. (This might give + * as a new, updated txd_irq_srv.) + */ + musycc_bh_tx_eom (ch->up, ch->gchan); + } + md = ch->txd_irq_srv; + ch->up->regram->thp[ch->gchan] = cpu_to_le32 (OS_vtophys (md)); + FLUSH_MEM_WRITE (); + + if (ch->tx_full) + { + ch->tx_full = 0; + ch->txd_required = 0; + sd_enable_xmit (ch->user); /* re-enable to catch flow controlled + * channel */ + } + spin_unlock_irqrestore (&ch->ch_txlock, flags); + +#ifdef RLD_TRANS_DEBUG + printk ("++ musycc_update_tx_thp[%d]: setting thp = %p, sts %x\n", ch->channum, md, md->status); +#endif +} + + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41) +/* + * This is the workq task executed by the OS when our queue_work() is + * scheduled and run. It can fire off either RX or TX ACTIVATION depending + * upon the channel's ch_start_tx and ch_start_rx variables. This routine + * is implemented as a work queue so that the call to the service request is + * able to sleep, awaiting an interrupt acknowledgment response (SACK) from + * the hardware. + */ + +void +musycc_wq_chan_restart (void *arg) /* channel private structure */ +{ + mch_t *ch; + mpi_t *pi; + struct mdesc *md; +#if 0 + unsigned long flags; +#endif + + ch = container_of(arg, struct c4_chan_info, ch_work); + pi = ch->up; + +#ifdef RLD_TRANS_DEBUG + printk ("wq_chan_restart[%d]: start_RT[%d/%d] status %x\n", + ch->channum, ch->ch_start_rx, ch->ch_start_tx, ch->status); + +#endif + + /**********************************/ + /** check for RX restart request **/ + /**********************************/ + + if ((ch->ch_start_rx) && (ch->status & RX_ENABLED)) + { + + ch->ch_start_rx = 0; +#if defined(RLD_TRANS_DEBUG) || defined(RLD_RXACT_DEBUG) + { + static int hereb4 = 7; + + if (hereb4) /* RLD DEBUG */ + { + hereb4--; +#ifdef RLD_TRANS_DEBUG + md = &ch->mdr[ch->rxix_irq_srv]; + printk ("++ musycc_wq_chan_restart[%d] CHAN RX ACTIVATE: rxix_irq_srv %d, md %p sts %x, rxpkt %lu\n", + ch->channum, ch->rxix_irq_srv, md, le32_to_cpu (md->status), + ch->s.rx_packets); +#elif defined(RLD_RXACT_DEBUG) + md = &ch->mdr[ch->rxix_irq_srv]; + printk ("++ musycc_wq_chan_restart[%d] CHAN RX ACTIVATE: rxix_irq_srv %d, md %p sts %x, rxpkt %lu\n", + ch->channum, ch->rxix_irq_srv, md, le32_to_cpu (md->status), + ch->s.rx_packets); + musycc_dump_rxbuffer_ring (ch, 1); /* RLD DEBUG */ +#endif + } + } +#endif + musycc_serv_req (pi, SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION | ch->gchan); + } + /**********************************/ + /** check for TX restart request **/ + /**********************************/ + + if ((ch->ch_start_tx) && (ch->status & TX_ENABLED)) + { + /* find next unprocessed message, then set TX thp to it */ + musycc_update_tx_thp (ch); + +#if 0 + spin_lock_irqsave (&ch->ch_txlock, flags); +#endif + md = ch->txd_irq_srv; + if (!md) + { +#ifdef RLD_TRANS_DEBUG + printk ("-- musycc_wq_chan_restart[%d]: WARNING, starting NULL md\n", ch->channum); +#endif +#if 0 + spin_unlock_irqrestore (&ch->ch_txlock, flags); +#endif + } else if (md->data && ((le32_to_cpu (md->status)) & MUSYCC_TX_OWNED)) + { + ch->ch_start_tx = 0; +#if 0 + spin_unlock_irqrestore (&ch->ch_txlock, flags); /* allow interrupts for service request */ +#endif +#ifdef RLD_TRANS_DEBUG + printk ("++ musycc_wq_chan_restart() CHAN TX ACTIVATE: chan %d txd_irq_srv %p = sts %x, txpkt %lu\n", + ch->channum, ch->txd_irq_srv, ch->txd_irq_srv->status, ch->s.tx_packets); +#endif + musycc_serv_req (pi, SR_CHANNEL_ACTIVATE | SR_TX_DIRECTION | ch->gchan); + } +#ifdef RLD_RESTART_DEBUG + else + { + /* retain request to start until retried and we have data to xmit */ + printk ("-- musycc_wq_chan_restart[%d]: DELAYED due to md %p sts %x data %x, start_tx %x\n", + ch->channum, md, + le32_to_cpu (md->status), + le32_to_cpu (md->data), ch->ch_start_tx); + musycc_dump_txbuffer_ring (ch, 0); +#if 0 + spin_unlock_irqrestore (&ch->ch_txlock, flags); /* allow interrupts for service request */ +#endif + } +#endif + } +} +#endif + + + /* + * Channel restart either fires of a workqueue request (2.6) or lodges a + * watchdog activation sequence (2.4). + */ + +void +musycc_chan_restart (mch_t * ch) +{ +#ifdef RLD_RESTART_DEBUG + printk ("++ musycc_chan_restart[%d]: txd_irq_srv @ %p = sts %x\n", + ch->channum, ch->txd_irq_srv, ch->txd_irq_srv->status); +#endif + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41) + /* 2.6 - find next unprocessed message, then set TX thp to it */ +#ifdef RLD_RESTART_DEBUG + printk (">> musycc_chan_restart: scheduling Chan %x workQ @ %p\n", ch->channum, &ch->ch_work); +#endif + c4_wk_chan_restart (ch); /* work queue mechanism fires off: Ref: + * musycc_wq_chan_restart () */ + +#else + + + /* 2.4 - find next unprocessed message, then set TX thp to it */ +#ifdef RLD_RESTART_DEBUG + printk (">> musycc_chan_restart: scheduling Chan %x start_tx %x\n", ch->channum, ch->ch_start_tx); +#endif + /* restart transmission from background loop */ + ch->up->up->wd_notify = WD_NOTIFY_1TX; +#endif +} + + +#if 0 +void +musycc_cleanup (ci_t * ci) +{ + mpi_t *pi; + int i, j; + + /* free up driver resources */ + ci->state = C_INIT; /* mark as hardware not available */ + + for (i = 0; i < ci->max_ports; i++) + { + pi = &ci->port[i]; +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41) + c4_wq_port_cleanup (pi); +#endif + for (j = 0; j < MUSYCC_NCHANS; j++) + { + if (pi->chan[j]) + OS_kfree (pi->chan[j]); /* free mch_t struct */ + } + OS_kfree (pi->regram_saved); + } +#if 0 + /* obsolete - watchdog is now static w/in ci_t */ + OS_free_watchdog (ci->wd); +#endif + OS_kfree (ci->iqd_p_saved); + OS_kfree (ci); +} +#endif + +void +rld_put_led (mpi_t * pi, u_int32_t ledval) +{ + static u_int32_t led = 0; + + if (ledval == 0) + led = 0; + else + led |= ledval; + + pci_write_32 ((u_int32_t *) &pi->up->cpldbase->leds, led); /* RLD DEBUG TRANHANG */ +} + + +#define MUSYCC_SR_RETRY_CNT 9 + +void +musycc_serv_req (mpi_t * pi, u_int32_t req) +{ + volatile u_int32_t r; + int rcnt; + + /* + * PORT NOTE: Semaphore protect service loop guarantees only a single + * operation at a time. Per MUSYCC Manual - "Issuing service requests to + * the same channel group without first receiving ACK from each request + * may cause the host to lose track of which service request has been + * acknowledged." + */ + + SD_SEM_TAKE (&pi->sr_sem_busy, "serv"); /* only 1 thru here, per + * group */ + + if (pi->sr_last == req) + { +#ifdef RLD_TRANS_DEBUG + printk (">> same SR, Port %d Req %x\n", pi->portnum, req); +#endif + + /* + * The most likely repeated request is the channel activation command + * which follows the occurrence of a Transparent mode TX ONR or a + * BUFF error. If the previous command was a CHANNEL ACTIVATE, + * precede it with a NOOP command in order maintain coherent control + * of this current (re)ACTIVATE. + */ + + r = (pi->sr_last & ~SR_GCHANNEL_MASK); + if ((r == (SR_CHANNEL_ACTIVATE | SR_TX_DIRECTION)) || + (r == (SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION))) + { +#ifdef RLD_TRANS_DEBUG + printk (">> same CHAN ACT SR, Port %d Req %x => issue SR_NOOP CMD\n", pi->portnum, req); +#endif + SD_SEM_GIVE (&pi->sr_sem_busy); /* allow this next request */ + musycc_serv_req (pi, SR_NOOP); + SD_SEM_TAKE (&pi->sr_sem_busy, "serv"); /* relock & continue w/ + * original req */ + } else if (req == SR_NOOP) + { + /* no need to issue back-to-back SR_NOOP commands at this time */ +#ifdef RLD_TRANS_DEBUG + printk (">> same Port SR_NOOP skipped, Port %d\n", pi->portnum); +#endif + SD_SEM_GIVE (&pi->sr_sem_busy); /* allow this next request */ + return; + } + } + rcnt = 0; + pi->sr_last = req; +rewrite: + pci_write_32 ((u_int32_t *) &pi->reg->srd, req); + FLUSH_MEM_WRITE (); + + /* + * Per MUSYCC Manual, Section 6.1,2 - "When writing an SCR service + * request, the host must ensure at least one PCI bus clock cycle has + * elapsed before writing another service request. To meet this minimum + * elapsed service request write timing interval, it is recommended that + * the host follow any SCR write with another operation which reads from + * the same address." + */ + r = pci_read_32 ((u_int32_t *) &pi->reg->srd); /* adhere to write + * timing imposition */ + + + if ((r != req) && (req != SR_CHIP_RESET) && (++rcnt <= MUSYCC_SR_RETRY_CNT)) + { + if (log_level >= LOG_MONITOR) + printk ("%s: %d - reissue srv req/last %x/%x (hdw reads %x), Chan %d.\n", + pi->up->devname, rcnt, req, pi->sr_last, r, + (pi->portnum * MUSYCC_NCHANS) + (req & 0x1f)); + OS_uwait_dummy (); /* this delay helps reduce reissue counts + * (reason not yet researched) */ + goto rewrite; + } + if (rcnt > MUSYCC_SR_RETRY_CNT) + { + printk (KERN_WARNING "%s: failed service request (#%d)= %x, group %d.\n", + pi->up->devname, MUSYCC_SR_RETRY_CNT, req, pi->portnum); + SD_SEM_GIVE (&pi->sr_sem_busy); /* allow any next request */ + return; + } + if (req == SR_CHIP_RESET) + { + /* + * PORT NOTE: the CHIP_RESET command is NOT ack'd by the MUSYCC, thus + * the upcoming delay is used. Though the MUSYCC documentation + * suggests a read-after-write would supply the required delay, it's + * unclear what CPU/BUS clock speeds might have been assumed when + * suggesting this 'lack of ACK' workaround. Thus the use of uwait. + */ + OS_uwait (100000, "icard"); /* 100ms */ + } else + { + FLUSH_MEM_READ (); + SD_SEM_TAKE (&pi->sr_sem_wait, "sakack"); /* sleep until SACK + * interrupt occurs */ + } + SD_SEM_GIVE (&pi->sr_sem_busy); /* allow any next request */ +} + + +#ifdef SBE_PMCC4_ENABLE +void +musycc_update_timeslots (mpi_t * pi) +{ + int i, ch; + char e1mode = IS_FRAME_ANY_E1 (pi->p.port_mode); + + for (i = 0; i < 32; i++) + { + int usedby = 0, last = 0, ts, j, bits[8]; + + u_int8_t lastval = 0; + + if (((i == 0) && e1mode) || /* disable if E1 mode */ + ((i == 16) && ((pi->p.port_mode == CFG_FRAME_E1CRC_CAS) || (pi->p.port_mode == CFG_FRAME_E1CRC_CAS_AMI))) + || ((i > 23) && (!e1mode))) /* disable if T1 mode */ + { + pi->tsm[i] = 0xff; /* make tslot unavailable for this mode */ + } else + { + pi->tsm[i] = 0x00; /* make tslot available for assignment */ + } + for (j = 0; j < 8; j++) + bits[j] = -1; + for (ch = 0; ch < MUSYCC_NCHANS; ch++) + { + if ((pi->chan[ch]->state == UP) && (pi->chan[ch]->p.bitmask[i])) + { + usedby++; + last = ch; + lastval = pi->chan[ch]->p.bitmask[i]; + for (j = 0; j < 8; j++) + if (lastval & (1 << j)) + bits[j] = ch; + pi->tsm[i] |= lastval; + } + } + if (!usedby) + ts = 0; + else if ((usedby == 1) && (lastval == 0xff)) + ts = (4 << 5) | last; + else if ((usedby == 1) && (lastval == 0x7f)) + ts = (5 << 5) | last; + else + { + int idx; + + if (bits[0] < 0) + ts = (6 << 5) | (idx = last); + else + ts = (7 << 5) | (idx = bits[0]); + for (j = 1; j < 8; j++) + { + pi->regram->rscm[idx * 8 + j] = (bits[j] < 0) ? 0 : (0x80 | bits[j]); + pi->regram->tscm[idx * 8 + j] = (bits[j] < 0) ? 0 : (0x80 | bits[j]); + } + } + pi->regram->rtsm[i] = ts; + pi->regram->ttsm[i] = ts; + } + FLUSH_MEM_WRITE (); + + musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_RX_DIRECTION); + musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_TX_DIRECTION); + musycc_serv_req (pi, SR_SUBCHANNEL_MAP | SR_RX_DIRECTION); + musycc_serv_req (pi, SR_SUBCHANNEL_MAP | SR_TX_DIRECTION); +} +#endif + + +#ifdef SBE_WAN256T3_ENABLE +void +musycc_update_timeslots (mpi_t * pi) +{ + mch_t *ch; + + u_int8_t ts, hmask, tsen; + int gchan; + int i; + +#ifdef SBE_PMCC4_ENABLE + hmask = (0x1f << pi->up->p.hypersize) & 0x1f; +#endif +#ifdef SBE_WAN256T3_ENABLE + hmask = (0x1f << hyperdummy) & 0x1f; +#endif + for (i = 0; i < 128; i++) + { + gchan = ((pi->portnum * MUSYCC_NCHANS) + (i & hmask)) % MUSYCC_NCHANS; + ch = pi->chan[gchan]; + if (ch->p.mode_56k) + tsen = MODE_56KBPS; + else + tsen = MODE_64KBPS; /* also the default */ + ts = ((pi->portnum % 4) == (i / 32)) ? (tsen << 5) | (i & hmask) : 0; + pi->regram->rtsm[i] = ts; + pi->regram->ttsm[i] = ts; + } + FLUSH_MEM_WRITE (); + musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_RX_DIRECTION); + musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_TX_DIRECTION); +} +#endif + + + /* + * This routine converts a generic library channel configuration parameter + * into a hardware specific register value (IE. MUSYCC CCD Register). + */ +u_int32_t +musycc_chan_proto (int proto) +{ + int reg; + + switch (proto) + { + case CFG_CH_PROTO_TRANS: /* 0 */ + reg = MUSYCC_CCD_TRANS; + break; + case CFG_CH_PROTO_SS7: /* 1 */ + reg = MUSYCC_CCD_SS7; + break; + default: + case CFG_CH_PROTO_ISLP_MODE: /* 4 */ + case CFG_CH_PROTO_HDLC_FCS16: /* 2 */ + reg = MUSYCC_CCD_HDLC_FCS16; + break; + case CFG_CH_PROTO_HDLC_FCS32: /* 3 */ + reg = MUSYCC_CCD_HDLC_FCS32; + break; + } + + return reg; +} + +#ifdef SBE_WAN256T3_ENABLE +STATIC void __init +musycc_init_port (mpi_t * pi) +{ + pci_write_32 ((u_int32_t *) &pi->reg->gbp, OS_vtophys (pi->regram)); + + pi->regram->grcd = + __constant_cpu_to_le32 (MUSYCC_GRCD_RX_ENABLE | + MUSYCC_GRCD_TX_ENABLE | + MUSYCC_GRCD_SF_ALIGN | + MUSYCC_GRCD_SUBCHAN_DISABLE | + MUSYCC_GRCD_OOFMP_DISABLE | + MUSYCC_GRCD_COFAIRQ_DISABLE | + MUSYCC_GRCD_MC_ENABLE | + (MUSYCC_GRCD_POLLTH_32 << MUSYCC_GRCD_POLLTH_SHIFT)); + + pi->regram->pcd = + __constant_cpu_to_le32 (MUSYCC_PCD_E1X4_MODE | + MUSYCC_PCD_TXDATA_RISING | + MUSYCC_PCD_TX_DRIVEN); + + /* Message length descriptor */ + pi->regram->mld = __constant_cpu_to_le32 (max_mru | (max_mru << 16)); + FLUSH_MEM_WRITE (); + + musycc_serv_req (pi, SR_GROUP_INIT | SR_RX_DIRECTION); + musycc_serv_req (pi, SR_GROUP_INIT | SR_TX_DIRECTION); + + musycc_init_mdt (pi); + + musycc_update_timeslots (pi); +} +#endif + + +status_t __init +musycc_init (ci_t * ci) +{ + char *regaddr; /* temp for address boundary calculations */ + int i, gchan; + + OS_sem_init (&ci->sem_wdbusy, SEM_AVAILABLE); /* watchdog exclusion */ + + /* + * Per MUSYCC manual, Section 6.3.4 - "The host must allocate a dword + * aligned memory segment for interrupt queue pointers." + */ + +#define INT_QUEUE_BOUNDARY 4 + + regaddr = OS_kmalloc ((INT_QUEUE_SIZE + 1) * sizeof (u_int32_t)); + if (regaddr == 0) + return ENOMEM; + ci->iqd_p_saved = regaddr; /* save orig value for free's usage */ + ci->iqd_p = (u_int32_t *) ((unsigned long) (regaddr + INT_QUEUE_BOUNDARY - 1) & + (~(INT_QUEUE_BOUNDARY - 1))); /* this calculates + * closest boundary */ + + for (i = 0; i < INT_QUEUE_SIZE; i++) + { + ci->iqd_p[i] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY); + } + + for (i = 0; i < ci->max_port; i++) + { + mpi_t *pi = &ci->port[i]; + + /* + * Per MUSYCC manual, Section 6.3.2 - "The host must allocate a 2KB + * bound memory segment for Channel Group 0." + */ + +#define GROUP_BOUNDARY 0x800 + + regaddr = OS_kmalloc (sizeof (struct musycc_groupr) + GROUP_BOUNDARY); + if (regaddr == 0) + { + for (gchan = 0; gchan < i; gchan++) + { + pi = &ci->port[gchan]; + OS_kfree (pi->reg); + pi->reg = 0; + } + return ENOMEM; + } + pi->regram_saved = regaddr; /* save orig value for free's usage */ + pi->regram = (struct musycc_groupr *) ((unsigned long) (regaddr + GROUP_BOUNDARY - 1) & + (~(GROUP_BOUNDARY - 1))); /* this calculates + * closest boundary */ + } + + /* any board centric MUSYCC commands will use group ZERO as its "home" */ + ci->regram = ci->port[0].regram; + musycc_serv_req (&ci->port[0], SR_CHIP_RESET); + + pci_write_32 ((u_int32_t *) &ci->reg->gbp, OS_vtophys (ci->regram)); + pci_flush_write (ci); +#ifdef CONFIG_SBE_PMCC4_NCOMM + ci->regram->__glcd = __constant_cpu_to_le32 (GCD_MAGIC); +#else + /* standard driver POLLS for INTB via CPLD register */ + ci->regram->__glcd = __constant_cpu_to_le32 (GCD_MAGIC | MUSYCC_GCD_INTB_DISABLE); +#endif + + ci->regram->__iqp = cpu_to_le32 (OS_vtophys (&ci->iqd_p[0])); + ci->regram->__iql = __constant_cpu_to_le32 (INT_QUEUE_SIZE - 1); + pci_write_32 ((u_int32_t *) &ci->reg->dacbp, 0); + FLUSH_MEM_WRITE (); + + ci->state = C_RUNNING; /* mark as full interrupt processing + * available */ + + musycc_serv_req (&ci->port[0], SR_GLOBAL_INIT); /* FIRST INTERRUPT ! */ + + /* sanity check settable parameters */ + + if (max_mru > 0xffe) + { + printk (KERN_WARNING "%s: Maximum allowed MRU exceeded, resetting %d to %d.\n", + THIS_MODULE->name, max_mru, 0xffe); + max_mru = 0xffe; + } + if (max_mtu > 0xffe) + { + printk (KERN_WARNING "%s: Maximum allowed MTU exceeded, resetting %d to %d.\n", + THIS_MODULE->name, max_mtu, 0xffe); + max_mtu = 0xffe; + } +#ifdef SBE_WAN256T3_ENABLE + for (i = 0; i < MUSYCC_NPORTS; i++) + musycc_init_port (&ci->port[i]); +#endif + + return SBE_DRVR_SUCCESS; /* no error */ +} + + +void +musycc_bh_tx_eom (mpi_t * pi, int gchan) +{ + mch_t *ch; + struct mdesc *md; + +#if 0 +#ifndef SBE_ISR_INLINE + unsigned long flags; + +#endif +#endif + volatile u_int32_t status; + + ch = pi->chan[gchan]; + if (ch == 0 || ch->state != UP) + { + if (log_level >= LOG_ERROR) + printk ("%s: intr: xmit EOM on uninitialized channel %d\n", pi->up->devname, gchan); + } + if (ch == 0 || ch->mdt == 0) + return; /* note: mdt==0 implies a malloc() + * failure w/in chan_up() routine */ + +#if 0 +#ifdef SBE_ISR_INLINE + spin_lock_irq (&ch->ch_txlock); +#else + spin_lock_irqsave (&ch->ch_txlock, flags); +#endif +#endif + do + { + FLUSH_MEM_READ (); + md = ch->txd_irq_srv; + status = le32_to_cpu (md->status); + + /* + * Note: Per MUSYCC Ref 6.4.9, the host does not poll a host-owned + * Transmit Buffer Descriptor during Transparent Mode. + */ + if (status & MUSYCC_TX_OWNED) + { + int readCount, loopCount; + + /***********************************************************/ + /* HW Bug Fix */ + /* ---------- */ + /* Under certain PCI Bus loading conditions, the data */ + /* associated with an update of Shared Memory is delayed */ + /* relative to its PCI Interrupt. This is caught when */ + /* the host determines it does not yet OWN the descriptor. */ + /***********************************************************/ + + readCount = 0; + while (status & MUSYCC_TX_OWNED) + { + for (loopCount = 0; loopCount < 0x30; loopCount++) + OS_uwait_dummy (); /* use call to avoid optimization + * removal of dummy delay */ + FLUSH_MEM_READ (); + status = le32_to_cpu (md->status); + if (readCount++ > 40) + break; /* don't wait any longer */ + } + if (status & MUSYCC_TX_OWNED) + { + if (log_level >= LOG_MONITOR) + { + printk ("%s: Port %d Chan %2d - unexpected TX msg ownership intr (md %p sts %x)\n", + pi->up->devname, pi->portnum, ch->channum, md, status); + printk ("++ User 0x%p IRQ_SRV 0x%p USR_ADD 0x%p QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n", + ch->user, ch->txd_irq_srv, ch->txd_usr_add, + sd_queue_stopped (ch->user), + ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode); + musycc_dump_txbuffer_ring (ch, 0); + } + break; /* Not our mdesc, done */ + } else + { + if (log_level >= LOG_MONITOR) + printk ("%s: Port %d Chan %2d - recovered TX msg ownership [%d] (md %p sts %x)\n", + pi->up->devname, pi->portnum, ch->channum, readCount, md, status); + } + } + ch->txd_irq_srv = md->snext; + + md->data = 0; + if (md->mem_token != 0) + { + /* upcount channel */ + atomic_sub (OS_mem_token_tlen (md->mem_token), &ch->tx_pending); + /* upcount card */ + atomic_sub (OS_mem_token_tlen (md->mem_token), &pi->up->tx_pending); +#ifdef SBE_WAN256T3_ENABLE + if (!atomic_read (&pi->up->tx_pending)) + wan256t3_led (pi->up, LED_TX, 0); +#endif + +#ifdef CONFIG_SBE_WAN256T3_NCOMM + /* callback that our packet was sent */ + { + int hdlcnum = (pi->portnum * 32 + gchan); + + if (hdlcnum >= 228) + { + if (nciProcess_TX_complete) + (*nciProcess_TX_complete) (hdlcnum, + getuserbychan (gchan)); + } + } +#endif /*** CONFIG_SBE_WAN256T3_NCOMM ***/ + + OS_mem_token_free_irq (md->mem_token); + md->mem_token = 0; + } + md->status = 0; +#ifdef RLD_TXFULL_DEBUG + if (log_level >= LOG_MONITOR2) + printk ("~~ tx_eom: tx_full %x txd_free %d -> %d\n", ch->tx_full, ch->txd_free, ch->txd_free + 1); +#endif + ++ch->txd_free; + FLUSH_MEM_WRITE (); + + if ((ch->p.chan_mode != CFG_CH_PROTO_TRANS) && (status & EOBIRQ_ENABLE)) + { + if (log_level >= LOG_MONITOR) + printk ("%s: Mode (%x) incorrect EOB status (%x)\n", + pi->up->devname, ch->p.chan_mode, status); + if ((status & EOMIRQ_ENABLE) == 0) + break; + } + } + while ((ch->p.chan_mode != CFG_CH_PROTO_TRANS) && ((status & EOMIRQ_ENABLE) == 0)); + /* + * NOTE: (The above 'while' is coupled w/ previous 'do', way above.) Each + * Transparent data buffer has the EOB bit, and NOT the EOM bit, set and + * will furthermore have a separate IQD associated with each messages + * buffer. + */ + + FLUSH_MEM_READ (); + /* + * Smooth flow control hysterisis by maintaining task stoppage until half + * the available write buffers are available. + */ + if (ch->tx_full && (ch->txd_free >= (ch->txd_num / 2))) + { + /* + * Then, only releave task stoppage if we actually have enough + * buffers to service the last requested packet. It may require MORE + * than half the available! + */ + if (ch->txd_free >= ch->txd_required) + { + +#ifdef RLD_TXFULL_DEBUG + if (log_level >= LOG_MONITOR2) + printk ("tx_eom[%d]: enable xmit tx_full no more, txd_free %d txd_num/2 %d\n", + ch->channum, + ch->txd_free, ch->txd_num / 2); +#endif + ch->tx_full = 0; + ch->txd_required = 0; + sd_enable_xmit (ch->user); /* re-enable to catch flow controlled + * channel */ + } + } +#ifdef RLD_TXFULL_DEBUG + else if (ch->tx_full) + { + if (log_level >= LOG_MONITOR2) + printk ("tx_eom[%d]: bypass TX enable though room available? (txd_free %d txd_num/2 %d)\n", + ch->channum, + ch->txd_free, ch->txd_num / 2); + } +#endif + + FLUSH_MEM_WRITE (); +#if 0 +#ifdef SBE_ISR_INLINE + spin_unlock_irq (&ch->ch_txlock); +#else + spin_unlock_irqrestore (&ch->ch_txlock, flags); +#endif +#endif +} + + +STATIC void +musycc_bh_rx_eom (mpi_t * pi, int gchan) +{ + mch_t *ch; + void *m, *m2; + struct mdesc *md; + volatile u_int32_t status; + u_int32_t error; + + ch = pi->chan[gchan]; + if (ch == 0 || ch->state != UP) + { + if (log_level > LOG_ERROR) + printk ("%s: intr: receive EOM on uninitialized channel %d\n", pi->up->devname, gchan); + return; + } + if (ch->mdr == 0) + return; /* can this happen ? */ + + for (;;) + { + FLUSH_MEM_READ (); + md = &ch->mdr[ch->rxix_irq_srv]; + status = le32_to_cpu (md->status); + if (!(status & HOST_RX_OWNED)) + break; /* Not our mdesc, done */ + m = md->mem_token; + error = (status >> 16) & 0xf; + if (error == 0) + { +#ifdef CONFIG_SBE_WAN256T3_NCOMM + int hdlcnum = (pi->portnum * 32 + gchan); + + /* + * if the packet number belongs to NCOMM, then send it to the TMS + * driver + */ + if (hdlcnum >= 228) + { + if (nciProcess_RX_packet) + (*nciProcess_RX_packet) (hdlcnum, status & 0x3fff, m, ch->user); + } else +#endif /*** CONFIG_SBE_WAN256T3_NCOMM ***/ + + { + if ((m2 = OS_mem_token_alloc (max_mru))) + { + /* substitute the mbuf+cluster */ + md->mem_token = m2; + md->data = cpu_to_le32 (OS_vtophys (OS_mem_token_data (m2))); + + /* pass the received mbuf upward */ + sd_recv_consume (m, status & LENGTH_MASK, ch->user); + ch->s.rx_packets++; + ch->s.rx_bytes += status & LENGTH_MASK; + } else + { + ch->s.rx_dropped++; + } + } + } else if (error == ERR_FCS) + { + ch->s.rx_crc_errors++; + } else if (error == ERR_ALIGN) + { + ch->s.rx_missed_errors++; + } else if (error == ERR_ABT) + { + ch->s.rx_missed_errors++; + } else if (error == ERR_LNG) + { + ch->s.rx_length_errors++; + } else if (error == ERR_SHT) + { + ch->s.rx_length_errors++; + } + FLUSH_MEM_WRITE (); + status = max_mru; + if (ch->p.chan_mode == CFG_CH_PROTO_TRANS) + status |= EOBIRQ_ENABLE; + md->status = cpu_to_le32 (status); + + /* Check next mdesc in the ring */ + if (++ch->rxix_irq_srv >= ch->rxd_num) + ch->rxix_irq_srv = 0; + FLUSH_MEM_WRITE (); + } +} + + +irqreturn_t +musycc_intr_th_handler (void *devp) +{ + ci_t *ci = (ci_t *) devp; + volatile u_int32_t status, currInt = 0; + u_int32_t nextInt, intCnt; + + /* + * Hardware not available, potential interrupt hang. But since interrupt + * might be shared, just return. + */ + if (ci->state == C_INIT) + { + return IRQ_NONE; + } + /* + * Marked as hardware available. Don't service interrupts, just clear the + * event. + */ + + if (ci->state == C_IDLE) + { + status = pci_read_32 ((u_int32_t *) &ci->reg->isd); + + /* clear the interrupt but process nothing else */ + pci_write_32 ((u_int32_t *) &ci->reg->isd, status); + return IRQ_HANDLED; + } + FLUSH_PCI_READ (); + FLUSH_MEM_READ (); + + status = pci_read_32 ((u_int32_t *) &ci->reg->isd); + nextInt = INTRPTS_NEXTINT (status); + intCnt = INTRPTS_INTCNT (status); + ci->intlog.drvr_intr_thcount++; + + /*********************************************************/ + /* HW Bug Fix */ + /* ---------- */ + /* Under certain PCI Bus loading conditions, the */ + /* MUSYCC looses the data associated with an update */ + /* of its ISD and erroneously returns the immediately */ + /* preceding 'nextInt' value. However, the 'intCnt' */ + /* value appears to be correct. By not starting service */ + /* where the 'missing' 'nextInt' SHOULD point causes */ + /* the IQD not to be serviced - the 'not serviced' */ + /* entries then remain and continue to increase as more */ + /* incorrect ISD's are encountered. */ + /*********************************************************/ + + if (nextInt != INTRPTS_NEXTINT (ci->intlog.this_status_new)) + { + if (log_level >= LOG_MONITOR) + { + printk ("%s: note - updated ISD from %08x to %08x\n", + ci->devname, status, + (status & (~INTRPTS_NEXTINT_M)) | ci->intlog.this_status_new); + } + /* + * Replace bogus status with software corrected value. + * + * It's not known whether, during this problem occurrence, if the + * INTFULL bit is correctly reported or not. + */ + status = (status & (~INTRPTS_NEXTINT_M)) | (ci->intlog.this_status_new); + nextInt = INTRPTS_NEXTINT (status); + } + /**********************************************/ + /* Cn847x Bug Fix */ + /* -------------- */ + /* Fix for inability to write back same index */ + /* as read for a full interrupt queue. */ + /**********************************************/ + + if (intCnt == INT_QUEUE_SIZE) + { + currInt = ((intCnt - 1) + nextInt) & (INT_QUEUE_SIZE - 1); + } else + /************************************************/ + /* Interrupt Write Location Issues */ + /* ------------------------------- */ + /* When the interrupt status descriptor is */ + /* written, the interrupt line is de-asserted */ + /* by the Cn847x. In the case of MIPS */ + /* microprocessors, this must occur at the */ + /* beginning of the interrupt handler so that */ + /* the interrupt handle is not re-entered due */ + /* to interrupt dis-assertion latency. */ + /* In the case of all other processors, this */ + /* action should occur at the end of the */ + /* interrupt handler to avoid overwriting the */ + /* interrupt queue. */ + /************************************************/ + + if (intCnt) + { + currInt = (intCnt + nextInt) & (INT_QUEUE_SIZE - 1); + } else + { + /* + * NOTE: Servicing an interrupt whose ISD contains a count of ZERO + * can be indicative of a Shared Interrupt chain. Our driver can be + * called from the system's interrupt handler as a matter of the OS + * walking the chain. As the chain is walked, the interrupt will + * eventually be serviced by the correct driver/handler. + */ +#if 0 + /* chained interrupt = not ours */ + printk (">> %s: intCnt NULL, sts %x, possibly a chained interrupt!\n", + ci->devname, status); +#endif + return IRQ_NONE; + } + + ci->iqp_tailx = currInt; + + currInt <<= INTRPTS_NEXTINT_S; + ci->intlog.last_status_new = ci->intlog.this_status_new; + ci->intlog.this_status_new = currInt; + + if ((log_level >= LOG_WARN) && (status & INTRPTS_INTFULL_M)) + { + printk ("%s: Interrupt queue full condition occurred\n", ci->devname); + } + if (log_level >= LOG_DEBUG) + printk ("%s: interrupts pending, isd @ 0x%p: %x curr %d cnt %d NEXT %d\n", + ci->devname, &ci->reg->isd, + status, nextInt, intCnt, (intCnt + nextInt) & (INT_QUEUE_SIZE - 1)); + + FLUSH_MEM_WRITE (); +#if defined(SBE_ISR_TASKLET) + pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt); + atomic_inc (&ci->bh_pending); + tasklet_schedule (&ci->ci_musycc_isr_tasklet); +#elif defined(SBE_ISR_IMMEDIATE) + pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt); + atomic_inc (&ci->bh_pending); + queue_task (&ci->ci_musycc_isr_tq, &tq_immediate); + mark_bh (IMMEDIATE_BH); +#elif defined(SBE_ISR_INLINE) + (void) musycc_intr_bh_tasklet (ci); + pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt); +#endif + return IRQ_HANDLED; +} + + +#if defined(SBE_ISR_IMMEDIATE) +unsigned long +#else +void +#endif +musycc_intr_bh_tasklet (ci_t * ci) +{ + mpi_t *pi; + mch_t *ch; + unsigned int intCnt; + volatile u_int32_t currInt = 0; + volatile unsigned int headx, tailx; + int readCount, loopCount; + int group, gchan, event, err, tx; + u_int32_t badInt = INT_EMPTY_ENTRY; + u_int32_t badInt2 = INT_EMPTY_ENTRY2; + + /* + * Hardware not available, potential interrupt hang. But since interrupt + * might be shared, just return. + */ + if ((drvr_state != SBE_DRVR_AVAILABLE) || (ci->state == C_INIT)) + { +#if defined(SBE_ISR_IMMEDIATE) + return 0L; +#else + return; +#endif + } +#if defined(SBE_ISR_TASKLET) || defined(SBE_ISR_IMMEDIATE) + if (drvr_state != SBE_DRVR_AVAILABLE) + { +#if defined(SBE_ISR_TASKLET) + return; +#elif defined(SBE_ISR_IMMEDIATE) + return 0L; +#endif + } +#elif defined(SBE_ISR_INLINE) + /* no semaphore taken, no double checks */ +#endif + + ci->intlog.drvr_intr_bhcount++; + FLUSH_MEM_READ (); + { + unsigned int bh = atomic_read (&ci->bh_pending); + + max_bh = max (bh, max_bh); + } + atomic_set (&ci->bh_pending, 0);/* if here, no longer pending */ + while ((headx = ci->iqp_headx) != (tailx = ci->iqp_tailx)) + { + intCnt = (tailx >= headx) ? (tailx - headx) : (tailx - headx + INT_QUEUE_SIZE); + currInt = le32_to_cpu (ci->iqd_p[headx]); + + max_intcnt = max (intCnt, max_intcnt); /* RLD DEBUG */ + + /**************************************************/ + /* HW Bug Fix */ + /* ---------- */ + /* The following code checks for the condition */ + /* of interrupt assertion before interrupt */ + /* queue update. This is a problem on several */ + /* PCI-Local bridge chips found on some products. */ + /**************************************************/ + + readCount = 0; + if ((currInt == badInt) || (currInt == badInt2)) + ci->intlog.drvr_int_failure++; + + while ((currInt == badInt) || (currInt == badInt2)) + { + for (loopCount = 0; loopCount < 0x30; loopCount++) + OS_uwait_dummy (); /* use call to avoid optimization removal + * of dummy delay */ + FLUSH_MEM_READ (); + currInt = le32_to_cpu (ci->iqd_p[headx]); + if (readCount++ > 20) + break; + } + + if ((currInt == badInt) || (currInt == badInt2)) /* catch failure of Bug + * Fix checking */ + { + if (log_level >= LOG_WARN) + printk ("%s: Illegal Interrupt Detected @ 0x%p, mod %d.)\n", + ci->devname, &ci->iqd_p[headx], headx); + + /* + * If the descriptor has not recovered, then leaving the EMPTY + * entry set will not signal to the MUSYCC that this descriptor + * has been serviced. The Interrupt Queue can then start loosing + * available descriptors and MUSYCC eventually encounters and + * reports the INTFULL condition. Per manual, changing any bit + * marks descriptor as available, thus the use of different + * EMPTY_ENTRY values. + */ + + if (currInt == badInt) + { + ci->iqd_p[headx] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY2); + } else + { + ci->iqd_p[headx] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY); + } + ci->iqp_headx = (headx + 1) & (INT_QUEUE_SIZE - 1); /* insure wrapness */ + FLUSH_MEM_WRITE (); + FLUSH_MEM_READ (); + continue; + } + group = INTRPT_GRP (currInt); + gchan = INTRPT_CH (currInt); + event = INTRPT_EVENT (currInt); + err = INTRPT_ERROR (currInt); + tx = currInt & INTRPT_DIR_M; + + ci->iqd_p[headx] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY); + FLUSH_MEM_WRITE (); + + if (log_level >= LOG_DEBUG) + { + if (err != 0) + printk (" %08x -> err: %2d,", currInt, err); + + printk ("+ interrupt event: %d, grp: %d, chan: %2d, side: %cX\n", + event, group, gchan, tx ? 'T' : 'R'); + } + pi = &ci->port[group]; /* notice that here we assume 1-1 group - + * port mapping */ + ch = pi->chan[gchan]; + switch (event) + { + case EVE_SACK: /* Service Request Acknowledge */ + if (log_level >= LOG_DEBUG) + { + volatile u_int32_t r; + + r = pci_read_32 ((u_int32_t *) &pi->reg->srd); + printk ("- SACK cmd: %08x (hdw= %08x)\n", pi->sr_last, r); + } + SD_SEM_GIVE (&pi->sr_sem_wait); /* wake up waiting process */ + break; + case EVE_CHABT: /* Change To Abort Code (0x7e -> 0xff) */ + case EVE_CHIC: /* Change To Idle Code (0xff -> 0x7e) */ + break; + case EVE_EOM: /* End Of Message */ + case EVE_EOB: /* End Of Buffer (Transparent mode) */ + if (tx) + { + musycc_bh_tx_eom (pi, gchan); + } else + { + musycc_bh_rx_eom (pi, gchan); + } +#if 0 + break; +#else + /* + * MUSYCC Interrupt Descriptor section states that EOB and EOM + * can be combined with the NONE error (as well as others). So + * drop thru to catch this... + */ +#endif + case EVE_NONE: + if (err == ERR_SHT) + { + ch->s.rx_length_errors++; + } + break; + default: + if (log_level >= LOG_WARN) + printk ("%s: unexpected interrupt event: %d, iqd[%d]: %08x, port: %d\n", ci->devname, + event, headx, currInt, group); + break; + } /* switch on event */ + + + /* + * Per MUSYCC Manual, Section 6.4.8.3 [Transmit Errors], TX errors + * are service-affecting and require action to resume normal + * bit-level processing. + */ + + switch (err) + { + case ERR_ONR: + /* + * Per MUSYCC manual, Section 6.4.8.3 [Transmit Errors], this + * error requires Transmit channel reactivation. + * + * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors], this error + * requires Receive channel reactivation. + */ + if (tx) + { + + /* + * TX ONR Error only occurs when channel is configured for + * Transparent Mode. However, this code will catch and + * re-activate on ANY TX ONR error. + */ + + /* + * Set flag to re-enable on any next transmit attempt. + */ + ch->ch_start_tx = CH_START_TX_ONR; + + { +#ifdef RLD_TRANS_DEBUG + if (1 || log_level >= LOG_MONITOR) +#else + if (log_level >= LOG_MONITOR) +#endif + { + printk ("%s: TX buffer underflow [ONR] on channel %d, mode %x QStopped %x free %d\n", + ci->devname, ch->channum, ch->p.chan_mode, sd_queue_stopped (ch->user), ch->txd_free); +#ifdef RLD_DEBUG + if (ch->p.chan_mode == 2) /* problem = ONR on HDLC + * mode */ + { + printk ("++ Failed Last %x Next %x QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n", + (u_int32_t) ch->txd_irq_srv, (u_int32_t) ch->txd_usr_add, + sd_queue_stopped (ch->user), + ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode); + musycc_dump_txbuffer_ring (ch, 0); + } +#endif + } + } + } else /* RX buffer overrun */ + { + /* + * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors], + * channel recovery for this RX ONR error IS required. It is + * also suggested to increase the number of receive buffers + * for this channel. Receive channel reactivation IS + * required, and data has been lost. + */ + ch->s.rx_over_errors++; + ch->ch_start_rx = CH_START_RX_ONR; + + if (log_level >= LOG_WARN) + { + printk ("%s: RX buffer overflow [ONR] on channel %d, mode %x\n", + ci->devname, ch->channum, ch->p.chan_mode); + //musycc_dump_rxbuffer_ring (ch, 0); /* RLD DEBUG */ + } + } + musycc_chan_restart (ch); + break; + case ERR_BUF: + if (tx) + { + ch->s.tx_fifo_errors++; + ch->ch_start_tx = CH_START_TX_BUF; + /* + * Per MUSYCC manual, Section 6.4.8.3 [Transmit Errors], + * this BUFF error requires Transmit channel reactivation. + */ + if (log_level >= LOG_MONITOR) + printk ("%s: TX buffer underrun [BUFF] on channel %d, mode %x\n", + ci->devname, ch->channum, ch->p.chan_mode); + } else /* RX buffer overrun */ + { + ch->s.rx_over_errors++; + /* + * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors], HDLC + * mode requires NO recovery for this RX BUFF error is + * required. It is suggested to increase the FIFO buffer + * space for this channel. Receive channel reactivation is + * not required, but data has been lost. + */ + if (log_level >= LOG_WARN) + printk ("%s: RX buffer overrun [BUFF] on channel %d, mode %x\n", + ci->devname, ch->channum, ch->p.chan_mode); + /* + * Per MUSYCC manual, Section 6.4.9.4 [Receive Errors], + * Transparent mode DOES require recovery for the RX BUFF + * error. It is suggested to increase the FIFO buffer space + * for this channel. Receive channel reactivation IS + * required and data has been lost. + */ + if (ch->p.chan_mode == CFG_CH_PROTO_TRANS) + ch->ch_start_rx = CH_START_RX_BUF; + } + + if (tx || (ch->p.chan_mode == CFG_CH_PROTO_TRANS)) + musycc_chan_restart (ch); + break; + default: + break; + } /* switch on err */ + + /* Check for interrupt lost condition */ + if ((currInt & INTRPT_ILOST_M) && (log_level >= LOG_ERROR)) + { + printk ("%s: Interrupt queue overflow - ILOST asserted\n", + ci->devname); + } + ci->iqp_headx = (headx + 1) & (INT_QUEUE_SIZE - 1); /* insure wrapness */ + FLUSH_MEM_WRITE (); + FLUSH_MEM_READ (); + } /* while */ + if ((log_level >= LOG_MONITOR2) && (ci->iqp_headx != ci->iqp_tailx)) + { + int bh; + + bh = atomic_read (&CI->bh_pending); + printk ("_bh_: late arrivals, head %d != tail %d, pending %d\n", + ci->iqp_headx, ci->iqp_tailx, bh); + } +#if defined(SBE_ISR_IMMEDIATE) + return 0L; +#endif + /* else, nothing returned */ +} + +#if 0 +int __init +musycc_new_chan (ci_t * ci, int channum, void *user) +{ + mch_t *ch; + + ch = ci->port[channum / MUSYCC_NCHANS].chan[channum % MUSYCC_NCHANS]; + + if (ch->state != UNASSIGNED) + return EEXIST; + /* NOTE: mch_t already cleared during OS_kmalloc() */ + ch->state = DOWN; + ch->user = user; +#if 0 + ch->status = 0; + ch->p.status = 0; + ch->p.intr_mask = 0; +#endif + ch->p.chan_mode = CFG_CH_PROTO_HDLC_FCS16; + ch->p.idlecode = CFG_CH_FLAG_7E; + ch->p.pad_fill_count = 2; + spin_lock_init (&ch->ch_rxlock); + spin_lock_init (&ch->ch_txlock); + + return 0; +} +#endif + + +#ifdef SBE_PMCC4_ENABLE +status_t +musycc_chan_down (ci_t * dummy, int channum) +{ + mpi_t *pi; + mch_t *ch; + int i, gchan; + + if (!(ch = sd_find_chan (dummy, channum))) + return EINVAL; + pi = ch->up; + gchan = ch->gchan; + + /* Deactivate the channel */ + musycc_serv_req (pi, SR_CHANNEL_DEACTIVATE | SR_RX_DIRECTION | gchan); + ch->ch_start_rx = 0; + musycc_serv_req (pi, SR_CHANNEL_DEACTIVATE | SR_TX_DIRECTION | gchan); + ch->ch_start_tx = 0; + + if (ch->state == DOWN) + return 0; + ch->state = DOWN; + + pi->regram->thp[gchan] = 0; + pi->regram->tmp[gchan] = 0; + pi->regram->rhp[gchan] = 0; + pi->regram->rmp[gchan] = 0; + FLUSH_MEM_WRITE (); + for (i = 0; i < ch->txd_num; i++) + { + if (ch->mdt[i].mem_token != 0) + OS_mem_token_free (ch->mdt[i].mem_token); + } + + for (i = 0; i < ch->rxd_num; i++) + { + if (ch->mdr[i].mem_token != 0) + OS_mem_token_free (ch->mdr[i].mem_token); + } + + OS_kfree (ch->mdr); + ch->mdr = 0; + ch->rxd_num = 0; + OS_kfree (ch->mdt); + ch->mdt = 0; + ch->txd_num = 0; + + musycc_update_timeslots (pi); + c4_fifo_free (pi, ch->gchan); + + pi->openchans--; + return 0; +} +#endif + + +int +musycc_del_chan (ci_t * ci, int channum) +{ + mch_t *ch; + + if ((channum < 0) || (channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS))) /* sanity chk param */ + return ECHRNG; + if (!(ch = sd_find_chan (ci, channum))) + return ENOENT; + if (ch->state == UP) + musycc_chan_down (ci, channum); + ch->state = UNASSIGNED; + return 0; +} + + +int +musycc_del_chan_stats (ci_t * ci, int channum) +{ + mch_t *ch; + + if (channum < 0 || channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS)) /* sanity chk param */ + return ECHRNG; + if (!(ch = sd_find_chan (ci, channum))) + return ENOENT; + + memset (&ch->s, 0, sizeof (struct sbecom_chan_stats)); + return 0; +} + + +int +musycc_start_xmit (ci_t * ci, int channum, void *mem_token) +{ + mch_t *ch; + struct mdesc *md; + void *m2; +#if 0 + unsigned long flags; +#endif + int txd_need_cnt; + u_int32_t len; + + if (!(ch = sd_find_chan (ci, channum))) + return ENOENT; + + if (ci->state != C_RUNNING) /* full interrupt processing available */ + return EINVAL; + if (ch->state != UP) + return EINVAL; + + if (!(ch->status & TX_ENABLED)) + return EROFS; /* how else to flag unwritable state ? */ + +#ifdef RLD_TRANS_DEBUGx + if (1 || log_level >= LOG_MONITOR2) +#else + if (log_level >= LOG_MONITOR2) +#endif + { + printk ("++ start_xmt[%d]: state %x start %x full %d free %d required %d stopped %x\n", + channum, ch->state, ch->ch_start_tx, ch->tx_full, + ch->txd_free, ch->txd_required, sd_queue_stopped (ch->user)); + } + /***********************************************/ + /** Determine total amount of data to be sent **/ + /***********************************************/ + m2 = mem_token; + txd_need_cnt = 0; + for (len = OS_mem_token_tlen (m2); len > 0; + m2 = (void *) OS_mem_token_next (m2)) + { + if (!OS_mem_token_len (m2)) + continue; + txd_need_cnt++; + len -= OS_mem_token_len (m2); + } + + if (txd_need_cnt == 0) + { + if (log_level >= LOG_MONITOR2) + printk ("%s channel %d: no TX data in User buffer\n", ci->devname, channum); + OS_mem_token_free (mem_token); + return 0; /* no data to send */ + } + /*************************************************/ + /** Are there sufficient descriptors available? **/ + /*************************************************/ + if (txd_need_cnt > ch->txd_num) /* never enough descriptors for this + * large a buffer */ + { + if (log_level >= LOG_DEBUG) + { + printk ("start_xmit: discarding buffer, insufficient descriptor cnt %d, need %d.\n", + ch->txd_num, txd_need_cnt + 1); + } + ch->s.tx_dropped++; + OS_mem_token_free (mem_token); + return 0; + } +#if 0 + spin_lock_irqsave (&ch->ch_txlock, flags); +#endif + /************************************************************/ + /** flow control the line if not enough descriptors remain **/ + /************************************************************/ + if (txd_need_cnt > ch->txd_free) + { + if (log_level >= LOG_MONITOR2) + { + printk ("start_xmit[%d]: EBUSY - need more descriptors, have %d of %d need %d\n", + channum, ch->txd_free, ch->txd_num, txd_need_cnt); + } + ch->tx_full = 1; + ch->txd_required = txd_need_cnt; + sd_disable_xmit (ch->user); +#if 0 + spin_unlock_irqrestore (&ch->ch_txlock, flags); +#endif + return EBUSY; /* tell user to try again later */ + } + /**************************************************/ + /** Put the user data into MUSYCC data buffer(s) **/ + /**************************************************/ + m2 = mem_token; + md = ch->txd_usr_add; /* get current available descriptor */ + + for (len = OS_mem_token_tlen (m2); len > 0; m2 = OS_mem_token_next (m2)) + { + int u = OS_mem_token_len (m2); + + if (!u) + continue; + len -= u; + + /* + * Enable following chunks, yet wait to enable the FIRST chunk until + * after ALL subsequent chunks are setup. + */ + if (md != ch->txd_usr_add) /* not first chunk */ + u |= MUSYCC_TX_OWNED; /* transfer ownership from HOST to MUSYCC */ + + if (len) /* not last chunk */ + u |= EOBIRQ_ENABLE; + else if (ch->p.chan_mode == CFG_CH_PROTO_TRANS) + { + /* + * Per MUSYCC Ref 6.4.9 for Transparent Mode, the host must + * always clear EOMIRQ_ENABLE in every Transmit Buffer Descriptor + * (IE. don't set herein). + */ + u |= EOBIRQ_ENABLE; + } else + u |= EOMIRQ_ENABLE; /* EOM, last HDLC chunk */ + + + /* last chunk in hdlc mode */ + u |= (ch->p.idlecode << IDLE_CODE); + if (ch->p.pad_fill_count) + { +#if 0 + /* NOOP NOTE: u_int8_t cannot be > 0xFF */ + /* sanitize pad_fill_count for maximums allowed by hardware */ + if (ch->p.pad_fill_count > EXTRA_FLAGS_MASK) + ch->p.pad_fill_count = EXTRA_FLAGS_MASK; +#endif + u |= (PADFILL_ENABLE | (ch->p.pad_fill_count << EXTRA_FLAGS)); + } + md->mem_token = len ? 0 : mem_token; /* Fill in mds on last + * segment, others set ZERO + * so that entire token is + * removed ONLY when ALL + * segments have been + * transmitted. */ + + md->data = cpu_to_le32 (OS_vtophys (OS_mem_token_data (m2))); + FLUSH_MEM_WRITE (); + md->status = cpu_to_le32 (u); + --ch->txd_free; + md = md->snext; + } + FLUSH_MEM_WRITE (); + + + /* + * Now transfer ownership of first chunk from HOST to MUSYCC in order to + * fire-off this XMIT. + */ + ch->txd_usr_add->status |= __constant_cpu_to_le32 (MUSYCC_TX_OWNED); + FLUSH_MEM_WRITE (); + ch->txd_usr_add = md; + + len = OS_mem_token_tlen (mem_token); + atomic_add (len, &ch->tx_pending); + atomic_add (len, &ci->tx_pending); + ch->s.tx_packets++; + ch->s.tx_bytes += len; +#if 0 + spin_unlock_irqrestore (&ch->ch_txlock, flags); /* allow pending + * interrupt to sneak + * thru */ +#endif + + /* + * If an ONR was seen, then channel requires poking to restart + * transmission. + */ + if (ch->ch_start_tx) + { +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,41) + SD_SEM_TAKE (&ci->sem_wdbusy, "_wd_"); /* only 1 thru here, per + * board */ + if ((ch->ch_start_tx == CH_START_TX_ONR) && (ch->p.chan_mode == CFG_CH_PROTO_TRANS)) + { + /* ONR restart transmission from background loop */ + ci->wd_notify = WD_NOTIFY_ONR; /* enabled global watchdog + * scan-thru */ + } else + { + /* start first transmission from background loop */ + ci->wd_notify = WD_NOTIFY_1TX; /* enabled global watchdog + * scan-thru */ + } + musycc_chan_restart (ch); + SD_SEM_GIVE (&ci->sem_wdbusy); +#else + musycc_chan_restart (ch); +#endif + } +#ifdef SBE_WAN256T3_ENABLE + wan256t3_led (ci, LED_TX, LEDV_G); +#endif + return 0; +} + + +#if 0 +int +musycc_set_chan (ci_t * ci, int channum, struct sbecom_chan_param * p) +{ + mch_t *ch; + int rok = 0; + int n = 0; + + if (channum < 0 || channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS)) /* sanity chk param */ + return ECHRNG; + if (!(ch = sd_find_chan (ci, channum))) + return ENOENT; + if (ch->channum != p->channum) + return EINVAL; + if (sd_line_is_ok (ch->user)) + { + rok = 1; + sd_line_is_down (ch->user); + } + if (ch->state == UP && /* bring down in current configuration */ + (ch->p.status != p->status || + ch->p.chan_mode != p->chan_mode || + ch->p.intr_mask != p->intr_mask || + ch->txd_free < ch->txd_num)) + { + if ((n = musycc_chan_down (ci, channum))) + return n; + if (ch->p.mode_56k != p->mode_56k) + { + ch->p = *p; /* copy in new parameters */ + musycc_update_timeslots (&ci->port[ch->channum / MUSYCC_NCHANS]); + } else + ch->p = *p; /* copy in new parameters */ + if ((n = musycc_chan_up (ci, channum))) + return n; + sd_enable_xmit (ch->user); /* re-enable to catch flow controlled + * channel */ + } else + { + if (ch->p.mode_56k != p->mode_56k) + { + ch->p = *p; /* copy in new parameters */ + musycc_update_timeslots (&ci->port[ch->channum / MUSYCC_NCHANS]); + } else + ch->p = *p; /* copy in new parameters */ + } + + if (rok) + sd_line_is_up (ch->user); + return 0; +} +#endif + + +int +musycc_get_chan (ci_t * ci, int channum, struct sbecom_chan_param * p) +{ + mch_t *ch; + +#if 0 + if (channum < 0 || channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS)) /* sanity chk param */ + return ECHRNG; +#endif + if (!(ch = sd_find_chan (ci, channum))) + return ENOENT; + *p = ch->p; + return 0; +} + + +int +musycc_get_chan_stats (ci_t * ci, int channum, struct sbecom_chan_stats * p) +{ + mch_t *ch; + + if (channum < 0 || channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS)) /* sanity chk param */ + return ECHRNG; + if (!(ch = sd_find_chan (ci, channum))) + return ENOENT; + *p = ch->s; + p->tx_pending = atomic_read (&ch->tx_pending); + return 0; +} + + + +#ifdef SBE_WAN256T3_ENABLE +int +musycc_chan_down (ci_t * ci, int channum) +{ + mch_t *ch; + mpi_t *pi; + int i, gchan; + + if (!(ch = sd_find_chan (ci, channum))) + return EINVAL; + pi = ch->up; + gchan = ch->gchan; + + /* Deactivate the channel */ + musycc_serv_req (pi, SR_CHANNEL_DEACTIVATE | SR_RX_DIRECTION | gchan); + ch->ch_start_rx = 0; + musycc_serv_req (pi, SR_CHANNEL_DEACTIVATE | SR_TX_DIRECTION | gchan); + ch->ch_start_tx = 0; + + if (ch->state == DOWN) + return 0; + ch->state = DOWN; + + pi->regram->thp[gchan] = 0; + pi->regram->tmp[gchan] = 0; + pi->regram->rhp[gchan] = 0; + pi->regram->rmp[gchan] = 0; + FLUSH_MEM_WRITE (); + for (i = 0; i < ch->txd_num; i++) + { + if (ch->mdt[i].mem_token != 0) + OS_mem_token_free (ch->mdt[i].mem_token); + } + + for (i = 0; i < ch->rxd_num; i++) + { + if (ch->mdr[i].mem_token != 0) + OS_mem_token_free (ch->mdr[i].mem_token); + } + + OS_kfree (ch->mdt); + ch->mdt = 0; + OS_kfree (ch->mdr); + ch->mdr = 0; + + return 0; +} +#endif + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/musycc.h b/drivers/staging/cxt1e1/musycc.h new file mode 100644 index 000000000000..d2c91ef686d1 --- /dev/null +++ b/drivers/staging/cxt1e1/musycc.h @@ -0,0 +1,460 @@ +/* + * $Id: musycc.h,v 1.3 2005/09/28 00:10:08 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_MUSYCC_H_ +#define _INC_MUSYCC_H_ + +/*----------------------------------------------------------------------------- + * musycc.h - Multichannel Synchronous Communications Controller + * CN8778/8474A/8472A/8471A + * + * Copyright (C) 2002-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.3 $ + * Last changed on $Date: 2005/09/28 00:10:08 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: musycc.h,v $ + * Revision 1.3 2005/09/28 00:10:08 rickd + * Add GNU license info. Add PMCC4 PCI/DevIDs. Implement new + * musycc reg&bits namings. Use PORTMAP_0 GCD grouping. + * + * Revision 1.2 2005/04/28 23:43:04 rickd + * Add RCS tracking heading. + * + *----------------------------------------------------------------------------- + */ + +#if defined (__FreeBSD__) || defined (__NetBSD__) +#include <sys/types.h> +#else +#include <linux/types.h> +#endif + +#define VINT8 volatile u_int8_t +#define VINT32 volatile u_int32_t + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include "pmcc4_defs.h" + + +/*------------------------------------------------------------------------ +// Vendor, Board Identification definitions +//------------------------------------------------------------------------ +*/ + +#define PCI_VENDOR_ID_CONEXANT 0x14f1 +#define PCI_DEVICE_ID_CN8471 0x8471 +#define PCI_DEVICE_ID_CN8472 0x8472 +#define PCI_DEVICE_ID_CN8474 0x8474 +#define PCI_DEVICE_ID_CN8478 0x8478 +#define PCI_DEVICE_ID_CN8500 0x8500 +#define PCI_DEVICE_ID_CN8501 0x8501 +#define PCI_DEVICE_ID_CN8502 0x8502 +#define PCI_DEVICE_ID_CN8503 0x8503 + +#define INT_QUEUE_SIZE MUSYCC_NIQD + +/* RAM image of MUSYCC registers layed out as a C structure */ + struct musycc_groupr + { + VINT32 thp[32]; /* Transmit Head Pointer [5-29] */ + VINT32 tmp[32]; /* Transmit Message Pointer [5-30] */ + VINT32 rhp[32]; /* Receive Head Pointer [5-29] */ + VINT32 rmp[32]; /* Receive Message Pointer [5-30] */ + VINT8 ttsm[128]; /* Time Slot Map [5-22] */ + VINT8 tscm[256]; /* Subchannel Map [5-24] */ + VINT32 tcct[32]; /* Channel Configuration [5-26] */ + VINT8 rtsm[128]; /* Time Slot Map [5-22] */ + VINT8 rscm[256]; /* Subchannel Map [5-24] */ + VINT32 rcct[32]; /* Channel Configuration [5-26] */ + VINT32 __glcd; /* Global Configuration Descriptor [5-10] */ + VINT32 __iqp; /* Interrupt Queue Pointer [5-36] */ + VINT32 __iql; /* Interrupt Queue Length [5-36] */ + VINT32 grcd; /* Group Configuration Descriptor [5-16] */ + VINT32 mpd; /* Memory Protection Descriptor [5-18] */ + VINT32 mld; /* Message Length Descriptor [5-20] */ + VINT32 pcd; /* Port Configuration Descriptor [5-19] */ + }; + +/* hardware MUSYCC registers layed out as a C structure */ + struct musycc_globalr + { + VINT32 gbp; /* Group Base Pointer */ + VINT32 dacbp; /* Dual Address Cycle Base Pointer */ + VINT32 srd; /* Service Request Descriptor */ + VINT32 isd; /* Interrupt Service Descriptor */ + /* + * adjust __thp due to above 4 registers, which are not contained + * within musycc_groupr[]. All __XXX[] are just place holders, + * anyhow. + */ + VINT32 __thp[32 - 4]; /* Transmit Head Pointer [5-29] */ + VINT32 __tmp[32]; /* Transmit Message Pointer [5-30] */ + VINT32 __rhp[32]; /* Receive Head Pointer [5-29] */ + VINT32 __rmp[32]; /* Receive Message Pointer [5-30] */ + VINT8 ttsm[128]; /* Time Slot Map [5-22] */ + VINT8 tscm[256]; /* Subchannel Map [5-24] */ + VINT32 tcct[32]; /* Channel Configuration [5-26] */ + VINT8 rtsm[128]; /* Time Slot Map [5-22] */ + VINT8 rscm[256]; /* Subchannel Map [5-24] */ + VINT32 rcct[32]; /* Channel Configuration [5-26] */ + VINT32 glcd; /* Global Configuration Descriptor [5-10] */ + VINT32 iqp; /* Interrupt Queue Pointer [5-36] */ + VINT32 iql; /* Interrupt Queue Length [5-36] */ + VINT32 grcd; /* Group Configuration Descriptor [5-16] */ + VINT32 mpd; /* Memory Protection Descriptor [5-18] */ + VINT32 mld; /* Message Length Descriptor [5-20] */ + VINT32 pcd; /* Port Configuration Descriptor [5-19] */ + VINT32 rbist; /* Receive BIST status [5-4] */ + VINT32 tbist; /* Receive BIST status [5-4] */ + }; + +/* Global Config Descriptor bit macros */ +#define MUSYCC_GCD_ECLK_ENABLE 0x00000800 /* EBUS clock enable */ +#define MUSYCC_GCD_INTEL_SELECT 0x00000400 /* MPU type select */ +#define MUSYCC_GCD_INTA_DISABLE 0x00000008 /* PCI INTA disable */ +#define MUSYCC_GCD_INTB_DISABLE 0x00000004 /* PCI INTB disable */ +#define MUSYCC_GCD_BLAPSE 12 /* Position index for BLAPSE bit + * field */ +#define MUSYCC_GCD_ALAPSE 8 /* Position index for ALAPSE bit + * field */ +#define MUSYCC_GCD_ELAPSE 4 /* Position index for ELAPSE bit + * field */ +#define MUSYCC_GCD_PORTMAP_3 3 /* Reserved */ +#define MUSYCC_GCD_PORTMAP_2 2 /* Port 0=>Grp 0,1,2,3; Port 1=>Grp + * 4,5,6,7 */ +#define MUSYCC_GCD_PORTMAP_1 1 /* Port 0=>Grp 0,1; Port 1=>Grp 2,3, + * etc... */ +#define MUSYCC_GCD_PORTMAP_0 0 /* Port 0=>Grp 0; Port 1=>Grp 2, + * etc... */ + +/* and board specific assignments... */ +#ifdef SBE_WAN256T3_ENABLE +#define BLAPSE_VAL 0 +#define ALAPSE_VAL 0 +#define ELAPSE_VAL 7 +#define PORTMAP_VAL MUSYCC_GCD_PORTMAP_2 +#endif + +#ifdef SBE_PMCC4_ENABLE +#define BLAPSE_VAL 7 +#define ALAPSE_VAL 3 +#define ELAPSE_VAL 7 +#define PORTMAP_VAL MUSYCC_GCD_PORTMAP_0 +#endif + +#define GCD_MAGIC (((BLAPSE_VAL)<<(MUSYCC_GCD_BLAPSE)) | \ + ((ALAPSE_VAL)<<(MUSYCC_GCD_ALAPSE)) | \ + ((ELAPSE_VAL)<<(MUSYCC_GCD_ELAPSE)) | \ + (MUSYCC_GCD_ECLK_ENABLE) | PORTMAP_VAL) + +/* Group Config Descriptor bit macros */ +#define MUSYCC_GRCD_RX_ENABLE 0x00000001 /* Enable receive processing */ +#define MUSYCC_GRCD_TX_ENABLE 0x00000002 /* Enable transmit processing */ +#define MUSYCC_GRCD_SUBCHAN_DISABLE 0x00000004 /* Master disable for + * subchanneling */ +#define MUSYCC_GRCD_OOFMP_DISABLE 0x00000008 /* Out of Frame message + * processing disabled all + * channels */ +#define MUSYCC_GRCD_OOFIRQ_DISABLE 0x00000010 /* Out of Frame/In Frame irqs + * disabled */ +#define MUSYCC_GRCD_COFAIRQ_DISABLE 0x00000020 /* Change of Frame Alignment + * irq disabled */ +#define MUSYCC_GRCD_INHRBSD 0x00000100 /* Receive Buffer Status + * overwrite disabled */ +#define MUSYCC_GRCD_INHTBSD 0x00000200 /* Transmit Buffer Status + * overwrite disabled */ +#define MUSYCC_GRCD_SF_ALIGN 0x00008000 /* External frame sync */ +#define MUSYCC_GRCD_MC_ENABLE 0x00000040 /* Message configuration bits + * copy enable. Conexant sez + * turn this on */ +#define MUSYCC_GRCD_POLLTH_16 0x00000001 /* Poll every 16th frame */ +#define MUSYCC_GRCD_POLLTH_32 0x00000002 /* Poll every 32nd frame */ +#define MUSYCC_GRCD_POLLTH_64 0x00000003 /* Poll every 64th frame */ +#define MUSYCC_GRCD_POLLTH_SHIFT 10 /* Position index for poll throttle + * bit field */ +#define MUSYCC_GRCD_SUERM_THRESH_SHIFT 16 /* Position index for SUERM + * count threshold */ + +/* Port Config Descriptor bit macros */ +#define MUSYCC_PCD_E1X2_MODE 2 /* Port mode in bits 0-2. T1 and E1 */ +#define MUSYCC_PCD_E1X4_MODE 3 /* are defined in cn847x.h */ +#define MUSYCC_PCD_NX64_MODE 4 +#define MUSYCC_PCD_TXDATA_RISING 0x00000010 /* Sample Tx data on TCLK + * rising edge */ +#define MUSYCC_PCD_TXSYNC_RISING 0x00000020 /* Sample Tx frame sync on + * TCLK rising edge */ +#define MUSYCC_PCD_RXDATA_RISING 0x00000040 /* Sample Rx data on RCLK + * rising edge */ +#define MUSYCC_PCD_RXSYNC_RISING 0x00000080 /* Sample Rx frame sync on + * RCLK rising edge */ +#define MUSYCC_PCD_ROOF_RISING 0x00000100 /* Sample Rx Out Of Frame + * signal on RCLK rising edge */ +#define MUSYCC_PCD_TX_DRIVEN 0x00000200 /* No mapped timeslots causes + * logic 1 on output, else + * tristate */ +#define MUSYCC_PCD_PORTMODE_MASK 0xfffffff8 /* For changing the port mode + * between E1 and T1 */ + +/* Time Slot Descriptor bit macros */ +#define MUSYCC_TSD_MODE_64KBPS 4 +#define MUSYCC_TSD_MODE_56KBPS 5 +#define MUSYCC_TSD_SUBCHANNEL_WO_FIRST 6 +#define MUSYCC_TSD_SUBCHANNEL_WITH_FIRST 7 + +/* Message Descriptor bit macros */ +#define MUSYCC_MDT_BASE03_ADDR 0x00006000 + +/* Channel Config Descriptor bit macros */ +#define MUSYCC_CCD_BUFIRQ_DISABLE 0x00000002 /* BUFF and ONR irqs disabled */ +#define MUSYCC_CCD_EOMIRQ_DISABLE 0x00000004 /* EOM irq disabled */ +#define MUSYCC_CCD_MSGIRQ_DISABLE 0x00000008 /* LNG, FCS, ALIGN, and ABT + * irqs disabled */ +#define MUSYCC_CCD_IDLEIRQ_DISABLE 0x00000010 /* CHABT, CHIC, and SHT irqs + * disabled */ +#define MUSYCC_CCD_FILTIRQ_DISABLE 0x00000020 /* SFILT irq disabled */ +#define MUSYCC_CCD_SDECIRQ_DISABLE 0x00000040 /* SDEC irq disabled */ +#define MUSYCC_CCD_SINCIRQ_DISABLE 0x00000080 /* SINC irq disabled */ +#define MUSYCC_CCD_SUERIRQ_DISABLE 0x00000100 /* SUERR irq disabled */ +#define MUSYCC_CCD_FCS_XFER 0x00000200 /* Propagate FCS along with + * received data */ +#define MUSYCC_CCD_PROTO_SHIFT 12 /* Position index for protocol bit + * field */ +#define MUSYCC_CCD_TRANS 0 /* Protocol mode in bits 12-14 */ +#define MUSYCC_CCD_SS7 1 +#define MUSYCC_CCD_HDLC_FCS16 2 +#define MUSYCC_CCD_HDLC_FCS32 3 +#define MUSYCC_CCD_EOPIRQ_DISABLE 0x00008000 /* EOP irq disabled */ +#define MUSYCC_CCD_INVERT_DATA 0x00800000 /* Invert data */ +#define MUSYCC_CCD_MAX_LENGTH 10 /* Position index for max length bit + * field */ +#define MUSYCC_CCD_BUFFER_LENGTH 16 /* Position index for internal data + * buffer length */ +#define MUSYCC_CCD_BUFFER_LOC 24 /* Position index for internal data + * buffer starting location */ + +/**************************************************************************** + * Interrupt Descriptor Information */ + +#define INT_EMPTY_ENTRY 0xfeedface +#define INT_EMPTY_ENTRY2 0xdeadface + +/**************************************************************************** + * Interrupt Status Descriptor + * + * NOTE: One must first fetch the value of the interrupt status descriptor + * into a local variable, then pass that value into the read macros. This + * is required to avoid race conditions. + ***/ + +#define INTRPTS_NEXTINT_M 0x7FFF0000 +#define INTRPTS_NEXTINT_S 16 +#define INTRPTS_NEXTINT(x) ((x & INTRPTS_NEXTINT_M) >> INTRPTS_NEXTINT_S) + +#define INTRPTS_INTFULL_M 0x00008000 +#define INTRPTS_INTFULL_S 15 +#define INTRPTS_INTFULL(x) ((x & INTRPTS_INTFULL_M) >> INTRPTS_INTFULL_S) + +#define INTRPTS_INTCNT_M 0x00007FFF +#define INTRPTS_INTCNT_S 0 +#define INTRPTS_INTCNT(x) ((x & INTRPTS_INTCNT_M) >> INTRPTS_INTCNT_S) + + +/**************************************************************************** + * Interrupt Descriptor + ***/ + +#define INTRPT_DIR_M 0x80000000 +#define INTRPT_DIR_S 31 +#define INTRPT_DIR(x) ((x & INTRPT_DIR_M) >> INTRPT_DIR_S) + +#define INTRPT_GRP_M 0x60000000 +#define INTRPT_GRP_MSB_M 0x00004000 +#define INTRPT_GRP_S 29 +#define INTRPT_GRP_MSB_S 12 +#define INTRPT_GRP(x) (((x & INTRPT_GRP_M) >> INTRPT_GRP_S) | \ + ((x & INTRPT_GRP_MSB_M) >> INTRPT_GRP_MSB_S)) + +#define INTRPT_CH_M 0x1F000000 +#define INTRPT_CH_S 24 +#define INTRPT_CH(x) ((x & INTRPT_CH_M) >> INTRPT_CH_S) + +#define INTRPT_EVENT_M 0x00F00000 +#define INTRPT_EVENT_S 20 +#define INTRPT_EVENT(x) ((x & INTRPT_EVENT_M) >> INTRPT_EVENT_S) + +#define INTRPT_ERROR_M 0x000F0000 +#define INTRPT_ERROR_S 16 +#define INTRPT_ERROR(x) ((x & INTRPT_ERROR_M) >> INTRPT_ERROR_S) + +#define INTRPT_ILOST_M 0x00008000 +#define INTRPT_ILOST_S 15 +#define INTRPT_ILOST(x) ((x & INTRPT_ILOST_M) >> INTRPT_ILOST_S) + +#define INTRPT_PERR_M 0x00004000 +#define INTRPT_PERR_S 14 +#define INTRPT_PERR(x) ((x & INTRPT_PERR_M) >> INTRPT_PERR_S) + +#define INTRPT_BLEN_M 0x00003FFF +#define INTRPT_BLEN_S 0 +#define INTRPT_BLEN(x) ((x & INTRPT_BLEN_M) >> INTRPT_BLEN_S) + + +/* Buffer Descriptor bit macros */ +#define OWNER_BIT 0x80000000 /* Set for MUSYCC owner on xmit, host + * owner on receive */ +#define HOST_TX_OWNED 0x00000000 /* Host owns descriptor */ +#define MUSYCC_TX_OWNED 0x80000000 /* MUSYCC owns descriptor */ +#define HOST_RX_OWNED 0x80000000 /* Host owns descriptor */ +#define MUSYCC_RX_OWNED 0x00000000 /* MUSYCC owns descriptor */ + +#define POLL_DISABLED 0x40000000 /* MUSYCC not allowed to poll buffer + * for ownership */ +#define EOMIRQ_ENABLE 0x20000000 /* This buffer contains the end of + * the message */ +#define EOBIRQ_ENABLE 0x10000000 /* EOB irq enabled */ +#define PADFILL_ENABLE 0x01000000 /* Enable padfill */ +#define REPEAT_BIT 0x00008000 /* Bit on for FISU descriptor */ +#define LENGTH_MASK 0X3fff /* This part of status descriptor is + * length */ +#define IDLE_CODE 25 /* Position index for idle code (2 + * bits) */ +#define EXTRA_FLAGS 16 /* Position index for minimum flags + * between messages (8 bits) */ +#define IDLE_CODE_MASK 0x03 /* Gets rid of garbage before the + * pattern is OR'd in */ +#define EXTRA_FLAGS_MASK 0xff /* Gets rid of garbage before the + * pattern is OR'd in */ +#define PCI_PERMUTED_OWNER_BIT 0x00000080 /* For flipping the bit on + * the polled mode descriptor */ + +/* Service Request Descriptor bit macros */ +#define SREQ 8 /* Position index for service request bit + * field */ +#define SR_NOOP (0<<(SREQ)) /* No Operation. Generates SACK */ +#define SR_CHIP_RESET (1<<(SREQ)) /* Soft chip reset */ +#define SR_GROUP_RESET (2<<(SREQ)) /* Group reset */ +#define SR_GLOBAL_INIT (4<<(SREQ)) /* Global init: read global + * config deswc and interrupt + * queue desc */ +#define SR_GROUP_INIT (5<<(SREQ)) /* Group init: read Timeslot + * and Subchannel maps, + * Channel Config, */ + /* + * Group Config, Memory Protect, Message Length, and Port Config + * Descriptors + */ +#define SR_CHANNEL_ACTIVATE (8<<(SREQ)) /* Init channel, read Head + * Pointer, process first + * Message Descriptor */ +#define SR_GCHANNEL_MASK 0x001F /* channel portion (gchan) */ +#define SR_CHANNEL_DEACTIVATE (9<<(SREQ)) /* Stop channel processing */ +#define SR_JUMP (10<<(SREQ)) /* a: Process new Message + * List */ +#define SR_CHANNEL_CONFIG (11<<(SREQ)) /* b: Read channel + * Configuration Descriptor */ +#define SR_GLOBAL_CONFIG (16<<(SREQ)) /* 10: Read Global + * Configuration Descriptor */ +#define SR_INTERRUPT_Q (17<<(SREQ)) /* 11: Read Interrupt Queue + * Descriptor */ +#define SR_GROUP_CONFIG (18<<(SREQ)) /* 12: Read Group + * Configuration Descriptor */ +#define SR_MEMORY_PROTECT (19<<(SREQ)) /* 13: Read Memory Protection + * Descriptor */ +#define SR_MESSAGE_LENGTH (20<<(SREQ)) /* 14: Read Message Length + * Descriptor */ +#define SR_PORT_CONFIG (21<<(SREQ)) /* 15: Read Port + * Configuration Descriptor */ +#define SR_TIMESLOT_MAP (24<<(SREQ)) /* 18: Read Timeslot Map */ +#define SR_SUBCHANNEL_MAP (25<<(SREQ)) /* 19: Read Subchannel Map */ +#define SR_CHAN_CONFIG_TABLE (26<<(SREQ)) /* 20: Read Channel + * Configuration Table for + * the group */ +#define SR_TX_DIRECTION 0x00000020 /* Transmit direction bit. + * Bit off indicates receive + * direction */ +#define SR_RX_DIRECTION 0x00000000 + +/* Interrupt Descriptor bit macros */ +#define GROUP10 29 /* Position index for the 2 LS group + * bits */ +#define CHANNEL 24 /* Position index for channel bits */ +#define INT_IQD_TX 0x80000000 +#define INT_IQD_GRP 0x60000000 +#define INT_IQD_CHAN 0x1f000000 +#define INT_IQD_EVENT 0x00f00000 +#define INT_IQD_ERROR 0x000f0000 +#define INT_IQD_ILOST 0x00008000 +#define INT_IQD_PERR 0x00004000 +#define INT_IQD_BLEN 0x00003fff + +/* Interrupt Descriptor Events */ +#define EVE_EVENT 20 /* Position index for event bits */ +#define EVE_NONE 0 /* No event to report in this + * interrupt */ +#define EVE_SACK 1 /* Service Request acknowledge */ +#define EVE_EOB 2 /* End of Buffer */ +#define EVE_EOM 3 /* End of Message */ +#define EVE_EOP 4 /* End of Padfill */ +#define EVE_CHABT 5 /* Change to Abort Code */ +#define EVE_CHIC 6 /* Change to Idle Code */ +#define EVE_FREC 7 /* Frame Recovery */ +#define EVE_SINC 8 /* MTP2 SUERM Increment */ +#define EVE_SDEC 9 /* MTP2 SUERM Decrement */ +#define EVE_SFILT 10 /* MTP2 SUERM Filtered Message */ +/* Interrupt Descriptor Errors */ +#define ERR_ERRORS 16 /* Position index for error bits */ +#define ERR_BUF 1 /* Buffer Error */ +#define ERR_COFA 2 /* Change of Frame Alignment Error */ +#define ERR_ONR 3 /* Owner Bit Error */ +#define ERR_PROT 4 /* Memory Protection Error */ +#define ERR_OOF 8 /* Out of Frame Error */ +#define ERR_FCS 9 /* FCS Error */ +#define ERR_ALIGN 10 /* Octet Alignment Error */ +#define ERR_ABT 11 /* Abort Termination */ +#define ERR_LNG 12 /* Long Message Error */ +#define ERR_SHT 13 /* Short Message Error */ +#define ERR_SUERR 14 /* SUERM threshold exceeded */ +#define ERR_PERR 15 /* PCI Parity Error */ +/* Other Stuff */ +#define TRANSMIT_DIRECTION 0x80000000 /* Transmit direction bit. Bit off + * indicates receive direction */ +#define ILOST 0x00008000 /* Interrupt Lost */ +#define GROUPMSB 0x00004000 /* Group number MSB */ +#define SACK_IMAGE 0x00100000 /* Used in IRQ for semaphore test */ +#define INITIAL_STATUS 0x10000 /* IRQ status should be this after + * reset */ + +/* This must be defined on an entire channel group (Port) basis */ +#define SUERM_THRESHOLD 0x1f + +#ifdef __cplusplus +} +#endif + +#undef VINT32 +#undef VINT8 + +#endif /*** _INC_MUSYCC_H_ ***/ + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/ossiRelease.c b/drivers/staging/cxt1e1/ossiRelease.c new file mode 100644 index 000000000000..a56029866c2d --- /dev/null +++ b/drivers/staging/cxt1e1/ossiRelease.c @@ -0,0 +1,39 @@ +/* + * $Id: ossiRelease.c,v 1.2 2008/05/08 20:14:03 rdobbs PMCC4_3_1B $ + */ + +/*----------------------------------------------------------------------------- + * ossiRelease.c - + * + * This string will be embedded into the executable and will track the + * release. The embedded string may be displayed using the following: + * + * strings <filename> | grep \$Rel + * + * Copyright (C) 2002-2008 One Stop Systems, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@onestopsystems.com + * One Stop Systems, Inc. Escondido, California U.S.A. + * + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.2 $ + * Last changed on $Date: 2008/05/08 20:14:03 $ + * Changed by $Author: rdobbs $ + *----------------------------------------------------------------------------- + */ + + +char pmcc4_OSSI_release[] = "$Release: PMCC4_3_1B, Copyright (c) 2008 One Stop Systems$"; + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c b/drivers/staging/cxt1e1/pmc93x6_eeprom.c new file mode 100644 index 000000000000..02c829b318b4 --- /dev/null +++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c @@ -0,0 +1,559 @@ +/* pmc93x6_eeprom.c - PMC's 93LC46 EEPROM Device + * + * The 93LC46 is a low-power, serial Electrically Erasable and + * Programmable Read Only Memory organized as 128 8-bit bytes. + * + * Accesses to the 93LC46 are done in a bit serial stream, organized + * in a 3 wire format. Writes are internally timed by the device + * (the In data bit is pulled low until the write is complete and + * then is pulled high) and take about 6 milliseconds. + * + * Copyright (C) 2003-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/types.h> +#include "pmcc4_sysdep.h" +#include "sbecom_inline_linux.h" +#include "pmcc4.h" +#include "sbe_promformat.h" + +#ifndef TRUE +#define TRUE 1 +#define FALSE 0 +#endif + +#ifdef SBE_INCLUDE_SYMBOLS +#define STATIC +#else +#define STATIC static +#endif + + +/*------------------------------------------------------------------------ + * EEPROM address definitions + *------------------------------------------------------------------------ + * + * The offset in the definitions below allows the test to skip over + * areas of the EEPROM that other programs (such a VxWorks) are + * using. + */ + +#define EE_MFG (long)0 /* Index to manufacturing record */ +#define EE_FIRST 0x28 /* Index to start testing at */ +#define EE_LIMIT 128 /* Index to end testing at */ + + +/* Bit Ordering for Instructions +** +** A0, A1, A2, A3, A4, A5, A6, OP0, OP1, SB (lsb, or 1st bit out) +** +*/ + +#define EPROM_EWEN 0x0019 /* Erase/Write enable (reversed) */ +#define EPROM_EWDS 0x0001 /* Erase/Write disable (reversed) */ +#define EPROM_READ 0x0003 /* Read (reversed) */ +#define EPROM_WRITE 0x0005 /* Write (reversed) */ +#define EPROM_ERASE 0x0007 /* Erase (reversed) */ +#define EPROM_ERAL 0x0009 /* Erase All (reversed) */ +#define EPROM_WRAL 0x0011 /* Write All (reversed) */ + +#define EPROM_ADR_SZ 7 /* Number of bits in offset address */ +#define EPROM_OP_SZ 3 /* Number of bits in command */ +#define SIZE_ADDR_OP (EPROM_ADR_SZ + EPROM_OP_SZ) +#define LC46A_MAX_OPS 10 /* Number of bits in Instruction */ +#define NUM_OF_BITS 8 /* Number of bits in data */ + + +/* EEPROM signal bits */ +#define EPROM_ACTIVE_OUT_BIT 0x0001 /* Out data bit */ +#define EPROM_ACTIVE_IN_BIT 0x0002 /* In data bit */ +#define ACTIVE_IN_BIT_SHIFT 0x0001 /* Shift In data bit to LSB */ +#define EPROM_ENCS 0x0004 /* Set EEPROM CS during operation */ + + +/*------------------------------------------------------------------------ + * The ByteReverse table is used to reverses the 8 bits within a byte + *------------------------------------------------------------------------ + */ + +static unsigned char ByteReverse[256]; +static int ByteReverseBuilt = FALSE; + + +/*------------------------------------------------------------------------ + * mfg_template - initial serial EEPROM data structure + *------------------------------------------------------------------------ + */ + +short mfg_template[sizeof (FLD_TYPE2)] = +{ + PROM_FORMAT_TYPE2, /* type; */ + 0x00, 0x1A, /* length[2]; */ + 0x00, 0x00, 0x00, 0x00, /* Crc32[4]; */ + 0x11, 0x76, /* Id[2]; */ + 0x07, 0x05, /* SubId[2] E1; */ + 0x00, 0xA0, 0xD6, 0x00, 0x00, 0x00, /* Serial[6]; */ + 0x00, 0x00, 0x00, 0x00, /* CreateTime[4]; */ + 0x00, 0x00, 0x00, 0x00, /* HeatRunTime[4]; */ + 0x00, 0x00, 0x00, 0x00, /* HeatRunIterations[4]; */ + 0x00, 0x00, 0x00, 0x00, /* HeatRunErrors[4]; */ +}; + + +/*------------------------------------------------------------------------ + * BuildByteReverse - build the 8-bit reverse table + *------------------------------------------------------------------------ + * + * The 'ByteReverse' table reverses the 8 bits within a byte + * (the MSB becomes the LSB etc.). + */ + +STATIC void +BuildByteReverse (void) +{ + long half; /* Used to build by powers to 2 */ + int i; + + ByteReverse[0] = 0; + + for (half = 1; half < sizeof (ByteReverse); half <<= 1) + for (i = 0; i < half; i++) + ByteReverse[half + i] = (char) (ByteReverse[i] | (0x80 / half)); + + ByteReverseBuilt = TRUE; +} + + +/*------------------------------------------------------------------------ + * eeprom_delay - small delay for EEPROM timing + *------------------------------------------------------------------------ + */ + +STATIC void +eeprom_delay (void) +{ + int timeout; + + for (timeout = 20; timeout; --timeout) + { + OS_uwait_dummy (); + } +} + + +/*------------------------------------------------------------------------ + * eeprom_put_byte - Send a byte to the EEPROM serially + *------------------------------------------------------------------------ + * + * Given the PCI address and the data, this routine serially sends + * the data to the EEPROM. + */ + +void +eeprom_put_byte (long addr, long data, int count) +{ + u_int32_t output; + + while (--count >= 0) + { + output = (data & EPROM_ACTIVE_OUT_BIT) ? 1 : 0; /* Get next data bit */ + output |= EPROM_ENCS; /* Add Chip Select */ + data >>= 1; + + eeprom_delay (); + pci_write_32 ((u_int32_t *) addr, output); /* Output it */ + } +} + + +/*------------------------------------------------------------------------ + * eeprom_get_byte - Receive a byte from the EEPROM serially + *------------------------------------------------------------------------ + * + * Given the PCI address, this routine serially fetches the data + * from the EEPROM. + */ + +u_int32_t +eeprom_get_byte (long addr) +{ + u_int32_t input; + u_int32_t data; + int count; + +/* Start the Reading of DATA +** +** The first read is a dummy as the data is latched in the +** EPLD and read on the next read access to the EEPROM. +*/ + + input = pci_read_32 ((u_int32_t *) addr); + + data = 0; + count = NUM_OF_BITS; + while (--count >= 0) + { + eeprom_delay (); + input = pci_read_32 ((u_int32_t *) addr); + + data <<= 1; /* Shift data over */ + data |= (input & EPROM_ACTIVE_IN_BIT) ? 1 : 0; + + } + + return data; +} + + +/*------------------------------------------------------------------------ + * disable_pmc_eeprom - Disable writes to the EEPROM + *------------------------------------------------------------------------ + * + * Issue the EEPROM command to disable writes. + */ + +STATIC void +disable_pmc_eeprom (long addr) +{ + eeprom_put_byte (addr, EPROM_EWDS, SIZE_ADDR_OP); + + pci_write_32 ((u_int32_t *) addr, 0); /* this removes Chip Select + * from EEPROM */ +} + + +/*------------------------------------------------------------------------ + * enable_pmc_eeprom - Enable writes to the EEPROM + *------------------------------------------------------------------------ + * + * Issue the EEPROM command to enable writes. + */ + +STATIC void +enable_pmc_eeprom (long addr) +{ + eeprom_put_byte (addr, EPROM_EWEN, SIZE_ADDR_OP); + + pci_write_32 ((u_int32_t *) addr, 0); /* this removes Chip Select + * from EEPROM */ +} + + +/*------------------------------------------------------------------------ + * pmc_eeprom_read - EEPROM location read + *------------------------------------------------------------------------ + * + * Given a EEPROM PCI address and location offset, this routine returns + * the contents of the specified location to the calling routine. + */ + +u_int32_t +pmc_eeprom_read (long addr, long mem_offset) +{ + u_int32_t data; /* Data from chip */ + + if (!ByteReverseBuilt) + BuildByteReverse (); + + mem_offset = ByteReverse[0x7F & mem_offset]; /* Reverse address */ + /* + * NOTE: The max offset address is 128 or half the reversal table. So the + * LSB is always zero and counts as a built in shift of one bit. So even + * though we need to shift 3 bits to make room for the command, we only + * need to shift twice more because of the built in shift. + */ + mem_offset <<= 2; /* Shift for command */ + mem_offset |= EPROM_READ; /* Add command */ + + eeprom_put_byte (addr, mem_offset, SIZE_ADDR_OP); /* Output chip address */ + + data = eeprom_get_byte (addr); /* Read chip data */ + + pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select from + * EEPROM */ + + return (data & 0x000000FF); +} + + +/*------------------------------------------------------------------------ + * pmc_eeprom_write - EEPROM location write + *------------------------------------------------------------------------ + * + * Given a EEPROM PCI address, location offset and value, this + * routine writes the value to the specified location. + * + * Note: it is up to the caller to determine if the write + * operation succeeded. + */ + +int +pmc_eeprom_write (long addr, long mem_offset, u_int32_t data) +{ + volatile u_int32_t temp; + int count; + + if (!ByteReverseBuilt) + BuildByteReverse (); + + mem_offset = ByteReverse[0x7F & mem_offset]; /* Reverse address */ + /* + * NOTE: The max offset address is 128 or half the reversal table. So the + * LSB is always zero and counts as a built in shift of one bit. So even + * though we need to shift 3 bits to make room for the command, we only + * need to shift twice more because of the built in shift. + */ + mem_offset <<= 2; /* Shift for command */ + mem_offset |= EPROM_WRITE; /* Add command */ + + eeprom_put_byte (addr, mem_offset, SIZE_ADDR_OP); /* Output chip address */ + + data = ByteReverse[0xFF & data];/* Reverse data */ + eeprom_put_byte (addr, data, NUM_OF_BITS); /* Output chip data */ + + pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select from + * EEPROM */ + +/* +** Must see Data In at a low state before completing this transaction. +** +** Afterwards, the data bit will return to a high state, ~6 ms, terminating +** the operation. +*/ + pci_write_32 ((u_int32_t *) addr, EPROM_ENCS); /* Re-enable Chip Select */ + temp = pci_read_32 ((u_int32_t *) addr); /* discard first read */ + temp = pci_read_32 ((u_int32_t *) addr); + if (temp & EPROM_ACTIVE_IN_BIT) + { + temp = pci_read_32 ((u_int32_t *) addr); + if (temp & EPROM_ACTIVE_IN_BIT) + { + pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select + * from EEPROM */ + return (1); + } + } + count = 1000; + while (count--) + { + for (temp = 0; temp < 0x10; temp++) + OS_uwait_dummy (); + + if (pci_read_32 ((u_int32_t *) addr) & EPROM_ACTIVE_IN_BIT) + break; + } + + if (count == -1) + return (2); + + return (0); +} + + +/*------------------------------------------------------------------------ + * pmcGetBuffValue - read the specified value from buffer + *------------------------------------------------------------------------ + */ + +long +pmcGetBuffValue (char *ptr, int size) +{ + long value = 0; + int index; + + for (index = 0; index < size; ++index) + { + value <<= 8; + value |= ptr[index] & 0xFF; + } + + return value; +} + + +/*------------------------------------------------------------------------ + * pmcSetBuffValue - save the specified value to buffer + *------------------------------------------------------------------------ + */ + +void +pmcSetBuffValue (char *ptr, long value, int size) +{ + int index = size; + + while (--index >= 0) + { + ptr[index] = (char) (value & 0xFF); + value >>= 8; + } +} + + +/*------------------------------------------------------------------------ + * pmc_eeprom_read_buffer - read EEPROM data into specified buffer + *------------------------------------------------------------------------ + */ + +void +pmc_eeprom_read_buffer (long addr, long mem_offset, char *dest_ptr, int size) +{ + while (--size >= 0) + *dest_ptr++ = (char) pmc_eeprom_read (addr, mem_offset++); +} + + +/*------------------------------------------------------------------------ + * pmc_eeprom_write_buffer - write EEPROM data from specified buffer + *------------------------------------------------------------------------ + */ + +void +pmc_eeprom_write_buffer (long addr, long mem_offset, char *dest_ptr, int size) +{ + enable_pmc_eeprom (addr); + + while (--size >= 0) + pmc_eeprom_write (addr, mem_offset++, *dest_ptr++); + + disable_pmc_eeprom (addr); +} + + +/*------------------------------------------------------------------------ + * pmcCalcCrc - calculate the CRC for the serial EEPROM structure + *------------------------------------------------------------------------ + */ + +u_int32_t +pmcCalcCrc_T01 (void *bufp) +{ + FLD_TYPE2 *buf = bufp; + u_int32_t crc; /* CRC of the structure */ + + /* Calc CRC for type and length fields */ + sbeCrc ( + (u_int8_t *) &buf->type, + (u_int32_t) STRUCT_OFFSET (FLD_TYPE1, Crc32), + (u_int32_t) 0, + (u_int32_t *) &crc); + +#ifdef EEPROM_TYPE_DEBUG + printk ("sbeCrc: crc 1 calculated as %08x\n", crc); /* RLD DEBUG */ +#endif + return ~crc; +} + +u_int32_t +pmcCalcCrc_T02 (void *bufp) +{ + FLD_TYPE2 *buf = bufp; + u_int32_t crc; /* CRC of the structure */ + + /* Calc CRC for type and length fields */ + sbeCrc ( + (u_int8_t *) &buf->type, + (u_int32_t) STRUCT_OFFSET (FLD_TYPE2, Crc32), + (u_int32_t) 0, + (u_int32_t *) &crc); + + /* Calc CRC for remaining fields */ + sbeCrc ( + (u_int8_t *) &buf->Id[0], + (u_int32_t) (sizeof (FLD_TYPE2) - STRUCT_OFFSET (FLD_TYPE2, Id)), + (u_int32_t) crc, + (u_int32_t *) &crc); + +#ifdef EEPROM_TYPE_DEBUG + printk ("sbeCrc: crc 2 calculated as %08x\n", crc); /* RLD DEBUG */ +#endif + return crc; +} + + +/*------------------------------------------------------------------------ + * pmc_init_seeprom - initialize the serial EEPROM structure + *------------------------------------------------------------------------ + * + * At the front of the serial EEPROM there is a record that contains + * manufacturing information. If the info does not already exist, it + * is created. The only field modifiable by the operator is the + * serial number field. + */ + +void +pmc_init_seeprom (u_int32_t addr, u_int32_t serialNum) +{ + PROMFORMAT buffer; /* Memory image of structure */ + u_int32_t crc; /* CRC of structure */ + time_t createTime; + int i; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + createTime = CURRENT_TIME; +#else + createTime = get_seconds (); +#endif + + /* use template data */ + for (i = 0; i < sizeof (FLD_TYPE2); ++i) + buffer.bytes[i] = mfg_template[i]; + + /* Update serial number field in buffer */ + pmcSetBuffValue (&buffer.fldType2.Serial[3], serialNum, 3); + + /* Update create time field in buffer */ + pmcSetBuffValue (&buffer.fldType2.CreateTime[0], createTime, 4); + + /* Update CRC field in buffer */ + crc = pmcCalcCrc_T02 (&buffer); + pmcSetBuffValue (&buffer.fldType2.Crc32[0], crc, 4); + +#ifdef DEBUG + for (i = 0; i < sizeof (FLD_TYPE2); ++i) + printk ("[%02X] = %02X\n", i, buffer.bytes[i] & 0xFF); +#endif + + /* Write structure to serial EEPROM */ + pmc_eeprom_write_buffer (addr, EE_MFG, (char *) &buffer, sizeof (FLD_TYPE2)); +} + + +char +pmc_verify_cksum (void *bufp) +{ + FLD_TYPE1 *buf1 = bufp; + FLD_TYPE2 *buf2 = bufp; + u_int32_t crc1, crc2; /* CRC read from EEPROM */ + + /* Retrieve contents of CRC field */ + crc1 = pmcGetBuffValue (&buf1->Crc32[0], sizeof (buf1->Crc32)); +#ifdef EEPROM_TYPE_DEBUG + printk ("EEPROM: chksum 1 reads as %08x\n", crc1); /* RLD DEBUG */ +#endif + if ((buf1->type == PROM_FORMAT_TYPE1) && + (pmcCalcCrc_T01 ((void *) buf1) == crc1)) + return PROM_FORMAT_TYPE1; /* checksum type 1 verified */ + + crc2 = pmcGetBuffValue (&buf2->Crc32[0], sizeof (buf2->Crc32)); +#ifdef EEPROM_TYPE_DEBUG + printk ("EEPROM: chksum 2 reads as %08x\n", crc2); /* RLD DEBUG */ +#endif + if ((buf2->type == PROM_FORMAT_TYPE2) && + (pmcCalcCrc_T02 ((void *) buf2) == crc2)) + return PROM_FORMAT_TYPE2; /* checksum type 2 verified */ + + return PROM_FORMAT_Unk; /* failed to validate */ +} + + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.h b/drivers/staging/cxt1e1/pmc93x6_eeprom.h new file mode 100644 index 000000000000..c3ada87efd26 --- /dev/null +++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.h @@ -0,0 +1,60 @@ +/* + * $Id: pmc93x6_eeprom.h,v 1.1 2005/09/28 00:10:08 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_PMC93X6_EEPROM_H_ +#define _INC_PMC93X6_EEPROM_H_ + +/*----------------------------------------------------------------------------- + * pmc93x6_eeprom.h - + * + * Copyright (C) 2002-2004 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + *----------------------------------------------------------------------------- + * $Log: pmc93x6_eeprom.h,v $ + * Revision 1.1 2005/09/28 00:10:08 rickd + * pmc_verify_cksum return value is char. + * + * Revision 1.0 2005/05/04 17:20:51 rickd + * Initial revision + * + * Revision 1.0 2005/04/22 23:48:48 rickd + * Initial revision + * + *----------------------------------------------------------------------------- + */ + +#if defined (__FreeBSD__) || defined (__NetBSD__) +#include <sys/types.h> +#else +#include <linux/types.h> +#endif + +#ifdef __KERNEL__ + +#include "pmcc4_private.h" + +void pmc_eeprom_read_buffer (long, long, char *, int); +void pmc_eeprom_write_buffer (long, long, char *, int); +void pmc_init_seeprom (u_int32_t, u_int32_t); +char pmc_verify_cksum (void *); + +#endif /*** __KERNEL__ ***/ + +#endif + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/pmcc4.h b/drivers/staging/cxt1e1/pmcc4.h new file mode 100644 index 000000000000..26c1f0ea72e9 --- /dev/null +++ b/drivers/staging/cxt1e1/pmcc4.h @@ -0,0 +1,155 @@ +/* + * $Id: pmcc4.h,v 1.4 2005/11/01 19:24:48 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_PMCC4_H_ +#define _INC_PMCC4_H_ + +/*----------------------------------------------------------------------------- + * pmcc4.h - + * + * Copyright (C) 2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.4 $ + * Last changed on $Date: 2005/11/01 19:24:48 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: pmcc4.h,v $ + * Revision 1.4 2005/11/01 19:24:48 rickd + * Remove de-implement function prototypes. Several <int> to + * <status_t> changes for consistant usage of same. + * + * Revision 1.3 2005/09/28 00:10:08 rickd + * Add GNU license info. Use config params from libsbew.h + * + * Revision 1.2 2005/04/28 23:43:03 rickd + * Add RCS tracking heading. + * + *----------------------------------------------------------------------------- + */ + + +#if defined(__FreeBSD__) || defined(__NetBSD__) +#include <sys/types.h> +#else +#ifndef __KERNEL__ +#include <sys/types.h> +#else +#include <linux/types.h> +#endif +#endif + + + +typedef int status_t; + +#define SBE_DRVR_FAIL 0 +#define SBE_DRVR_SUCCESS 1 + +#ifdef __cplusplus +extern "C" +{ +#endif + + +/********************/ +/* PMCC4 memory Map */ +/********************/ + +#define COMET_OFFSET(x) (0x80000+(x)*0x10000) +#define EEPROM_OFFSET 0xC0000 +#define CPLD_OFFSET 0xD0000 + + struct pmcc4_timeslot_param + { + u_int8_t card; /* the card number */ + u_int8_t port; /* the port number */ + u_int8_t _reserved1; + u_int8_t _reserved2; + + /* + * each byte in bitmask below represents one timeslot (bitmask[0] is + * for timeslot 0 and so on), each bit in the byte selects timeslot + * bits for this channel (0xff - whole timeslot, 0x7f - 56kbps mode) + */ + u_int8_t bitmask[32]; + }; + + struct c4_musycc_param + { + u_int8_t RWportnum; + u_int16_t offset; + u_int32_t value; + }; + +/*Alarm values */ +#define sbeE1RMAI 0x100 +#define sbeYelAlm 0x04 +#define sbeRedAlm 0x02 +#define sbeAISAlm 0x01 + +#define sbeE1errSMF 0x02 +#define sbeE1CRC 0x01 + +#ifdef __cplusplus +} +#endif + +#ifdef __KERNEL__ + +/* + * Device Driver interface, routines are for internal use only. + */ + +#include "pmcc4_private.h" + +#if !(LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)) +char *get_hdlc_name (hdlc_device *); + +#endif + + +/* + * external interface + */ + +void c4_cleanup (void); +status_t c4_chan_up (ci_t *, int channum); +status_t c4_del_chan_stats (int channum); +status_t c4_del_chan (int channum); +status_t c4_get_iidinfo (ci_t * ci, struct sbe_iid_info * iip); +int c4_is_chan_up (int channum); + +void *getuserbychan (int channum); +void pci_flush_write (ci_t * ci); +void sbecom_set_loglevel (int debuglevel); +char *sbeid_get_bdname (ci_t * ci); +void sbeid_set_bdtype (ci_t * ci); +void sbeid_set_hdwbid (ci_t * ci); +u_int32_t sbeCrc (u_int8_t *, u_int32_t, u_int32_t, u_int32_t *); + +void VMETRO_TRACE (void *); /* put data into 8 LEDs */ +void VMETRO_TRIGGER (ci_t *, int); /* Note: int = 0(default) + * thru 15 */ + +#if defined (SBE_ISR_TASKLET) +void musycc_intr_bh_tasklet (ci_t *); + +#endif + +#endif /*** __KERNEL __ ***/ +#endif /* _INC_PMCC4_H_ */ diff --git a/drivers/staging/cxt1e1/pmcc4_cpld.h b/drivers/staging/cxt1e1/pmcc4_cpld.h new file mode 100644 index 000000000000..6d8f0337aa3e --- /dev/null +++ b/drivers/staging/cxt1e1/pmcc4_cpld.h @@ -0,0 +1,124 @@ +/* + * $Id: pmcc4_cpld.h,v 1.0 2005/09/28 00:10:08 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_PMCC4_CPLD_H_ +#define _INC_PMCC4_CPLD_H_ + +/*----------------------------------------------------------------------------- + * pmcc4_cpld.h - + * + * Copyright (C) 2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.0 $ + * Last changed on $Date: 2005/09/28 00:10:08 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: pmcc4_cpld.h,v $ + * Revision 1.0 2005/09/28 00:10:08 rickd + * Initial revision + * + *----------------------------------------------------------------------------- + */ + + +#if defined(__FreeBSD__) || defined(__NetBSD__) +#include <sys/types.h> +#else +#ifndef __KERNEL__ +#include <sys/types.h> +#else +#include <linux/types.h> +#endif +#endif + +#ifdef __cplusplus +extern "C" +{ +#endif + + +/********************************/ +/* iSPLD control chip registers */ +/********************************/ + +#if 0 +#define CPLD_MCSR 0x0 +#define CPLD_MCLK 0x1 +#define CPLD_LEDS 0x2 +#define CPLD_INTR 0x3 +#endif + + struct c4_cpld + { + volatile u_int32_t mcsr;/* r/w: Master Clock Source Register */ + volatile u_int32_t mclk;/* r/w: Master Clock Register */ + volatile u_int32_t leds;/* r/w: LED Register */ + volatile u_int32_t intr;/* r: Interrupt Register */ + }; + + typedef struct c4_cpld c4cpld_t; + +/* mcsr note: sourcing COMET must be initialized to Master Mode */ +#define PMCC4_CPLD_MCSR_IND 0 /* ports used individual BP Clk as + * source, no slaves */ +#define PMCC4_CPLD_MCSR_CMT_1 1 /* COMET 1 BP Clk is source, 2,3,4 + * are Clk slaves */ +#define PMCC4_CPLD_MCSR_CMT_2 2 /* COMET 2 BP Clk is source, 1,3,4 + * are Clk slaves */ +#define PMCC4_CPLD_MCSR_CMT_3 3 /* COMET 3 BP Clk is source, 1,2,4 + * are Clk slaves */ +#define PMCC4_CPLD_MCSR_CMT_4 4 /* COMET 4 BP Clk is source, 1,2,3 + * are Clk slaves */ + +#define PMCC4_CPLD_MCLK_MASK 0x0f +#define PMCC4_CPLD_MCLK_P1 0x1 +#define PMCC4_CPLD_MCLK_P2 0x2 +#define PMCC4_CPLD_MCLK_P3 0x4 +#define PMCC4_CPLD_MCLK_P4 0x8 +#define PMCC4_CPLD_MCLK_T1 0x00 +#define PMCC4_CPLD_MCLK_P1_E1 0x01 +#define PMCC4_CPLD_MCLK_P2_E1 0x02 +#define PMCC4_CPLD_MCLK_P3_E1 0x04 +#define PMCC4_CPLD_MCLK_P4_E1 0x08 + +#define PMCC4_CPLD_LED_OFF 0 +#define PMCC4_CPLD_LED_ON 1 +#define PMCC4_CPLD_LED_GP0 0x01 /* port 0, green */ +#define PMCC4_CPLD_LED_YP0 0x02 /* port 0, yellow */ +#define PMCC4_CPLD_LED_GP1 0x04 /* port 1, green */ +#define PMCC4_CPLD_LED_YP1 0x08 /* port 1, yellow */ +#define PMCC4_CPLD_LED_GP2 0x10 /* port 2, green */ +#define PMCC4_CPLD_LED_YP2 0x20 /* port 2, yellow */ +#define PMCC4_CPLD_LED_GP3 0x40 /* port 3, green */ +#define PMCC4_CPLD_LED_YP3 0x80 /* port 3, yellow */ +#define PMCC4_CPLD_LED_GREEN (PMCC4_CPLD_LED_GP0 | PMCC4_CPLD_LED_GP1 | \ + PMCC4_CPLD_LED_GP2 | PMCC4_CPLD_LED_GP3 ) +#define PMCC4_CPLD_LED_YELLOW (PMCC4_CPLD_LED_YP0 | PMCC4_CPLD_LED_YP1 | \ + PMCC4_CPLD_LED_YP2 | PMCC4_CPLD_LED_YP3) + +#define PMCC4_CPLD_INTR_MASK 0x0f +#define PMCC4_CPLD_INTR_CMT_1 0x01 +#define PMCC4_CPLD_INTR_CMT_2 0x02 +#define PMCC4_CPLD_INTR_CMT_3 0x04 +#define PMCC4_CPLD_INTR_CMT_4 0x08 + +#ifdef __cplusplus +} +#endif + +#endif /* _INC_PMCC4_CPLD_H_ */ diff --git a/drivers/staging/cxt1e1/pmcc4_defs.h b/drivers/staging/cxt1e1/pmcc4_defs.h new file mode 100644 index 000000000000..186347b8d565 --- /dev/null +++ b/drivers/staging/cxt1e1/pmcc4_defs.h @@ -0,0 +1,82 @@ +/* + * $Id: pmcc4_defs.h,v 1.0 2005/09/28 00:10:09 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_PMCC4_DEFS_H_ +#define _INC_PMCC4_DEFS_H_ + +/*----------------------------------------------------------------------------- + * c4_defs.h - + * + * Implementation elements of the wanPMC-C4T1E1 device driver + * + * Copyright (C) 2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.0 $ + * Last changed on $Date: 2005/09/28 00:10:09 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: pmcc4_defs.h,v $ + * Revision 1.0 2005/09/28 00:10:09 rickd + * Initial revision + * + *----------------------------------------------------------------------------- + */ + + +#define MAX_BOARDS 8 +#define MAX_CHANS_USED 128 + +#ifdef SBE_PMCC4_ENABLE +#define MUSYCC_NPORTS 4 /* CN8474 */ +#endif +#ifdef SBE_WAN256T3_ENABLE +#define MUSYCC_NPORTS 8 /* CN8478 */ +#endif +#define MUSYCC_NCHANS 32 /* actually, chans per port */ + +#define MUSYCC_NIQD 0x1000 /* power of 2 */ +#define MUSYCC_MRU 2048 /* default */ +#define MUSYCC_MTU 2048 /* default */ +#define MUSYCC_TXDESC_MIN 10 /* HDLC mode default */ +#define MUSYCC_RXDESC_MIN 18 /* HDLC mode default */ +#define MUSYCC_TXDESC_TRANS 4 /* Transparent mode minumum # of TX descriptors */ +#define MUSYCC_RXDESC_TRANS 12 /* Transparent mode minumum # of RX descriptors */ + +#define MAX_DEFAULT_IFQLEN 32 /* network qlen */ + + +#define SBE_IFACETMPL "pmcc4-%d" +#ifdef IFNAMSIZ +#define SBE_IFACETMPL_SIZE IFNAMSIZ +#else +#define SBE_IFACETMPL_SIZE 16 +#endif + +/* we want the PMCC4 watchdog to fire off every 250ms */ +#define WATCHDOG_TIMEOUT 250000 + +/* if we restart the watchdog every 250ms, then we'll time out + * an additional 300ms later */ +#define WATCHDOG_UTIMEOUT (WATCHDOG_TIMEOUT+300000) + +#if !defined(SBE_ISR_TASKLET) && !defined(SBE_ISR_IMMEDIATE) && !defined(SBE_ISR_INLINE) +#define SBE_ISR_TASKLET +#endif + +#endif /*** _INC_PMCC4_DEFS_H_ ***/ + diff --git a/drivers/staging/cxt1e1/pmcc4_drv.c b/drivers/staging/cxt1e1/pmcc4_drv.c new file mode 100644 index 000000000000..ada80d0b6059 --- /dev/null +++ b/drivers/staging/cxt1e1/pmcc4_drv.c @@ -0,0 +1,1855 @@ +/* + * $Id: pmcc4_drv.c,v 3.1 2007/08/15 23:32:17 rickd PMCC4_3_1B $ + */ + + +/*----------------------------------------------------------------------------- + * pmcc4_drv.c - + * + * Copyright (C) 2007 One Stop Systems, Inc. + * Copyright (C) 2002-2006 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@onestopsystems.com + * One Stop Systems, Inc. Escondido, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 3.1 $ + * Last changed on $Date: 2007/08/15 23:32:17 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: pmcc4_drv.c,v $ + * Revision 3.1 2007/08/15 23:32:17 rickd + * Use 'if 0' instead of GNU comment delimeter to avoid line wrap induced compiler errors. + * + * Revision 3.0 2007/08/15 22:19:55 rickd + * Correct sizeof() castings and pi->regram to support 64bit compatibility. + * + * Revision 2.10 2006/04/21 00:56:40 rickd + * workqueue files now prefixed with <sbecom> prefix. + * + * Revision 2.9 2005/11/01 19:22:49 rickd + * Add sanity checks against max_port for ioctl functions. + * + * Revision 2.8 2005/10/27 18:59:25 rickd + * Code cleanup. Default channel config to HDLC_FCS16. + * + * Revision 2.7 2005/10/18 18:16:30 rickd + * Further NCOMM code repairs - (1) interrupt matrix usage inconsistant + * for indexing into nciInterrupt[][], code missing double parameters. + * (2) check input of ncomm interrupt registration cardID for correct + * boundary values. + * + * Revision 2.6 2005/10/17 23:55:28 rickd + * Initial port of NCOMM support patches from original work found + * in pmc_c4t1e1 as updated by NCOMM. Ref: CONFIG_SBE_PMCC4_NCOMM. + * Corrected NCOMMs wanpmcC4T1E1_getBaseAddress() to correctly handle + * multiple boards. + * + * Revision 2.5 2005/10/13 23:01:28 rickd + * Correct panic for illegal address reference w/in get_brdinfo on + * first_if/last_if name acquistion under Linux 2.6 + * + * Revision 2.4 2005/10/13 21:20:19 rickd + * Correction of c4_cleanup() wherein next should be acquired before + * ci_t structure is free'd. + * + * Revision 2.3 2005/10/13 19:20:10 rickd + * Correct driver removal cleanup code for multiple boards. + * + * Revision 2.2 2005/10/11 18:34:04 rickd + * New routine added to determine number of ports (comets) on board. + * + * Revision 2.1 2005/10/05 00:48:13 rickd + * Add some RX activation trace code. + * + * Revision 2.0 2005/09/28 00:10:06 rickd + * Implement 2.6 workqueue for TX/RX restart. Correction to + * hardware register boundary checks allows expanded access of MUSYCC. + * Implement new musycc reg&bits namings. + * + *----------------------------------------------------------------------------- + */ + +char OSSIid_pmcc4_drvc[] = +"@(#)pmcc4_drv.c - $Revision: 3.1 $ (c) Copyright 2002-2007 One Stop Systems, Inc."; + + +#if defined (__FreeBSD__) || defined (__NetBSD__) +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/errno.h> +#else +#include <linux/types.h> +#include "pmcc4_sysdep.h" +#include <linux/errno.h> +#include <linux/kernel.h> +#include <linux/sched.h> /* include for timer */ +#include <linux/timer.h> /* include for timer */ +#include <linux/hdlc.h> +#include <asm/io.h> +#endif + +#include "sbecom_inline_linux.h" +#include "libsbew.h" +#include "pmcc4_private.h" +#include "pmcc4.h" +#include "pmcc4_ioctls.h" +#include "musycc.h" +#include "comet.h" +#include "sbe_bid.h" + +#ifdef SBE_INCLUDE_SYMBOLS +#define STATIC +#else +#define STATIC static +#endif + + +#define KERN_WARN KERN_WARNING + +/* forward references */ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41) +status_t c4_wk_chan_init (mpi_t *, mch_t *); +void c4_wq_port_cleanup (mpi_t *); +status_t c4_wq_port_init (mpi_t *); + +#endif +int c4_loop_port (ci_t *, int, u_int8_t); +status_t c4_set_port (ci_t *, int); +status_t musycc_chan_down (ci_t *, int); + +u_int32_t musycc_chan_proto (int); +status_t musycc_dump_ring (ci_t *, unsigned int); +status_t __init musycc_init (ci_t *); +void musycc_init_mdt (mpi_t *); +void musycc_serv_req (mpi_t *, u_int32_t); +void musycc_update_timeslots (mpi_t *); + +extern void musycc_update_tx_thp (mch_t *); +extern int log_level; +extern int max_mru; +extern int max_mtu; +extern int max_rxdesc_used, max_rxdesc_default; +extern int max_txdesc_used, max_txdesc_default; + +#if defined (__powerpc__) +extern void *memset (void *s, int c, size_t n); + +#endif + +int drvr_state = SBE_DRVR_INIT; +ci_t *c4_list = 0; +ci_t *CI; /* dummy pointer to board ZEROE's data - + * DEBUG USAGE */ + + +void +sbecom_set_loglevel (int d) +{ + /* + * The code within the following -if- clause is a backdoor debug facility + * which can be used to display the state of a board's channel. + */ + if (d > LOG_DEBUG) + { + unsigned int channum = d - (LOG_DEBUG + 1); /* convert to ZERO + * relativity */ + + (void) musycc_dump_ring ((ci_t *) CI, channum); /* CI implies support + * for card 0 only */ + } else + { + if (log_level != d) + { + printk ("%s: log level changed from %d to %d\n", THIS_MODULE->name, log_level, d); + log_level = d; /* set new */ + } else + printk ("%s: log level is %d\n", THIS_MODULE->name, log_level); + } +} + + +mch_t * +c4_find_chan (int channum) +{ + ci_t *ci; + mch_t *ch; + int portnum, gchan; + + for (ci = c4_list; ci; ci = ci->next) + for (portnum = 0; portnum < ci->max_port; portnum++) + for (gchan = 0; gchan < MUSYCC_NCHANS; gchan++) + { + if ((ch = ci->port[portnum].chan[gchan])) + { + if ((ch->state != UNASSIGNED) && + (ch->channum == channum)) + return (ch); + } + } + return 0; +} + + +ci_t *__init +c4_new (void *hi) +{ + ci_t *ci; + +#ifdef SBE_MAP_DEBUG + printk (KERN_WARNING "%s: c4_new() entered, ci needs %u.\n", + THIS_MODULE->name, (unsigned int) sizeof (ci_t)); +#endif + + ci = (ci_t *) OS_kmalloc (sizeof (ci_t)); + if (ci) + { + ci->hdw_info = hi; + ci->state = C_INIT; /* mark as hardware not available */ + ci->next = c4_list; + c4_list = ci; + ci->brdno = ci->next ? ci->next->brdno + 1 : 0; + } else + printk (KERN_WARNING "%s: failed CI malloc, size %u.\n", + THIS_MODULE->name, (unsigned int) sizeof (ci_t)); + + if (CI == 0) + CI = ci; /* DEBUG, only board 0 usage */ + return ci; +} + + +/*** + * Check port state and set LED states using watchdog or ioctl... + * also check for in-band SF loopback commands (& cause results if they are there) + * + * Alarm function depends on comet bits indicating change in + * link status (linkMask) to keep the link status indication straight. + * + * Indications are only LED and system log -- except when ioctl is invoked. + * + * "alarmed" record (a.k.a. copyVal, in some cases below) decodes as: + * + * RMAI (E1 only) 0x100 + * alarm LED on 0x80 + * link LED on 0x40 + * link returned 0x20 (link was down, now it's back and 'port get' hasn't run) + * change in LED 0x10 (update LED register because value has changed) + * link is down 0x08 + * YelAlm(RAI) 0x04 + * RedAlm 0x02 + * AIS(blue)Alm 0x01 + * + * note "link has returned" indication is reset on read + * (e.g. by use of the c4_control port get command) + */ + +#define sbeLinkMask 0x41 /* change in signal status (lost/recovered) + + * state */ +#define sbeLinkChange 0x40 +#define sbeLinkDown 0x01 +#define sbeAlarmsMask 0x07 /* red / yellow / blue alarm conditions */ +#define sbeE1AlarmsMask 0x107 /* alarm conditions */ + +#define COMET_LBCMD_READ 0x80 /* read only (do not set, return read value) */ + +void +checkPorts (ci_t * ci) +{ +#ifndef CONFIG_SBE_PMCC4_NCOMM + /* + * PORT POINT - NCOMM needs to avoid this code since the polling of + * alarms conflicts with NCOMM's interrupt servicing implementation. + */ + + comet_t *comet; + volatile u_int32_t value; + u_int32_t copyVal, LEDval; + + u_int8_t portnum; + + LEDval = 0; + for (portnum = 0; portnum < ci->max_port; portnum++) + { + copyVal = 0x12f & (ci->alarmed[portnum]); /* port's alarm record */ + comet = ci->port[portnum].cometbase; + value = pci_read_32 ((u_int32_t *) &comet->cdrc_ists) & sbeLinkMask; /* link loss reg */ + + if (value & sbeLinkChange) /* is there a change in the link stuff */ + { + /* if there's been a change (above) and yet it's the same (below) */ + if (!(((copyVal >> 3) & sbeLinkDown) ^ (value & sbeLinkDown))) + { + if (value & sbeLinkDown) + printk (KERN_WARN "%s: Port %d momentarily recovered.\n", + ci->devname, portnum); + else + printk (KERN_WARN + "%s: Warning: Port %d link was briefly down.\n", + ci->devname, portnum); + } else if (value & sbeLinkDown) + printk (KERN_WARN "%s: Warning: Port %d link is down.\n", + ci->devname, portnum); + else + { + printk (KERN_WARN "%s: Port %d link has recovered.\n", + ci->devname, portnum); + copyVal |= 0x20; /* record link transition to up */ + } + copyVal |= 0x10; /* change (link) --> update LEDs */ + } + copyVal &= 0x137; /* clear LED & link old history bits & + * save others */ + if (value & sbeLinkDown) + copyVal |= 0x08; /* record link status (now) */ + else + { /* if link is up, do this */ + copyVal |= 0x40; /* LED indicate link is up */ + /* Alarm things & the like ... first if E1, then if T1 */ + if (IS_FRAME_ANY_E1 (ci->port[portnum].p.port_mode)) + { + /* + * first check Codeword (SaX) changes & CRC and + * sub-multi-frame errors + */ + /* + * note these errors are printed every time they are detected + * vs. alarms + */ + value = pci_read_32 ((u_int32_t *) &comet->e1_frmr_nat_ists); /* codeword */ + if (value & 0x1f) + { /* if errors (crc or smf only) */ + if (value & 0x10) + printk (KERN_WARN + "%s: E1 Port %d Codeword Sa4 change detected.\n", + ci->devname, portnum); + if (value & 0x08) + printk (KERN_WARN + "%s: E1 Port %d Codeword Sa5 change detected.\n", + ci->devname, portnum); + if (value & 0x04) + printk (KERN_WARN + "%s: E1 Port %d Codeword Sa6 change detected.\n", + ci->devname, portnum); + if (value & 0x02) + printk (KERN_WARN + "%s: E1 Port %d Codeword Sa7 change detected.\n", + ci->devname, portnum); + if (value & 0x01) + printk (KERN_WARN + "%s: E1 Port %d Codeword Sa8 change detected.\n", + ci->devname, portnum); + } + value = pci_read_32 ((u_int32_t *) &comet->e1_frmr_mists); /* crc & smf */ + if (value & 0x3) + { /* if errors (crc or smf only) */ + if (value & sbeE1CRC) + printk (KERN_WARN "%s: E1 Port %d CRC-4 error(s) detected.\n", + ci->devname, portnum); + if (value & sbeE1errSMF) /* error in sub-multiframe */ + printk (KERN_WARN "%s: E1 Port %d received errored SMF.\n", + ci->devname, portnum); + } + value = pci_read_32 ((u_int32_t *) &comet->e1_frmr_masts) & 0xcc; /* alarms */ + /* + * pack alarms together (bitmiser), and construct similar to + * T1 + */ + /* RAI,RMAI,.,.,LOF,AIS,.,. ==> RMAI,.,.,.,.,.,RAI,LOF,AIS */ + /* see 0x97 */ + value = (value >> 2); + if (value & 0x30) + { + if (value & 0x20) + value |= 0x40; /* RAI */ + if (value & 0x10) + value |= 0x100; /* RMAI */ + value &= ~0x30; + } /* finished packing alarm in handy order */ + if (value != (copyVal & sbeE1AlarmsMask)) + { /* if alarms changed */ + copyVal |= 0x10;/* change LED status */ + if ((copyVal & sbeRedAlm) && !(value & sbeRedAlm)) + { + copyVal &= ~sbeRedAlm; + printk (KERN_WARN "%s: E1 Port %d LOF alarm ended.\n", + ci->devname, portnum); + } else if (!(copyVal & sbeRedAlm) && (value & sbeRedAlm)) + { + copyVal |= sbeRedAlm; + printk (KERN_WARN "%s: E1 Warning: Port %d LOF alarm.\n", + ci->devname, portnum); + } else if ((copyVal & sbeYelAlm) && !(value & sbeYelAlm)) + { + copyVal &= ~sbeYelAlm; + printk (KERN_WARN "%s: E1 Port %d RAI alarm ended.\n", + ci->devname, portnum); + } else if (!(copyVal & sbeYelAlm) && (value & sbeYelAlm)) + { + copyVal |= sbeYelAlm; + printk (KERN_WARN "%s: E1 Warning: Port %d RAI alarm.\n", + ci->devname, portnum); + } else if ((copyVal & sbeE1RMAI) && !(value & sbeE1RMAI)) + { + copyVal &= ~sbeE1RMAI; + printk (KERN_WARN "%s: E1 Port %d RMAI alarm ended.\n", + ci->devname, portnum); + } else if (!(copyVal & sbeE1RMAI) && (value & sbeE1RMAI)) + { + copyVal |= sbeE1RMAI; + printk (KERN_WARN "%s: E1 Warning: Port %d RMAI alarm.\n", + ci->devname, portnum); + } else if ((copyVal & sbeAISAlm) && !(value & sbeAISAlm)) + { + copyVal &= ~sbeAISAlm; + printk (KERN_WARN "%s: E1 Port %d AIS alarm ended.\n", + ci->devname, portnum); + } else if (!(copyVal & sbeAISAlm) && (value & sbeAISAlm)) + { + copyVal |= sbeAISAlm; + printk (KERN_WARN "%s: E1 Warning: Port %d AIS alarm.\n", + ci->devname, portnum); + } + } + /* end of E1 alarm code */ + } else + { /* if a T1 mode */ + value = pci_read_32 ((u_int32_t *) &comet->t1_almi_ists); /* alarms */ + value &= sbeAlarmsMask; + if (value != (copyVal & sbeAlarmsMask)) + { /* if alarms changed */ + copyVal |= 0x10;/* change LED status */ + if ((copyVal & sbeRedAlm) && !(value & sbeRedAlm)) + { + copyVal &= ~sbeRedAlm; + printk (KERN_WARN "%s: Port %d red alarm ended.\n", + ci->devname, portnum); + } else if (!(copyVal & sbeRedAlm) && (value & sbeRedAlm)) + { + copyVal |= sbeRedAlm; + printk (KERN_WARN "%s: Warning: Port %d red alarm.\n", + ci->devname, portnum); + } else if ((copyVal & sbeYelAlm) && !(value & sbeYelAlm)) + { + copyVal &= ~sbeYelAlm; + printk (KERN_WARN "%s: Port %d yellow (RAI) alarm ended.\n", + ci->devname, portnum); + } else if (!(copyVal & sbeYelAlm) && (value & sbeYelAlm)) + { + copyVal |= sbeYelAlm; + printk (KERN_WARN "%s: Warning: Port %d yellow (RAI) alarm.\n", + ci->devname, portnum); + } else if ((copyVal & sbeAISAlm) && !(value & sbeAISAlm)) + { + copyVal &= ~sbeAISAlm; + printk (KERN_WARN "%s: Port %d blue (AIS) alarm ended.\n", + ci->devname, portnum); + } else if (!(copyVal & sbeAISAlm) && (value & sbeAISAlm)) + { + copyVal |= sbeAISAlm; + printk (KERN_WARN "%s: Warning: Port %d blue (AIS) alarm.\n", + ci->devname, portnum); + } + } + } /* end T1 mode alarm checks */ + } + if (copyVal & sbeAlarmsMask) + copyVal |= 0x80; /* if alarm turn yel LED on */ + if (copyVal & 0x10) + LEDval |= 0x100; /* tag if LED values have changed */ + LEDval |= ((copyVal & 0xc0) >> (6 - (portnum * 2))); + + ci->alarmed[portnum] &= 0xfffff000; /* out with the old (it's fff + * ... foo) */ + ci->alarmed[portnum] |= (copyVal); /* in with the new */ + + /* + * enough with the alarms and LED's, now let's check for loopback + * requests + */ + + if (IS_FRAME_ANY_T1 (ci->port[portnum].p.port_mode)) + { /* if a T1 mode */ + /* + * begin in-band (SF) loopback code detection -- start by reading + * command + */ + value = pci_read_32 ((u_int32_t *) &comet->ibcd_ies); /* detect reg. */ + value &= 0x3; /* trim to handy bits */ + if (value & 0x2) + { /* activate loopback (sets for deactivate + * code length) */ + copyVal = c4_loop_port (ci, portnum, COMET_LBCMD_READ); /* read line loopback + * mode */ + if (copyVal != COMET_MDIAG_LINELB) /* don't do it again if + * already in that mode */ + c4_loop_port (ci, portnum, COMET_MDIAG_LINELB); /* put port in line + * loopback mode */ + } + if (value & 0x1) + { /* deactivate loopback (sets for activate + * code length) */ + copyVal = c4_loop_port (ci, portnum, COMET_LBCMD_READ); /* read line loopback + * mode */ + if (copyVal != COMET_MDIAG_LBOFF) /* don't do it again if + * already in that mode */ + c4_loop_port (ci, portnum, COMET_MDIAG_LBOFF); /* take port out of any + * loopback mode */ + } + } + if (IS_FRAME_ANY_T1ESF (ci->port[portnum].p.port_mode)) + { /* if a T1 ESF mode */ + /* begin ESF loopback code */ + value = pci_read_32 ((u_int32_t *) &comet->t1_rboc_sts) & 0x3f; /* read command */ + if (value == 0x07) + c4_loop_port (ci, portnum, COMET_MDIAG_LINELB); /* put port in line + * loopback mode */ + if (value == 0x0a) + c4_loop_port (ci, portnum, COMET_MDIAG_PAYLB); /* put port in payload + * loopbk mode */ + if ((value == 0x1c) || (value == 0x19) || (value == 0x12)) + c4_loop_port (ci, portnum, COMET_MDIAG_LBOFF); /* take port out of any + * loopbk mode */ + if (log_level >= LOG_DEBUG) + if (value != 0x3f) + printk (KERN_WARN "%s: BOC value = %x on Port %d\n", + ci->devname, value, portnum); + /* end ESF loopback code */ + } + } + + /* if something is new, update LED's */ + if (LEDval & 0x100) + pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, LEDval & 0xff); +#endif /*** CONFIG_SBE_PMCC4_NCOMM ***/ +} + + +STATIC void +c4_watchdog (ci_t * ci) +{ +#if 0 + //unsigned long flags; +#endif + + if (drvr_state != SBE_DRVR_AVAILABLE) + { + if (log_level >= LOG_MONITOR) + printk ("%s: drvr not available (%x)\n", THIS_MODULE->name, drvr_state); + return; + } +#if 0 + SD_SEM_TAKE (&ci->sem_wdbusy, "_wd_"); /* only 1 thru here, per + * board */ +#endif + + ci->wdcount++; + checkPorts (ci); +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,41) + if (ci->wd_notify) + { /* is there a state change to search for */ + int port, gchan; + + ci->wd_notify = 0; /* reset notification */ + for (gchan = 0; gchan < MUSYCC_NCHANS; gchan++) + { + for (port = 0; port < ci->max_port; port++) + { + mch_t *ch = ci->port[port].chan[gchan]; + + if (!ch || ci->state != C_RUNNING) /* state changed while + * acquiring semaphore */ + break; + if (ch->state == UP)/* channel must be set up */ + { +#if 0 +#ifdef RLD_TRANS_DEBUG + if (1 || log_level >= LOG_MONITOR) +#else + if (log_level >= LOG_MONITOR) +#endif + printk ("%s: watchdog reviving Port %d Channel %d [%d] sts %x/%x, start_TX %x free %x start_RX %x\n", + ci->devname, ch->channum, port, gchan, ch->channum, + ch->p.status, ch->status, + ch->ch_start_tx, ch->txd_free, ch->ch_start_rx); +#endif + + /**********************************/ + /** check for RX restart request **/ + /**********************************/ + + if (ch->ch_start_rx && + (ch->status & RX_ENABLED)) /* requires start on + * enabled RX */ + { + ch->ch_start_rx = 0; /* we are restarting RX... */ +#ifdef RLD_TRANS_DEBUG + printk ("++ c4_watchdog() CHAN RX ACTIVATE: chan %d\n", ch->channum); +#endif +#ifdef RLD_RXACT_DEBUG + { + struct mdesc *md; + static int hereb4 = 7; + + if (hereb4) + { + hereb4--; + md = &ch->mdr[ch->rxix_irq_srv]; + printk ("++ c4_watchdog[%d] CHAN RX ACTIVATE: rxix_irq_srv %d, md %p sts %x, rxpkt %lu\n", + ch->channum, ch->rxix_irq_srv, md, le32_to_cpu (md->status), ch->s.rx_packets); + musycc_dump_rxbuffer_ring (ch, 1); /* RLD DEBUG */ + } + } +#endif + musycc_serv_req (ch->up, SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION | gchan); + } + /**********************************/ + /** check for TX restart request **/ + /**********************************/ + + if (ch->ch_start_tx && + (ch->status & TX_ENABLED)) /* requires start on + * enabled TX */ + { + struct mdesc *md; + + /* + * find next unprocessed message, then set TX thp to + * it + */ + musycc_update_tx_thp (ch); + +#if 0 + spin_lock_irqsave (&ch->ch_txlock, flags); +#endif + md = ch->txd_irq_srv; + if (!md) + { + printk ("-- c4_watchdog[%d]: WARNING, starting NULL md\n", ch->channum); + printk ("-- chan %d txd_irq_srv %p sts %x usr_add %p sts %x, txpkt %lu\n", + ch->channum, ch->txd_irq_srv, le32_to_cpu ((struct mdesc *) (ch->txd_irq_srv)->status), + ch->txd_usr_add, le32_to_cpu ((struct mdesc *) (ch->txd_usr_add)->status), + ch->s.tx_packets); +#if 0 + spin_unlock_irqrestore (&ch->ch_txlock, flags); +#endif + } else if (md->data && ((le32_to_cpu (md->status)) & MUSYCC_TX_OWNED)) + { +#ifdef RLD_TRANS_DEBUG + printk ("++ c4_watchdog[%d] CHAN TX ACTIVATE: start_tx %x\n", ch->channum, ch->ch_start_tx); +#endif + ch->ch_start_tx = 0; /* we are restarting + * TX... */ +#if 0 + spin_unlock_irqrestore (&ch->ch_txlock, flags); /* allow interrupts for + * service request */ +#endif + musycc_serv_req (ch->up, SR_CHANNEL_ACTIVATE | SR_TX_DIRECTION | gchan); +#ifdef RLD_TRANS_DEBUG + if (1 || log_level >= LOG_MONITOR) +#else + if (log_level >= LOG_MONITOR) +#endif + printk ("++ SACK[P%d/C%d] ack'd, continuing...\n", ch->up->portnum, ch->channum); + } + } + } + } + } + } +#else + ci->wd_notify = 0; +#endif +#if 0 + SD_SEM_GIVE (&ci->sem_wdbusy);/* release per-board hold */ +#endif +} + + +void +c4_cleanup (void) +{ + ci_t *ci, *next; + mpi_t *pi; + int portnum, j; + + ci = c4_list; + while (ci) + { + next = ci->next; /* protect <next> from upcoming <free> */ + pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, PMCC4_CPLD_LED_OFF); + for (portnum = 0; portnum < ci->max_port; portnum++) + { + pi = &ci->port[portnum]; +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41) + c4_wq_port_cleanup (pi); +#endif + for (j = 0; j < MUSYCC_NCHANS; j++) + { + if (pi->chan[j]) + OS_kfree (pi->chan[j]); /* free mch_t struct */ + } + OS_kfree (pi->regram_saved); + } +#if 0 + /* obsolete - watchdog is now static w/in ci_t */ + OS_free_watchdog (ci->wd); +#endif + OS_kfree (ci->iqd_p_saved); + OS_kfree (ci); + ci = next; /* cleanup next board, if any */ + } +} + + +/* + * This function issues a write to all comet chips and expects the same data + * to be returned from the subsequent read. This determines the board build + * to be a 1-port, 2-port, or 4-port build. The value returned represents a + * bit-mask of the found ports. Only certain configurations are considered + * VALID or LEGAL builds. + */ + +int +c4_get_portcfg (ci_t * ci) +{ + comet_t *comet; + int portnum, mask; + u_int32_t wdata, rdata; + + wdata = COMET_MDIAG_LBOFF; /* take port out of any loopback mode */ + + mask = 0; + for (portnum = 0; portnum < MUSYCC_NPORTS; portnum++) + { + comet = ci->port[portnum].cometbase; + pci_write_32 ((u_int32_t *) &comet->mdiag, wdata); + rdata = pci_read_32 ((u_int32_t *) &comet->mdiag) & COMET_MDIAG_LBMASK; + if (wdata == rdata) + mask |= 1 << portnum; + } + return mask; +} + + +/* nothing herein should generate interrupts */ + +status_t __init +c4_init (ci_t * ci, u_char *func0, u_char *func1) +{ + mpi_t *pi; + mch_t *ch; + static u_int32_t count = 0; + int portnum, j; + + ci->state = C_INIT; + ci->brdno = count++; + ci->intlog.this_status_new = 0; + atomic_set (&ci->bh_pending, 0); + + ci->reg = (struct musycc_globalr *) func0; + ci->eeprombase = (u_int32_t *) (func1 + EEPROM_OFFSET); + ci->cpldbase = (c4cpld_t *) ((u_int32_t *) (func1 + ISPLD_OFFSET)); + + /*** PORT POINT - the following is the first access of any type to the hardware ***/ +#ifdef CONFIG_SBE_PMCC4_NCOMM + /* NCOMM driver uses INTB interrupt to monitor CPLD register */ + pci_write_32 ((u_int32_t *) &ci->reg->glcd, GCD_MAGIC); +#else + /* standard driver POLLS for INTB via CPLD register */ + pci_write_32 ((u_int32_t *) &ci->reg->glcd, GCD_MAGIC | MUSYCC_GCD_INTB_DISABLE); +#endif + + { + int pmsk; + + /* need comet addresses available for determination of hardware build */ + for (portnum = 0; portnum < MUSYCC_NPORTS; portnum++) + { + pi = &ci->port[portnum]; + pi->cometbase = (comet_t *) ((u_int32_t *) (func1 + COMET_OFFSET (portnum))); + pi->reg = (struct musycc_globalr *) ((u_char *) ci->reg + (portnum * 0x800)); + pi->portnum = portnum; + pi->p.portnum = portnum; + pi->openchans = 0; +#ifdef SBE_MAP_DEBUG + printk ("Comet-%d: addr = %p\n", portnum, pi->cometbase); +#endif + } + pmsk = c4_get_portcfg (ci); + switch (pmsk) + { + case 0x1: + ci->max_port = 1; + break; + case 0x3: + ci->max_port = 2; + break; +#if 0 + case 0x7: /* not built, but could be... */ + ci->max_port = 3; + break; +#endif + case 0xf: + ci->max_port = 4; + break; + default: + ci->max_port = 0; + printk (KERN_WARNING "%s: illegal port configuration (%x)\n", ci->devname, pmsk); + return SBE_DRVR_FAIL; + } +#ifdef SBE_MAP_DEBUG + printk (">> %s: c4_get_build - pmsk %x max_port %x\n", ci->devname, pmsk, ci->max_port); +#endif + } + + for (portnum = 0; portnum < ci->max_port; portnum++) + { + pi = &ci->port[portnum]; + pi->up = ci; + pi->sr_last = 0xffffffff; + pi->p.port_mode = CFG_FRAME_SF; /* T1 B8ZS, the default */ + pi->p.portP = (CFG_CLK_PORT_EXTERNAL | CFG_LBO_LH0); /* T1 defaults */ + + OS_sem_init (&pi->sr_sem_busy, SEM_AVAILABLE); + OS_sem_init (&pi->sr_sem_wait, SEM_TAKEN); + + for (j = 0; j < 32; j++) + { + pi->fifomap[j] = -1; + pi->tsm[j] = 0; /* no assignments, all available */ + } + + /* allocate channel structures for this port */ + for (j = 0; j < MUSYCC_NCHANS; j++) + { + ch = OS_kmalloc (sizeof (mch_t)); + if (ch) + { + pi->chan[j] = ch; + ch->state = UNASSIGNED; + ch->up = pi; + ch->gchan = (-1); /* channel assignment not yet known */ + ch->channum = (-1); /* channel assignment not yet known */ + ch->p.card = ci->brdno; + ch->p.port = portnum; + ch->p.channum = (-1); /* channel assignment not yet known */ + ch->p.mode_56k = 0; /* default is 64kbps mode */ + } else + { + printk (KERN_WARNING "%s: failed mch_t malloc, port %d channel %d size %u.\n", + THIS_MODULE->name, portnum, j, (unsigned int) sizeof (mch_t)); + break; + } + } + } + + + { + /* + * Set LEDs through their paces to supply visual proof that LEDs are + * functional and not burnt out nor broken. + * + * YELLOW + GREEN -> OFF. + */ + + pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, + PMCC4_CPLD_LED_GREEN | PMCC4_CPLD_LED_YELLOW); + OS_uwait (750000, "leds"); + pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, PMCC4_CPLD_LED_OFF); + } + + OS_init_watchdog (&ci->wd, (void (*) (void *)) c4_watchdog, ci, WATCHDOG_TIMEOUT); + return SBE_DRVR_SUCCESS; +} + + +/* better be fully setup to handle interrupts when you call this */ + +status_t __init +c4_init2 (ci_t * ci) +{ + status_t ret; + + /* PORT POINT: this routine generates first interrupt */ + if ((ret = musycc_init (ci)) != SBE_DRVR_SUCCESS) + return ret; + +#if 0 + ci->p.framing_type = FRAMING_CBP; + ci->p.h110enable = 1; +#if 0 + ci->p.hypersize = 0; +#else + hyperdummy = 0; +#endif + ci->p.clock = 0; /* Use internal clocking until set to + * external */ + c4_card_set_params (ci, &ci->p); +#endif + OS_start_watchdog (&ci->wd); + return SBE_DRVR_SUCCESS; +} + + +/* This function sets the loopback mode (or clears it, as the case may be). */ + +int +c4_loop_port (ci_t * ci, int portnum, u_int8_t cmd) +{ + comet_t *comet; + volatile u_int32_t loopValue; + + comet = ci->port[portnum].cometbase; + loopValue = pci_read_32 ((u_int32_t *) &comet->mdiag) & COMET_MDIAG_LBMASK; + + if (cmd & COMET_LBCMD_READ) + return loopValue; /* return the read value */ + + if (loopValue != cmd) + { + switch (cmd) + { + case COMET_MDIAG_LINELB: + /* set(SF)loopback down (turn off) code length to 6 bits */ + pci_write_32 ((u_int32_t *) &comet->ibcd_cfg, 0x05); + break; + case COMET_MDIAG_LBOFF: + /* set (SF) loopback up (turn on) code length to 5 bits */ + pci_write_32 ((u_int32_t *) &comet->ibcd_cfg, 0x00); + break; + } + + pci_write_32 ((u_int32_t *) &comet->mdiag, cmd); + if (log_level >= LOG_WARN) + printk ("%s: loopback mode changed to %2x from %2x on Port %d\n", + ci->devname, cmd, loopValue, portnum); + loopValue = pci_read_32 ((u_int32_t *) &comet->mdiag) & COMET_MDIAG_LBMASK; + if (loopValue != cmd) + { + if (log_level >= LOG_ERROR) + printk ("%s: write to loop register failed, unknown state for Port %d\n", + ci->devname, portnum); + } + } else + { + if (log_level >= LOG_WARN) + printk ("%s: loopback already in that mode (%2x)\n", ci->devname, loopValue); + } + return 0; +} + + +/* c4_frame_rw: read or write the comet register specified + * (modifies use of port_param to non-standard use of struct) + * Specifically: + * pp.portnum (one guess) + * pp.port_mode offset of register + * pp.portP write (or not, i.e. read) + * pp.portStatus write value + * BTW: + * pp.portStatus also used to return read value + * pp.portP also used during write, to return old reg value + */ + +status_t +c4_frame_rw (ci_t * ci, struct sbecom_port_param * pp) +{ + comet_t *comet; + volatile u_int32_t data; + + if (pp->portnum >= ci->max_port)/* sanity check */ + return ENXIO; + + comet = ci->port[pp->portnum].cometbase; + data = pci_read_32 ((u_int32_t *) comet + pp->port_mode) & 0xff; + + if (pp->portP) + { /* control says this is a register + * _write_ */ + if (pp->portStatus == data) + printk ("%s: Port %d already that value! Writing again anyhow.\n", + ci->devname, pp->portnum); + pp->portP = (u_int8_t) data; + pci_write_32 ((u_int32_t *) comet + pp->port_mode, + pp->portStatus); + data = pci_read_32 ((u_int32_t *) comet + pp->port_mode) & 0xff; + } + pp->portStatus = (u_int8_t) data; + return 0; +} + + +/* c4_pld_rw: read or write the pld register specified + * (modifies use of port_param to non-standard use of struct) + * Specifically: + * pp.port_mode offset of register + * pp.portP write (or not, i.e. read) + * pp.portStatus write value + * BTW: + * pp.portStatus also used to return read value + * pp.portP also used during write, to return old reg value + */ + +status_t +c4_pld_rw (ci_t * ci, struct sbecom_port_param * pp) +{ + volatile u_int32_t *regaddr; + volatile u_int32_t data; + int regnum = pp->port_mode; + + regaddr = (u_int32_t *) ci->cpldbase + regnum; + data = pci_read_32 ((u_int32_t *) regaddr) & 0xff; + + if (pp->portP) + { /* control says this is a register + * _write_ */ + pp->portP = (u_int8_t) data; + pci_write_32 ((u_int32_t *) regaddr, pp->portStatus); + data = pci_read_32 ((u_int32_t *) regaddr) & 0xff; + } + pp->portStatus = (u_int8_t) data; + return 0; +} + +/* c4_musycc_rw: read or write the musycc register specified + * (modifies use of port_param to non-standard use of struct) + * Specifically: + * mcp.RWportnum port number and write indication bit (0x80) + * mcp.offset offset of register + * mcp.value write value going in and read value returning + */ + +/* PORT POINT: TX Subchannel Map registers are write-only + * areas within the MUSYCC and always return FF */ +/* PORT POINT: regram and reg structures are minorly different and <offset> ioctl + * settings are aligned with the <reg> struct musycc_globalr{} usage. + * Also, regram is separately allocated shared memory, allocated for each port. + * PORT POINT: access offsets of 0x6000 for Msg Cfg Desc Tbl are for 4-port MUSYCC + * only. (An 8-port MUSYCC has 0x16000 offsets for accessing its upper 4 tables.) + */ + +status_t +c4_musycc_rw (ci_t * ci, struct c4_musycc_param * mcp) +{ + mpi_t *pi; + volatile u_int32_t *dph; /* hardware implemented register */ + u_int32_t *dpr = 0; /* RAM image of registers for group command + * usage */ + int offset = mcp->offset % 0x800; /* group relative address + * offset, mcp->portnum is + * not used */ + int portnum, ramread = 0; + volatile u_int32_t data; + + /* + * Sanity check hardware accessibility. The 0x6000 portion handles port + * numbers associated with Msg Descr Tbl decoding. + */ + portnum = (mcp->offset % 0x6000) / 0x800; + if (portnum >= ci->max_port) + return ENXIO; + pi = &ci->port[portnum]; + if (mcp->offset >= 0x6000) + offset += 0x6000; /* put back in MsgCfgDesc address offset */ + dph = (u_int32_t *) ((u_long) pi->reg + offset); + + /* read of TX are from RAM image, since hardware returns FF */ + dpr = (u_int32_t *) ((u_long) pi->regram + offset); + if (mcp->offset < 0x6000) /* non MsgDesc Tbl accesses might require + * RAM access */ + { + if (offset >= 0x200 && offset < 0x380) + ramread = 1; + if (offset >= 0x10 && offset < 0x200) + ramread = 1; + } + /* read register from RAM or hardware, depending... */ + if (ramread) + { + data = *dpr; + //printk ("c4_musycc_rw: RAM addr %p read data %x (portno %x offset %x RAM ramread %x)\n", dpr, data, portnum, offset, ramread); /* RLD DEBUG */ + } else + { + data = pci_read_32 ((u_int32_t *) dph); + //printk ("c4_musycc_rw: REG addr %p read data %x (portno %x offset %x RAM ramread %x)\n", dph, data, portnum, offset, ramread); /* RLD DEBUG */ + } + + + if (mcp->RWportnum & 0x80) + { /* control says this is a register + * _write_ */ + if (mcp->value == data) + printk ("%s: musycc grp%d already that value! writing again anyhow.\n", + ci->devname, (mcp->RWportnum & 0x7)); + /* write register RAM */ + if (ramread) + *dpr = mcp->value; + /* write hardware register */ + pci_write_32 ((u_int32_t *) dph, mcp->value); + } + mcp->value = data; /* return the read value (or the 'old + * value', if is write) */ + return 0; +} + +status_t +c4_get_port (ci_t * ci, int portnum) +{ + if (portnum >= ci->max_port) /* sanity check */ + return ENXIO; + + SD_SEM_TAKE (&ci->sem_wdbusy, "_wd_"); /* only 1 thru here, per + * board */ + checkPorts (ci); + ci->port[portnum].p.portStatus = (u_int8_t) ci->alarmed[portnum]; + ci->alarmed[portnum] &= 0xdf; + SD_SEM_GIVE (&ci->sem_wdbusy); /* release per-board hold */ + return 0; +} + +status_t +c4_set_port (ci_t * ci, int portnum) +{ + mpi_t *pi; + struct sbecom_port_param *pp; + int e1mode; + u_int8_t clck; + int i; + + if (portnum >= ci->max_port) /* sanity check */ + return ENXIO; + + pi = &ci->port[portnum]; + pp = &ci->port[portnum].p; + e1mode = IS_FRAME_ANY_E1 (pp->port_mode); + if (log_level >= LOG_MONITOR2) + { + printk ("%s: c4_set_port[%d]: entered, e1mode = %x, openchans %d.\n", + ci->devname, + portnum, e1mode, pi->openchans); + } + if (pi->openchans) + return EBUSY; /* group needs initialization only for + * first channel of a group */ + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41) + { + status_t ret; + + if ((ret = c4_wq_port_init (pi))) /* create/init + * workqueue_struct */ + return (ret); + } +#endif + + init_comet (ci, pi->cometbase, pp->port_mode, 1 /* clockmaster == true */ , pp->portP); + clck = pci_read_32 ((u_int32_t *) &ci->cpldbase->mclk) & PMCC4_CPLD_MCLK_MASK; + if (e1mode) + clck |= 1 << portnum; + else + clck &= 0xf ^ (1 << portnum); + + pci_write_32 ((u_int32_t *) &ci->cpldbase->mclk, clck); + pci_write_32 ((u_int32_t *) &ci->cpldbase->mcsr, PMCC4_CPLD_MCSR_IND); + pci_write_32 ((u_int32_t *) &pi->reg->gbp, OS_vtophys (pi->regram)); + + /*********************************************************************/ + /* ERRATA: If transparent mode is used, do not set OOFMP_DISABLE bit */ + /*********************************************************************/ + + pi->regram->grcd = + __constant_cpu_to_le32 (MUSYCC_GRCD_RX_ENABLE | + MUSYCC_GRCD_TX_ENABLE | + MUSYCC_GRCD_OOFMP_DISABLE | + MUSYCC_GRCD_SF_ALIGN | /* per MUSYCC ERRATA, + * for T1 * fix */ + MUSYCC_GRCD_COFAIRQ_DISABLE | + MUSYCC_GRCD_MC_ENABLE | + (MUSYCC_GRCD_POLLTH_32 << MUSYCC_GRCD_POLLTH_SHIFT)); + + pi->regram->pcd = + __constant_cpu_to_le32 ((e1mode ? 1 : 0) | + MUSYCC_PCD_TXSYNC_RISING | + MUSYCC_PCD_RXSYNC_RISING | + MUSYCC_PCD_RXDATA_RISING); + + /* Message length descriptor */ + pi->regram->mld = __constant_cpu_to_le32 (max_mru | (max_mru << 16)); + + /* tsm algorithm */ + for (i = 0; i < 32; i++) + { + + /*** ASSIGNMENT NOTES: ***/ + /*** Group's channel ZERO unavailable if E1. ***/ + /*** Group's channel 16 unavailable if E1 CAS. ***/ + /*** Group's channels 24-31 unavailable if T1. ***/ + + if (((i == 0) && e1mode) || + ((i == 16) && ((pp->port_mode == CFG_FRAME_E1CRC_CAS) || (pp->port_mode == CFG_FRAME_E1CRC_CAS_AMI))) + || ((i > 23) && (!e1mode))) + { + pi->tsm[i] = 0xff; /* make tslot unavailable for this mode */ + } else + { + pi->tsm[i] = 0x00; /* make tslot available for assignment */ + } + } + for (i = 0; i < MUSYCC_NCHANS; i++) + { + pi->regram->ttsm[i] = 0; + pi->regram->rtsm[i] = 0; + } + FLUSH_MEM_WRITE (); + musycc_serv_req (pi, SR_GROUP_INIT | SR_RX_DIRECTION); + musycc_serv_req (pi, SR_GROUP_INIT | SR_TX_DIRECTION); + + musycc_init_mdt (pi); + + pi->group_is_set = 1; + pi->p = *pp; + return 0; +} + + +unsigned int max_int = 0; + +status_t +c4_new_chan (ci_t * ci, int portnum, int channum, void *user) +{ + mpi_t *pi; + mch_t *ch; + int gchan; + + if (c4_find_chan (channum)) /* a new channel shouldn't already exist */ + return EEXIST; + + if (portnum >= ci->max_port) /* sanity check */ + return ENXIO; + + pi = &(ci->port[portnum]); + /* find any available channel within this port */ + for (gchan = 0; gchan < MUSYCC_NCHANS; gchan++) + { + ch = pi->chan[gchan]; + if (ch && ch->state == UNASSIGNED) /* no assignment is good! */ + break; + } + if (gchan == MUSYCC_NCHANS) /* exhausted table, all were assigned */ + return ENFILE; + + ch->up = pi; + + /* NOTE: mch_t already cleared during OS_kmalloc() */ + ch->state = DOWN; + ch->user = user; + ch->gchan = gchan; + ch->channum = channum; /* mark our channel assignment */ + ch->p.channum = channum; +#if 1 + ch->p.card = ci->brdno; + ch->p.port = portnum; +#endif + ch->p.chan_mode = CFG_CH_PROTO_HDLC_FCS16; + ch->p.idlecode = CFG_CH_FLAG_7E; + ch->p.pad_fill_count = 2; + spin_lock_init (&ch->ch_rxlock); + spin_lock_init (&ch->ch_txlock); + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41) + { + status_t ret; + + if ((ret = c4_wk_chan_init (pi, ch))) + return ret; + } +#endif + + /* save off interface assignments which bound a board */ + if (ci->first_if == 0) /* first channel registered is assumed to + * be the lowest channel */ + { + ci->first_if = ci->last_if = user; + ci->first_channum = ci->last_channum = channum; + } else + { + ci->last_if = user; + if (ci->last_channum < channum) /* higher number channel found */ + ci->last_channum = channum; + } + return 0; +} + +status_t +c4_del_chan (int channum) +{ + mch_t *ch; + + if (!(ch = c4_find_chan (channum))) + return ENOENT; + if (ch->state == UP) + musycc_chan_down ((ci_t *) 0, channum); + ch->state = UNASSIGNED; + ch->gchan = (-1); + ch->channum = (-1); + ch->p.channum = (-1); + return 0; +} + +status_t +c4_del_chan_stats (int channum) +{ + mch_t *ch; + + if (!(ch = c4_find_chan (channum))) + return ENOENT; + + memset (&ch->s, 0, sizeof (struct sbecom_chan_stats)); + return 0; +} + + +status_t +c4_set_chan (int channum, struct sbecom_chan_param * p) +{ + mch_t *ch; + int i, x = 0; + + if (!(ch = c4_find_chan (channum))) + return ENOENT; + +#if 1 + if (ch->p.card != p->card || + ch->p.port != p->port || + ch->p.channum != p->channum) + return EINVAL; +#endif + + if (!(ch->up->group_is_set)) + { + return EIO; /* out of order, SET_PORT command + * required prior to first group's + * SET_CHAN command */ + } + /* + * Check for change of parameter settings in order to invoke closing of + * channel prior to hardware poking. + */ + + if (ch->p.status != p->status || ch->p.chan_mode != p->chan_mode || + ch->p.data_inv != p->data_inv || ch->p.intr_mask != p->intr_mask || + ch->txd_free < ch->txd_num) /* to clear out queued messages */ + x = 1; /* we have a change requested */ + for (i = 0; i < 32; i++) /* check for timeslot mapping changes */ + if (ch->p.bitmask[i] != p->bitmask[i]) + x = 1; /* we have a change requested */ + ch->p = *p; + if (x && (ch->state == UP)) /* if change request and channel is + * open... */ + { + status_t ret; + + if ((ret = musycc_chan_down ((ci_t *) 0, channum))) + return ret; + if ((ret = c4_chan_up (ch->up->up, channum))) + return ret; + sd_enable_xmit (ch->user); /* re-enable to catch flow controlled + * channel */ + } + return 0; +} + + +status_t +c4_get_chan (int channum, struct sbecom_chan_param * p) +{ + mch_t *ch; + + if (!(ch = c4_find_chan (channum))) + return ENOENT; + *p = ch->p; + return 0; +} + +status_t +c4_get_chan_stats (int channum, struct sbecom_chan_stats * p) +{ + mch_t *ch; + + if (!(ch = c4_find_chan (channum))) + return ENOENT; + *p = ch->s; + p->tx_pending = atomic_read (&ch->tx_pending); + return 0; +} + +STATIC int +c4_fifo_alloc (mpi_t * pi, int chan, int *len) +{ + int i, l = 0, start = 0, max = 0, maxstart = 0; + + for (i = 0; i < 32; i++) + { + if (pi->fifomap[i] != -1) + { + l = 0; + start = i + 1; + continue; + } + ++l; + if (l > max) + { + max = l; + maxstart = start; + } + if (max == *len) + break; + } + if (max != *len) + { + if (log_level >= LOG_WARN) + printk ( + "%s: wanted to allocate %d fifo space, but got only %d\n", + pi->up->devname, *len, max); + *len = max; + } + if (log_level >= LOG_DEBUG) + printk ("%s: allocated %d fifo at %d for channel %d/%d\n", + pi->up->devname, max, start, chan, pi->p.portnum); + for (i = maxstart; i < (maxstart + max); i++) + pi->fifomap[i] = chan; + return start; +} + +void +c4_fifo_free (mpi_t * pi, int chan) +{ + int i; + + if (log_level >= LOG_DEBUG) + printk ("%s: deallocated fifo for channel %d/%d\n", + pi->up->devname, chan, pi->p.portnum); + for (i = 0; i < 32; i++) + if (pi->fifomap[i] == chan) + pi->fifomap[i] = -1; +} + + +status_t +c4_chan_up (ci_t * ci, int channum) +{ + mpi_t *pi; + mch_t *ch; + struct mbuf *m; + struct mdesc *md; + int nts, nbuf, txnum, rxnum; + int addr, i, j, gchan; + u_int32_t tmp; /* for optimizing conversion across BE + * platform */ + + if (!(ch = c4_find_chan (channum))) + return ENOENT; + if (ch->state == UP) + { + if (log_level >= LOG_MONITOR) + printk ("%s: channel already UP, graceful early exit\n", ci->devname); + return 0; + } + pi = ch->up; + gchan = ch->gchan; + /* find nts ('number of timeslots') */ + nts = 0; + for (i = 0; i < 32; i++) + { + if (ch->p.bitmask[i] & pi->tsm[i]) + { + if (1 || log_level >= LOG_WARN) + { + printk ("%s: c4_chan_up[%d] EINVAL (attempt to cfg in-use or unavailable TimeSlot[%d])\n", + ci->devname, channum, i); + printk ("+ ask4 %x, currently %x\n", ch->p.bitmask[i], pi->tsm[i]); + } + return EINVAL; + } + for (j = 0; j < 8; j++) + if (ch->p.bitmask[i] & (1 << j)) + nts++; + } + + nbuf = nts / 8 ? nts / 8 : 1; + if (!nbuf) + { + /* if( log_level >= LOG_WARN) */ + printk ("%s: c4_chan_up[%d] ENOBUFS (no TimeSlots assigned)\n", ci->devname, channum); + return ENOBUFS; /* this should not happen */ + } + addr = c4_fifo_alloc (pi, gchan, &nbuf); + ch->state = UP; + + /* Setup the Time Slot Map */ + musycc_update_timeslots (pi); + + /* ch->tx_limit = nts; */ + ch->s.tx_pending = 0; + + /* Set Channel Configuration Descriptors */ + { + u_int32_t ccd; + + ccd = musycc_chan_proto (ch->p.chan_mode) << MUSYCC_CCD_PROTO_SHIFT; + if ((ch->p.chan_mode == CFG_CH_PROTO_ISLP_MODE) || + (ch->p.chan_mode == CFG_CH_PROTO_TRANS)) + { + ccd |= MUSYCC_CCD_FCS_XFER; /* Non FSC Mode */ + } + ccd |= 2 << MUSYCC_CCD_MAX_LENGTH; /* Select second MTU */ + ccd |= ch->p.intr_mask; + ccd |= addr << MUSYCC_CCD_BUFFER_LOC; + if (ch->p.chan_mode == CFG_CH_PROTO_TRANS) + ccd |= (nbuf) << MUSYCC_CCD_BUFFER_LENGTH; + else + ccd |= (nbuf - 1) << MUSYCC_CCD_BUFFER_LENGTH; + + if (ch->p.data_inv & CFG_CH_DINV_TX) + ccd |= MUSYCC_CCD_INVERT_DATA; /* Invert data */ + pi->regram->tcct[gchan] = cpu_to_le32 (ccd); + + if (ch->p.data_inv & CFG_CH_DINV_RX) + ccd |= MUSYCC_CCD_INVERT_DATA; /* Invert data */ + else + ccd &= ~MUSYCC_CCD_INVERT_DATA; /* take away data inversion */ + pi->regram->rcct[gchan] = cpu_to_le32 (ccd); + FLUSH_MEM_WRITE (); + } + + /* Reread the Channel Configuration Descriptor for this channel */ + musycc_serv_req (pi, SR_CHANNEL_CONFIG | SR_RX_DIRECTION | gchan); + musycc_serv_req (pi, SR_CHANNEL_CONFIG | SR_TX_DIRECTION | gchan); + + /* + * Figure out how many buffers we want. If the customer has changed from + * the defaults, then use the changed values. Otherwise, use Transparent + * mode's specific minimum default settings. + */ + if (ch->p.chan_mode == CFG_CH_PROTO_TRANS) + { + if (max_rxdesc_used == max_rxdesc_default) /* use default setting */ + max_rxdesc_used = MUSYCC_RXDESC_TRANS; + if (max_txdesc_used == max_txdesc_default) /* use default setting */ + max_txdesc_used = MUSYCC_TXDESC_TRANS; + } + /* + * Increase counts when hyperchanneling, since this implies an increase + * in throughput per channel + */ + rxnum = max_rxdesc_used + (nts / 4); + txnum = max_txdesc_used + (nts / 4); + +#if 0 + /* DEBUG INFO */ + if (log_level >= LOG_MONITOR) + printk ("%s: mode %x rxnum %d (rxused %d def %d) txnum %d (txused %d def %d)\n", + ci->devname, ch->p.chan_mode, + rxnum, max_rxdesc_used, max_rxdesc_default, + txnum, max_txdesc_used, max_txdesc_default); +#endif + + ch->rxd_num = rxnum; + ch->txd_num = txnum; + ch->rxix_irq_srv = 0; + + ch->mdr = OS_kmalloc (sizeof (struct mdesc) * rxnum); + ch->mdt = OS_kmalloc (sizeof (struct mdesc) * txnum); + if (ch->p.chan_mode == CFG_CH_PROTO_TRANS) + tmp = __constant_cpu_to_le32 (max_mru | EOBIRQ_ENABLE); + else + tmp = __constant_cpu_to_le32 (max_mru); + + for (i = 0, md = ch->mdr; i < rxnum; i++, md++) + { + if (i == (rxnum - 1)) + { + md->snext = &ch->mdr[0];/* wrapness */ + } else + { + md->snext = &ch->mdr[i + 1]; + } + md->next = cpu_to_le32 (OS_vtophys (md->snext)); + + if (!(m = OS_mem_token_alloc (max_mru))) + { + if (log_level >= LOG_MONITOR) + printk ("%s: c4_chan_up[%d] - token alloc failure, size = %d.\n", ci->devname, channum, max_mru); + goto errfree; + } + md->mem_token = m; + md->data = cpu_to_le32 (OS_vtophys (OS_mem_token_data (m))); + md->status = tmp | MUSYCC_RX_OWNED; /* MUSYCC owns RX descriptor ** + * CODING NOTE: + * MUSYCC_RX_OWNED = 0 so no + * need to byteSwap */ + } + + for (i = 0, md = ch->mdt; i < txnum; i++, md++) + { + md->status = HOST_TX_OWNED; /* Host owns TX descriptor ** CODING + * NOTE: HOST_TX_OWNED = 0 so no need to + * byteSwap */ + md->mem_token = 0; + md->data = 0; + if (i == (txnum - 1)) + { + md->snext = &ch->mdt[0];/* wrapness */ + } else + { + md->snext = &ch->mdt[i + 1]; + } + md->next = cpu_to_le32 (OS_vtophys (md->snext)); + } + ch->txd_irq_srv = ch->txd_usr_add = &ch->mdt[0]; + ch->txd_free = txnum; + ch->tx_full = 0; + ch->txd_required = 0; + + /* Configure it into the chip */ + tmp = cpu_to_le32 (OS_vtophys (&ch->mdt[0])); + pi->regram->thp[gchan] = tmp; + pi->regram->tmp[gchan] = tmp; + + tmp = cpu_to_le32 (OS_vtophys (&ch->mdr[0])); + pi->regram->rhp[gchan] = tmp; + pi->regram->rmp[gchan] = tmp; + + /* Activate the Channel */ + FLUSH_MEM_WRITE (); + if (ch->p.status & RX_ENABLED) + { +#ifdef RLD_TRANS_DEBUG + printk ("++ c4_chan_up() CHAN RX ACTIVATE: chan %d\n", ch->channum); +#endif + ch->ch_start_rx = 0; /* we are restarting RX... */ + musycc_serv_req (pi, SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION | gchan); + } + if (ch->p.status & TX_ENABLED) + { +#ifdef RLD_TRANS_DEBUG + printk ("++ c4_chan_up() CHAN TX ACTIVATE: chan %d <delayed>\n", ch->channum); +#endif + ch->ch_start_tx = CH_START_TX_1ST; /* we are delaying start + * until receipt from user of + * first packet to transmit. */ + } + ch->status = ch->p.status; + pi->openchans++; + return 0; + +errfree: + while (i > 0) + { + /* Don't leak all the previously allocated mbufs in this loop */ + i--; + OS_mem_token_free (ch->mdr[i].mem_token); + } + OS_kfree (ch->mdt); + ch->mdt = 0; + ch->txd_num = 0; + OS_kfree (ch->mdr); + ch->mdr = 0; + ch->rxd_num = 0; + ch->state = DOWN; + return ENOBUFS; +} + +/* stop the hardware from servicing & interrupting */ + +void +c4_stopwd (ci_t * ci) +{ + OS_stop_watchdog (&ci->wd); + SD_SEM_TAKE (&ci->sem_wdbusy, "_stop_"); /* ensure WD not running */ + SD_SEM_GIVE (&ci->sem_wdbusy); +} + + +void +sbecom_get_brdinfo (ci_t * ci, struct sbe_brd_info * bip, u_int8_t *bsn) +{ + char *np; + u_int32_t sn = 0; + int i; + + bip->brdno = ci->brdno; /* our board number */ + bip->brd_id = ci->brd_id; + bip->brd_hdw_id = ci->hdw_bid; + bip->brd_chan_cnt = MUSYCC_NCHANS * ci->max_port; /* number of channels + * being used */ + bip->brd_port_cnt = ci->max_port; /* number of ports being used */ + bip->brd_pci_speed = BINFO_PCI_SPEED_unk; /* PCI speed not yet + * determinable */ + + if (ci->first_if) + { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + np = (char *) hdlc_to_name (ci->first_if); +#else + { + struct net_device *dev; + + dev = (struct net_device *) ci->first_if; + np = (char *) dev->name; + } +#endif + strncpy (bip->first_iname, np, CHNM_STRLEN - 1); + } else + strcpy (bip->first_iname, "<NULL>"); + if (ci->last_if) + { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + np = (char *) hdlc_to_name (ci->last_if); +#else + { + struct net_device *dev; + + dev = (struct net_device *) ci->last_if; + np = (char *) dev->name; + } +#endif + strncpy (bip->last_iname, np, CHNM_STRLEN - 1); + } else + strcpy (bip->last_iname, "<NULL>"); + + if (bsn) + { + for (i = 0; i < 3; i++) + { + bip->brd_mac_addr[i] = *bsn++; + } + for (; i < 6; i++) + { + bip->brd_mac_addr[i] = *bsn; + sn = (sn << 8) | *bsn++; + } + } else + { + for (i = 0; i < 6; i++) + bip->brd_mac_addr[i] = 0; + } + bip->brd_sn = sn; +} + + +status_t +c4_get_iidinfo (ci_t * ci, struct sbe_iid_info * iip) +{ + struct net_device *dev; + char *np; + + if (!(dev = getuserbychan (iip->channum))) + return ENOENT; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + np = (char *) hdlc_to_name (dev_to_hdlc (dev)); +#else + np = dev->name; +#endif + strncpy (iip->iname, np, CHNM_STRLEN - 1); + return 0; +} + + +#ifdef CONFIG_SBE_PMCC4_NCOMM +void (*nciInterrupt[MAX_BOARDS][4]) (void); +extern void wanpmcC4T1E1_hookInterrupt (int cardID, int deviceID, void *handler); + +void +wanpmcC4T1E1_hookInterrupt (int cardID, int deviceID, void *handler) +{ + if (cardID < MAX_BOARDS) /* sanity check */ + nciInterrupt[cardID][deviceID] = handler; +} + +irqreturn_t +c4_ebus_intr_th_handler (void *devp) +{ + ci_t *ci = (ci_t *) devp; + volatile u_int32_t ists; + int handled = 0; + int brdno; + + /* which COMET caused the interrupt */ + brdno = ci->brdno; + ists = pci_read_32 ((u_int32_t *) &ci->cpldbase->intr); + if (ists & PMCC4_CPLD_INTR_CMT_1) + { + handled = 0x1; + if (nciInterrupt[brdno][0] != NULL) + (*nciInterrupt[brdno][0]) (); + } + if (ists & PMCC4_CPLD_INTR_CMT_2) + { + handled |= 0x2; + if (nciInterrupt[brdno][1] != NULL) + (*nciInterrupt[brdno][1]) (); + } + if (ists & PMCC4_CPLD_INTR_CMT_3) + { + handled |= 0x4; + if (nciInterrupt[brdno][2] != NULL) + (*nciInterrupt[brdno][2]) (); + } + if (ists & PMCC4_CPLD_INTR_CMT_4) + { + handled |= 0x8; + if (nciInterrupt[brdno][3] != NULL) + (*nciInterrupt[brdno][3]) (); + } +#if 0 + /*** Test code just de-implements the asserted interrupt. Alternate + vendor will supply COMET interrupt handling code herein or such. + ***/ + pci_write_32 ((u_int32_t *) &ci->reg->glcd, GCD_MAGIC | MUSYCC_GCD_INTB_DISABLE); +#endif + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,20) + return; +#else + return IRQ_RETVAL (handled); +#endif +} + + +unsigned long +wanpmcC4T1E1_getBaseAddress (int cardID, int deviceID) +{ + ci_t *ci; + unsigned long base = 0; + + ci = c4_list; + while (ci) + { + if (ci->brdno == cardID) /* found valid device */ + { + if (deviceID < ci->max_port) /* comet is supported */ + base = ((unsigned long) ci->port[deviceID].cometbase); + break; + } + ci = ci->next; /* next board, if any */ + } + return (base); +} + +#endif /*** CONFIG_SBE_PMCC4_NCOMM ***/ + + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/pmcc4_ioctls.h b/drivers/staging/cxt1e1/pmcc4_ioctls.h new file mode 100644 index 000000000000..6b8d65673c78 --- /dev/null +++ b/drivers/staging/cxt1e1/pmcc4_ioctls.h @@ -0,0 +1,81 @@ +/* RCSid: $Header: /home/rickd/projects/pmcc4/include/pmcc4_ioctls.h,v 2.0 2005/09/28 00:10:09 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_PMCC4_IOCTLS_H_ +#define _INC_PMCC4_IOCTLS_H_ + +/*----------------------------------------------------------------------------- + * pmcc4_ioctls.h - + * + * Copyright (C) 2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 2.0 $ + * Last changed on $Date: 2005/09/28 00:10:09 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: pmcc4_ioctls.h,v $ + * Revision 2.0 2005/09/28 00:10:09 rickd + * Add GNU license info. Switch Ioctls to sbe_ioc.h usage. + * + * Revision 1.2 2005/04/28 23:43:03 rickd + * Add RCS tracking heading. + * + *----------------------------------------------------------------------------- + */ + +#include "sbew_ioc.h" + +enum +{ + // C4_GET_PORT = 0, + // C4_SET_PORT, + // C4_GET_CHAN, + // C4_SET_CHAN, + C4_DEL_CHAN = 0, + // C4_CREATE_CHAN, + // C4_GET_CHAN_STATS, + // C4_RESET, + // C4_DEBUG, + C4_RESET_STATS, + C4_LOOP_PORT, + C4_RW_FRMR, + C4_RW_MSYC, + C4_RW_PLD +}; + +#define C4_GET_PORT SBE_IOC_PORT_GET +#define C4_SET_PORT SBE_IOC_PORT_SET +#define C4_GET_CHAN SBE_IOC_CHAN_GET +#define C4_SET_CHAN SBE_IOC_CHAN_SET +// #define C4_DEL_CHAN XXX +#define C4_CREATE_CHAN SBE_IOC_CHAN_NEW +#define C4_GET_CHAN_STATS SBE_IOC_CHAN_GET_STAT +#define C4_RESET SBE_IOC_RESET_DEV +#define C4_DEBUG SBE_IOC_LOGLEVEL +// #define C4_RESET_STATS XXX +// #define C4_LOOP_PORT XXX +// #define C4_RW_FRMR XXX +// #define C4_RW_MSYC XXX +// #define C4_RW_PLD XXX + +struct c4_chan_stats_wrap +{ + int channum; + struct sbecom_chan_stats stats; +}; + +#endif /* _INC_PMCC4_IOCTLS_H_ */ diff --git a/drivers/staging/cxt1e1/pmcc4_private.h b/drivers/staging/cxt1e1/pmcc4_private.h new file mode 100644 index 000000000000..0ae18c444a75 --- /dev/null +++ b/drivers/staging/cxt1e1/pmcc4_private.h @@ -0,0 +1,295 @@ +#ifndef _INC_PMCC4_PRIVATE_H_ +#define _INC_PMCC4_PRIVATE_H_ + +/*----------------------------------------------------------------------------- + * pmcc4_private.h - + * + * Copyright (C) 2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + +#include <linux/kernel.h> +#include <linux/sched.h> +#include <linux/spinlock.h> +#include <linux/interrupt.h> /* support for tasklets */ +#include <linux/timer.h> /* support for timer */ +#include <linux/workqueue.h> +#include <linux/hdlc.h> + +#include "libsbew.h" +#include "pmcc4_defs.h" +#include "pmcc4_cpld.h" +#include "musycc.h" +#include "sbe_promformat.h" +#include "comet.h" + + +/* driver state */ +#define SBE_DRVR_INIT 0x0 +#define SBE_DRVR_AVAILABLE 0x69734F4E +#define SBE_DRVR_DOWN 0x1 + +/****************************************************************************** + * MUSYCC Message Descriptor - coupled to hardware implementation, the first + * three u_int32 must not be reordered. + */ + +struct mdesc +{ + volatile u_int32_t status; /* Buffer Descriptor */ + u_int32_t data; /* Data Pointer */ + u_int32_t next; /* MUSYCC view of Next Pointer */ + void *mem_token; /* Data */ + struct mdesc *snext; +}; + + +/************************************************************************* + * Private driver data structures, internal use only. + */ + +struct c4_chan_info +{ + int gchan; /* channel number within group/port 0-31 */ + int channum; /* absolute channel number 0-128 */ + u_int8_t status; +#define TX_RECOVERY_MASK 0x0f +#define TX_ONR_RECOVERY 0x01 +#define TX_BUFF_RECOVERY 0x02 +#define RX_RECOVERY_MASK 0xf0 +#define RX_ONR_RECOVERY 0x10 + + unsigned char ch_start_rx; +#define CH_START_RX_NOW 1 +#define CH_START_RX_ONR 2 +#define CH_START_RX_BUF 3 + + unsigned char ch_start_tx; +#define CH_START_TX_1ST 1 +#define CH_START_TX_ONR 2 +#define CH_START_TX_BUF 3 + + char tx_full; /* boolean */ + short txd_free; /* count of TX Desc available */ + short txd_required; /* count of TX Desc needed by mesg */ + unsigned short rxd_num; /* must support range up to 2000 */ + unsigned short txd_num; /* must support range up to 1000 */ + int rxix_irq_srv; + + enum + { + UNASSIGNED, /* AVAILABLE, NOTINUSE */ + DOWN, /* ASSIGNED, NOTINUSE */ + UP /* ASSIGNED and INUSE */ + } state; + + struct c4_port_info *up; + void *user; + + struct work_struct ch_work; + struct mdesc *mdt; + struct mdesc *mdr; + struct mdesc *txd_irq_srv; + struct mdesc *txd_usr_add; + +#if 0 + /* + * FUTURE CODE MIGHT SEPARATE TIMESLOT MAP SETUPS INTO SINGLE IOCTL and + * REMOVE MAPS FROM CHANNEL PARAMETER STRUCTURE + */ + /* + * each byte in bitmask below represents one timeslot (bitmask[0] is for + * timeslot 0 and so on), each bit in the byte selects timeslot bits for + * this channel (0xff - whole timeslot, 0x7f - 56kbps mode) + */ + + u_int8_t ts_bitmask[32]; +#endif + spinlock_t ch_rxlock; + spinlock_t ch_txlock; + atomic_t tx_pending; + + struct sbecom_chan_stats s; + struct sbecom_chan_param p; +}; +typedef struct c4_chan_info mch_t; + +struct c4_port_info +{ + + struct musycc_globalr *reg; + struct musycc_groupr *regram; + void *regram_saved; /* Original malloc value may have non-2KB + * boundary. Need to save for use when + * freeing. */ + comet_t *cometbase; + struct sbe_card_info *up; + + /* + * The workqueue is used for TX restart of ONR'd channels when in + * Transparent mode. + */ + + struct workqueue_struct *wq_port; /* chan restart work queue */ + struct semaphore sr_sem_busy; /* service request exclusion + * semaphore */ + struct semaphore sr_sem_wait; /* service request handshake + * semaphore */ + u_int32_t sr_last; + short openchans; + char portnum; + char group_is_set; /* GROUP_INIT command issued to MUSYCC, + * otherwise SET_CHAN Ioctl fails */ + + mch_t *chan[MUSYCC_NCHANS]; + struct sbecom_port_param p; + + /* + * The MUSYCC timeslot mappings are maintained within the driver and are + * modified and reloaded as each of a group's channels are configured. + */ + u_int8_t tsm[32]; /* tsm (time slot map) */ + int fifomap[32]; +}; +typedef struct c4_port_info mpi_t; + + +#define COMET_OFFSET(x) (0x80000+(x)*0x10000) +#define EEPROM_OFFSET 0xC0000 +#define ISPLD_OFFSET 0xD0000 + +/* iSPLD control chip registers */ +#define ISPLD_MCSR 0x0 +#define ISPLD_MCLK 0x1 +#define ISPLD_LEDS 0x2 +#define ISPLD_INTR 0x3 +#define ISPLD_MAX 0x3 + +struct sbe_card_info +{ + struct musycc_globalr *reg; + struct musycc_groupr *regram; + u_int32_t *iqd_p; /* pointer to dword aligned interrupt queue + * descriptors */ + void *iqd_p_saved; /* Original malloc value may have non-dword + * aligned boundary. Need to save for use + * when freeing. */ + unsigned int iqp_headx, iqp_tailx; + + struct semaphore sem_wdbusy;/* watchdog exclusion semaphore */ + struct watchdog wd; /* statically allocated watchdog structure */ + atomic_t bh_pending; /* bh queued, but not yet running */ + u_int32_t brd_id; /* unique PCI ID */ + u_int16_t hdw_bid; /* on/board hardware ID */ + unsigned short wdcount; + unsigned char max_port; + unsigned char brdno; /* our board number */ + unsigned char wd_notify; +#define WD_NOTIFY_1TX 1 +#define WD_NOTIFY_BUF 2 +#define WD_NOTIFY_ONR 4 + enum /* state as regards interrupt processing */ + { + C_INIT, /* of-board-address not configured or are in + * process of being removed, don't access + * hardware */ + C_IDLE, /* off-board-addresses are configured, but + * don't service interrupts, just clear them + * from hardware */ + C_RUNNING /* life is good, service away */ + } state; + + struct sbe_card_info *next; + u_int32_t *eeprombase; /* mapped address of board's EEPROM */ + c4cpld_t *cpldbase; /* mapped address of board's CPLD hardware */ + char *release; /* SBE ID string w/in sbeRelease.c */ + void *hdw_info; +#ifdef CONFIG_PROC_FS + struct proc_dir_entry *dir_dev; +#endif + + /* saved off interface assignments which bound a board */ + hdlc_device *first_if; + hdlc_device *last_if; + short first_channum, last_channum; + + struct intlog + { + u_int32_t this_status_new; + u_int32_t last_status_new; + u_int32_t drvr_intr_thcount; + u_int32_t drvr_intr_bhcount; + u_int32_t drvr_int_failure; + } intlog; + + mpi_t port[MUSYCC_NPORTS]; + char devname[SBE_IFACETMPL_SIZE + 1]; + atomic_t tx_pending; + u_int32_t alarmed[4]; /* dpm211 */ + +#if defined(SBE_ISR_TASKLET) + struct tasklet_struct ci_musycc_isr_tasklet; +#elif defined(SBE_ISR_IMMEDIATE) + struct tq_struct ci_musycc_isr_tq; +#endif +}; +typedef struct sbe_card_info ci_t; + +struct s_hdw_info +{ + u_int8_t pci_busno; + u_int8_t pci_slot; + u_int8_t pci_pin[2]; + u_int8_t revid[2]; + u_int8_t mfg_info_sts; +#define EEPROM_OK 0x00 +#define EEPROM_CRCERR 0x01 + char promfmt; /* prom type, from sbe_promformat.h */ + + char devname[SBE_IFACETMPL_SIZE]; + struct pci_bus *bus; + struct net_device *ndev; + struct pci_dev *pdev[2]; + + unsigned long addr[2]; + unsigned long addr_mapped[2]; + unsigned long len[2]; + + union + { + char data[128]; + FLD_TYPE1 pft1; /* prom field, type #1 */ + FLD_TYPE2 pft2; /* prom field, type #2 */ + } mfg_info; +}; +typedef struct s_hdw_info hdw_info_t; + +/*****************************************************************/ + +struct c4_priv +{ + int channum; + struct sbe_card_info *ci; +}; + + +/*****************************************************************/ + +extern ci_t *c4_list; + +mch_t *c4_find_chan (int); +int c4_set_chan (int channum, struct sbecom_chan_param *); +int c4_get_chan (int channum, struct sbecom_chan_param *); +int c4_get_chan_stats (int channum, struct sbecom_chan_stats *); + +#endif /* _INC_PMCC4_PRIVATE_H_ */ diff --git a/drivers/staging/cxt1e1/pmcc4_sysdep.h b/drivers/staging/cxt1e1/pmcc4_sysdep.h new file mode 100644 index 000000000000..697f1943670f --- /dev/null +++ b/drivers/staging/cxt1e1/pmcc4_sysdep.h @@ -0,0 +1,62 @@ +#ifndef _INC_PMCC4_SYSDEP_H_ +#define _INC_PMCC4_SYSDEP_H_ + +/*----------------------------------------------------------------------------- + * pmcc4_sysdep.h - + * + * Copyright (C) 2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* reduce multiple autoconf entries to a single definition */ + +#ifdef CONFIG_SBE_PMCC4_HDLC_V7_MODULE +#undef CONFIG_SBE_PMCC4_HDLC_V7 +#define CONFIG_SBE_PMCC4_HDLC_V7 1 +#endif + +#ifdef CONFIG_SBE_PMCC4_NCOMM_MODULE +#undef CONFIG_SBE_PMCC4_NCOMM +#define CONFIG_SBE_PMCC4_NCOMM 1 +#endif + + +/* FLUSH MACROS - if using ioremap_nocache(), then these can be NOOPS, + * otherwise a memory barrier needs to be inserted. + */ + +#define FLUSH_PCI_READ() rmb() +#define FLUSH_PCI_WRITE() wmb() +#define FLUSH_MEM_READ() rmb() +#define FLUSH_MEM_WRITE() wmb() + + +/* + * System dependent callbacks routines, not inlined... + * For inlined system dependent routines, see include/sbecom_inlinux_linux.h + */ + +/* + * passes received memory token back to the system, <user> is parameter from + * sd_new_chan() used to create the channel which the data arrived on + */ + +void sd_recv_consume(void *token, size_t len, void *user); + +void sd_disable_xmit (void *user); +void sd_enable_xmit (void *user); +int sd_line_is_ok (void *user); +void sd_line_is_up (void *user); +void sd_line_is_down (void *user); +int sd_queue_stopped (void *user); + +#endif /*** _INC_PMCC4_SYSDEP_H_ ***/ diff --git a/drivers/staging/cxt1e1/sbe_bid.h b/drivers/staging/cxt1e1/sbe_bid.h new file mode 100644 index 000000000000..1f49b4061fb7 --- /dev/null +++ b/drivers/staging/cxt1e1/sbe_bid.h @@ -0,0 +1,61 @@ +/* + * $Id: sbe_bid.h,v 1.0 2005/09/28 00:10:09 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_SBEBID_H_ +#define _INC_SBEBID_H_ + +/*----------------------------------------------------------------------------- + * sbe_bid.h - + * + * Copyright (C) 2004-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + * + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.0 $ + * Last changed on $Date: 2005/09/28 00:10:09 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: sbe_bid.h,v $ + * Revision 1.0 2005/09/28 00:10:09 rickd + * Initial revision + * + *----------------------------------------------------------------------------- + */ + +#define SBE_BID_REG 0x00000000 /* Board ID Register */ + +#define SBE_BID_256T3_E1 0x46 /* SBE wanPTMC-256T3 (E1 Version) */ +#define SBE_BID_256T3_T1 0x42 /* SBE wanPTMC-256T3 (T1 Version) */ +#define SBE_BID_2T3E3 0x43 /* SBE wanPMC-2T3E3 */ +#define SBE_BID_C1T3 0x45 /* SBE wanPMC-C1T3 */ +#define SBE_BID_C24TE1 0x47 /* SBE wanPTMC-C24TE1 */ +#define SBE_BID_C24TE1_RTM_24 0x48 /* C24TE1 RTM (24 Port) */ +#define SBE_BID_C24TE1_RTM_12 0x49 /* C24TE1 RTM (12 Port) */ +#define SBE_BID_C24TE1_RTM_12DSU 0x4A /* C24TE1 RTM (12 Port/DSU) */ +#define SBE_BID_C24TE1_RTM_T3 0x4B /* C24TE1 RTM (T3) */ +#define SBE_BID_C4T1E1 0x41 /* SBE wanPTMC-C4T1E1 */ +#define SBE_BID_HC4T1E1 0x44 /* SBE wanADAPT-HC4T1E1 */ + +/* bogus temporary usage values */ +#define SBE_BID_PMC_C4T1E1 0xC4 /* SBE wanPMC-C4T1E1 (4 Port) */ +#define SBE_BID_PMC_C2T1E1 0xC2 /* SBE wanPMC-C2T1E1 (2 Port) */ +#define SBE_BID_PMC_C1T1E1 0xC1 /* SBE wanPMC-C1T1E1 (1 Port) */ +#define SBE_BID_PCI_C4T1E1 0x04 /* SBE wanPCI-C4T1E1 (4 Port) */ +#define SBE_BID_PCI_C2T1E1 0x02 /* SBE wanPCI-C2T1E1 (2 Port) */ +#define SBE_BID_PCI_C1T1E1 0x01 /* SBE wanPCI-C1T1E1 (1 Port) */ + +#endif /*** _INC_SBEBID_H_ ***/ diff --git a/drivers/staging/cxt1e1/sbe_promformat.h b/drivers/staging/cxt1e1/sbe_promformat.h new file mode 100644 index 000000000000..746f81b15c73 --- /dev/null +++ b/drivers/staging/cxt1e1/sbe_promformat.h @@ -0,0 +1,157 @@ +/* + * $Id: sbe_promformat.h,v 2.2 2005/09/28 00:10:09 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_SBE_PROMFORMAT_H_ +#define _INC_SBE_PROMFORMAT_H_ + +/*----------------------------------------------------------------------------- + * sbe_promformat.h - Contents of seeprom used by dvt and manufacturing tests + * + * Copyright (C) 2002-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + * + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 2.2 $ + * Last changed on $Date: 2005/09/28 00:10:09 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: sbe_promformat.h,v $ + * Revision 2.2 2005/09/28 00:10:09 rickd + * Add EEPROM sample from C4T1E1 board. + * + * Revision 2.1 2005/05/04 17:18:24 rickd + * Initial CI. + * + *----------------------------------------------------------------------------- + */ + + +/*** + * PMCC4 SAMPLE EEPROM IMAGE + * + * eeprom[00]: 01 11 76 07 01 00 a0 d6 + * eeprom[08]: 22 34 56 3e 5b c1 1c 3e + * eeprom[16]: 5b e1 b6 00 00 00 01 00 + * eeprom[24]: 00 08 46 d3 7b 5e a8 fb + * eeprom[32]: f7 ef df bf 7f 55 00 01 + * eeprom[40]: 02 04 08 10 20 40 80 ff + * eeprom[48]: fe fd fb f7 ef df bf 7f + * + ***/ + + +/*------------------------------------------------------------------------ + * Type 1 Format + * byte: + * 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 + * ------------------------------------------------------------------------- + * 01 11 76 SS SS 00 0A D6 <SERIAL NUM> <Create TIME> <Heatrun TIME> + * SBE SUB SERIAL # (BCD) (time_t) (time_t) + * ID VENDOR (format) (format) + * + * 19 20 21 22 23 24 25 26 + * Heat Run Heat Run + * Iterations Errors + *------------------------------------------------------------------------ + * + * + * + * Type 2 Format - Added length, CRC in fixed position + * byte: + * 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 + * ------------------------------------------------------------------------- + * 02 00 1A CC CC CC CC 11 76 07 03 00 0A D6 <SERIAL NUM> + * Payload SBE Crc32 SUB System System SERIAL/MAC + * Length VENDOR ID ID + * + * 17 18 19 20 21 22 23 24 25 26 27 28 29 39 31 32 + * -------------------------------------------------------------------------- + * <Create TIME> <Heatrun TIME> Heat Run Heat Run + * (time_t) (time_t) Iterations Errors + * + */ + +#ifdef __cplusplus +extern "C" +{ +#endif + + +#define STRUCT_OFFSET(type, symbol) ((long)&(((type *)0)->symbol)) + +/*------------------------------------------------------------------------ + * Historically different Prom format types. + * + * For diagnostic and failure purposes, do not create a type 0x00 or a + * type 0xff + *------------------------------------------------------------------------ + */ +#define PROM_FORMAT_Unk (-1) +#define PROM_FORMAT_TYPE1 1 +#define PROM_FORMAT_TYPE2 2 + + +/****** bit fields for a type 1 formatted seeprom **************************/ + typedef struct + { + char type; /* 0x00 */ + char Id[2]; /* 0x01-0x02 */ + char SubId[2]; /* 0x03-0x04 */ + char Serial[6]; /* 0x05-0x0a */ + char CreateTime[4]; /* 0x0b-0x0e */ + char HeatRunTime[4]; /* 0x0f-0x12 */ + char HeatRunIterations[4]; /* 0x13-0x16 */ + char HeatRunErrors[4]; /* 0x17-0x1a */ + char Crc32[4]; /* 0x1b-0x1e */ + } FLD_TYPE1; + + +/****** bit fields for a type 2 formatted seeprom **************************/ + typedef struct + { + char type; /* 0x00 */ + char length[2]; /* 0x01-0x02 */ + char Crc32[4]; /* 0x03-0x06 */ + char Id[2]; /* 0x07-0x08 */ + char SubId[2]; /* 0x09-0x0a */ + char Serial[6]; /* 0x0b-0x10 */ + char CreateTime[4]; /* 0x11-0x14 */ + char HeatRunTime[4]; /* 0x15-0x18 */ + char HeatRunIterations[4]; /* 0x19-0x1c */ + char HeatRunErrors[4]; /* 0x1d-0x20 */ + } FLD_TYPE2; + + + +/***** this union allows us to access the seeprom as an array of bytes ***/ +/***** or as individual fields ***/ + +#define SBE_EEPROM_SIZE 128 +#define SBE_MFG_INFO_SIZE sizeof(FLD_TYPE2) + + typedef union + { + char bytes[128]; + FLD_TYPE1 fldType1; + FLD_TYPE2 fldType2; + } PROMFORMAT; + +#ifdef __cplusplus +} +#endif + +#endif /*** _INC_SBE_PROMFORMAT_H_ ***/ diff --git a/drivers/staging/cxt1e1/sbecom_inline_linux.h b/drivers/staging/cxt1e1/sbecom_inline_linux.h new file mode 100644 index 000000000000..2ab1eb12ed38 --- /dev/null +++ b/drivers/staging/cxt1e1/sbecom_inline_linux.h @@ -0,0 +1,310 @@ +/* + * $Id: sbecom_inline_linux.h,v 1.2 2007/08/15 22:51:35 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_SBECOM_INLNX_H_ +#define _INC_SBECOM_INLNX_H_ + +/*----------------------------------------------------------------------------- + * sbecom_inline_linux.h - SBE common Linux inlined routines + * + * Copyright (C) 2007 One Stop Systems, Inc. + * Copyright (C) 2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@onestopsystems.com + * One Stop Systems, Inc. Escondido, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.2 $ + * Last changed on $Date: 2007/08/15 22:51:35 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: sbecom_inline_linux.h,v $ + * Revision 1.2 2007/08/15 22:51:35 rickd + * Remove duplicate version.h entry. + * + * Revision 1.1 2007/08/15 22:50:29 rickd + * Update linux/config for 2.6.18 and later. + * + * Revision 1.0 2005/09/28 00:10:09 rickd + * Initial revision + * + *----------------------------------------------------------------------------- + */ + + +#if defined (__FreeBSD__) || defined (__NetBSD__) +#include <sys/types.h> +#else +#include <linux/types.h> +#include <linux/version.h> +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) +#include <linux/config.h> +#endif +#if defined(CONFIG_SMP) && ! defined(__SMP__) +#define __SMP__ +#endif +#if defined(CONFIG_MODVERSIONS) && defined(MODULE) && ! defined(MODVERSIONS) +#define MODVERSIONS +#endif + +#ifdef MODULE +#ifdef MODVERSIONS +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +#include <linux/modversions.h> +#else +#include <config/modversions.h> +#endif +#endif +#include <linux/module.h> +#endif +#endif + +#include <linux/kernel.h> /* resolves kmalloc references */ +#include <linux/skbuff.h> /* resolves skb references */ +#include <linux/netdevice.h> /* resolves dev_kree_skb_any */ +#include <asm/byteorder.h> /* resolves cpu_to_le32 */ + +#if 0 + +/*** PORT POINT WARNING + *** + *** Under Linux 2.6 it has been found that compiler is re-ordering + *** in-lined pci_write_32() functions to the detrement of correct + *** hardware setup. Therefore, inlining of PCI accesses has been + *** de-implemented, and subroutine calls have been implemented. + ***/ + +static inline u_int32_t +pci_read_32 (u_int32_t *p) +{ +#ifdef FLOW_DEBUG + u_int32_t v; + + FLUSH_PCI_READ (); + v = le32_to_cpu (*p); + if (log_level >= LOG_DEBUG) + printk ("pci_read : %x = %x\n", (u_int32_t) p, v); + return v; +#else + FLUSH_PCI_READ (); /* */ + return le32_to_cpu (*p); +#endif +} + +static inline void +pci_write_32 (u_int32_t *p, u_int32_t v) +{ +#ifdef FLOW_DEBUG + if (log_level >= LOG_DEBUG) + printk ("pci_write: %x = %x\n", (u_int32_t) p, v); +#endif + *p = cpu_to_le32 (v); + FLUSH_PCI_WRITE (); /* This routine is called from routines + * which do multiple register writes + * which themselves need flushing between + * writes in order to guarantee write + * ordering. It is less code-cumbersome + * to flush here-in then to investigate + * and code the many other register + * writing routines. */ +} +#else +/* forward reference */ +u_int32_t pci_read_32 (u_int32_t *p); +void pci_write_32 (u_int32_t *p, u_int32_t v); + +#endif + + +/* + * system dependent callbacks + */ + +/**********/ +/* malloc */ +/**********/ + +static inline void * +OS_kmalloc (size_t size) +{ + char *ptr = kmalloc (size, GFP_KERNEL | GFP_DMA); + + if (ptr) + memset (ptr, 0, size); + return ptr; +} + +static inline void +OS_kfree (void *x) +{ + kfree (x); +} + + +/****************/ +/* memory token */ +/****************/ + +static inline void * +OS_mem_token_alloc (size_t size) +{ + struct sk_buff *skb; + + skb = dev_alloc_skb (size); + if (!skb) + { + //printk (KERN_WARNING "no mem in OS_mem_token_alloc !"); + return 0; + } + return skb; +} + + +static inline void +OS_mem_token_free (void *token) +{ + dev_kfree_skb_any (token); +} + + +static inline void +OS_mem_token_free_irq (void *token) +{ + dev_kfree_skb_irq (token); +} + + +static inline void * +OS_mem_token_data (void *token) +{ + return ((struct sk_buff *) token)->data; +} + + +static inline void * +OS_mem_token_next (void *token) +{ + return 0; +} + + +static inline int +OS_mem_token_len (void *token) +{ + return ((struct sk_buff *) token)->len; +} + + +static inline int +OS_mem_token_tlen (void *token) +{ + return ((struct sk_buff *) token)->len; +} + + +/***************************************/ +/* virtual to physical addr conversion */ +/***************************************/ + +static inline u_long +OS_phystov (void *addr) +{ + return (u_long) __va (addr); +} + + +static inline u_long +OS_vtophys (void *addr) +{ + return __pa (addr); +} + + +/**********/ +/* semops */ +/**********/ + +void OS_sem_init (void *, int); + + +static inline void +OS_sem_free (void *sem) +{ + /* + * NOOP - since semaphores structures predeclared w/in structures, no + * longer malloc'd + */ +} + +#define SD_SEM_TAKE(sem,desc) down(sem) +#define SD_SEM_GIVE(sem) up(sem) +#define SEM_AVAILABLE 1 +#define SEM_TAKEN 0 + + +/**********************/ +/* watchdog functions */ +/**********************/ + +struct watchdog +{ + struct timer_list h; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + struct tq_struct tq; +#else + struct work_struct work; +#endif + void *softc; + void (*func) (void *softc); + int ticks; + int init_tq; +}; + + +static inline int +OS_start_watchdog (struct watchdog * wd) +{ + wd->h.expires = jiffies + wd->ticks; + add_timer (&wd->h); + return 0; +} + + +static inline int +OS_stop_watchdog (struct watchdog * wd) +{ + del_timer_sync (&wd->h); + return 0; +} + + +static inline int +OS_free_watchdog (struct watchdog * wd) +{ + OS_stop_watchdog (wd); + OS_kfree (wd); + return 0; +} + + +/* sleep in microseconds */ +void OS_uwait (int usec, char *description); +void OS_uwait_dummy (void); + + +/* watchdog functions */ +int OS_init_watchdog(struct watchdog *wdp, void (*f) (void *), void *ci, int usec); + + +#endif /*** _INC_SBECOM_INLNX_H_ ***/ diff --git a/drivers/staging/cxt1e1/sbecrc.c b/drivers/staging/cxt1e1/sbecrc.c new file mode 100644 index 000000000000..51232948091f --- /dev/null +++ b/drivers/staging/cxt1e1/sbecrc.c @@ -0,0 +1,137 @@ +/* Based on "File Verification Using CRC" by Mark R. Nelson in Dr. Dobbs' + * Journal, May 1992, pp. 64-67. This algorithm generates the same CRC + * values as ZMODEM and PKZIP + * + * Copyright (C) 2002-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/types.h> +#include "pmcc4_sysdep.h" +#include "sbecom_inline_linux.h" +#include "sbe_promformat.h" + +/* defines */ +#define CRC32_POLYNOMIAL 0xEDB88320L +#define CRC_TABLE_ENTRIES 256 + + + +static u_int32_t crcTableInit; + +#ifdef STATIC_CRC_TABLE +static u_int32_t CRCTable[CRC_TABLE_ENTRIES]; + +#endif + + +/*************************************************************************** +* +* genCrcTable - fills in CRCTable, as used by sbeCrc() +* +* RETURNS: N/A +* +* ERRNO: N/A +***************************************************************************/ + +static void +genCrcTable (u_int32_t *CRCTable) +{ + int ii, jj; + u_int32_t crc; + + for (ii = 0; ii < CRC_TABLE_ENTRIES; ii++) + { + crc = ii; + for (jj = 8; jj > 0; jj--) + { + if (crc & 1) + crc = (crc >> 1) ^ CRC32_POLYNOMIAL; + else + crc >>= 1; + } + CRCTable[ii] = crc; + } + + crcTableInit++; +} + + +/*************************************************************************** +* +* sbeCrc - generates a CRC on a given buffer, and initial CRC +* +* This routine calculates the CRC for a buffer of data using the +* table lookup method. It accepts an original value for the crc, +* and returns the updated value. This permits "catenation" of +* discontiguous buffers. An original value of 0 for the "first" +* buffer is the norm. +* +* Based on "File Verification Using CRC" by Mark R. Nelson in Dr. Dobb's +* Journal, May 1992, pp. 64-67. This algorithm generates the same CRC +* values as ZMODEM and PKZIP. +* +* RETURNS: calculated crc of block +* +*/ + +void +sbeCrc (u_int8_t *buffer, /* data buffer to crc */ + u_int32_t count, /* length of block in bytes */ + u_int32_t initialCrc, /* starting CRC */ + u_int32_t *result) +{ + u_int32_t *tbl = 0; + u_int32_t temp1, temp2, crc; + + /* + * if table not yet created, do so. Don't care about "extra" time + * checking this everytime sbeCrc() is called, since CRC calculations are + * already time consuming + */ + if (!crcTableInit) + { +#ifdef STATIC_CRC_TABLE + tbl = &CRCTable; + genCrcTable (tbl); +#else + tbl = (u_int32_t *) OS_kmalloc (CRC_TABLE_ENTRIES * sizeof (u_int32_t)); + if (tbl == 0) + { + *result = 0; /* dummy up return value due to malloc + * failure */ + return; + } + genCrcTable (tbl); +#endif + } + /* inverting bits makes ZMODEM & PKZIP compatible */ + crc = initialCrc ^ 0xFFFFFFFFL; + + while (count-- != 0) + { + temp1 = (crc >> 8) & 0x00FFFFFFL; + temp2 = tbl[((int) crc ^ *buffer++) & 0xff]; + crc = temp1 ^ temp2; + } + + crc ^= 0xFFFFFFFFL; + + *result = crc; + +#ifndef STATIC_CRC_TABLE + crcTableInit = 0; + OS_kfree (tbl); +#endif +} + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/sbeid.c b/drivers/staging/cxt1e1/sbeid.c new file mode 100644 index 000000000000..a2243b10ef05 --- /dev/null +++ b/drivers/staging/cxt1e1/sbeid.c @@ -0,0 +1,217 @@ +/* Copyright (C) 2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/types.h> +#include "pmcc4_sysdep.h" +#include "sbecom_inline_linux.h" +#include "libsbew.h" +#include "pmcc4_private.h" +#include "pmcc4.h" +#include "sbe_bid.h" + +#ifdef SBE_INCLUDE_SYMBOLS +#define STATIC +#else +#define STATIC static +#endif + + +char * +sbeid_get_bdname (ci_t * ci) +{ + char *np = 0; + + switch (ci->brd_id) + { + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_E1): + np = "wanPTMC-256T3 <E1>"; + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_T1): + np = "wanPTMC-256T3 <T1>"; + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1): + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1_L): + np = "wanPMC-C4T1E1"; + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1): + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1_L): + np = "wanPMC-C2T1E1"; + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1): + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1_L): + np = "wanPMC-C1T1E1"; + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1): + np = "wanPCI-C4T1E1"; + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C2T1E1): + np = "wanPCI-C2T1E1"; + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C1T1E1): + np = "wanPCI-C1T1E1"; + break; + default: + /*** np = "<unknown>"; ***/ + np = "wanPCI-CxT1E1"; + break; + } + + return np; +} + + +/* given the presetting of brd_id, set the corresponding hdw_id */ + +void +sbeid_set_hdwbid (ci_t * ci) +{ + /* + * set SBE's unique hardware identification (for legacy boards might not + * have this register implemented) + */ + + switch (ci->brd_id) + { + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_E1): + ci->hdw_bid = SBE_BID_256T3_E1; /* 0x46 - SBE wanPTMC-256T3 (E1 + * Version) */ + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_T1): + ci->hdw_bid = SBE_BID_256T3_T1; /* 0x42 - SBE wanPTMC-256T3 (T1 + * Version) */ + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1): + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1_L): + /* + * This Board ID is a generic identification. Use the found number + * of ports to further define this hardware. + */ + switch (ci->max_port) + { + default: /* shouldn't need a default, but have one + * anyway */ + case 4: + ci->hdw_bid = SBE_BID_PMC_C4T1E1; /* 0xC4 - SBE wanPMC-C4T1E1 */ + break; + case 2: + ci->hdw_bid = SBE_BID_PMC_C2T1E1; /* 0xC2 - SBE wanPMC-C2T1E1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1); + break; + case 1: + ci->hdw_bid = SBE_BID_PMC_C1T1E1; /* 0xC1 - SBE wanPMC-C1T1E1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1); + break; + } + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1): + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1_L): + ci->hdw_bid = SBE_BID_PMC_C2T1E1; /* 0xC2 - SBE wanPMC-C2T1E1 */ + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1): + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1_L): + ci->hdw_bid = SBE_BID_PMC_C1T1E1; /* 0xC1 - SBE wanPMC-C1T1E1 */ + break; +#ifdef SBE_PMCC4_ENABLE + /* + * This case is entered as a result of the inability to obtain the + * <bid> from the board's EEPROM. Assume a PCI board and set + * <hdsbid> according to the number ofr found ports. + */ + case 0: + /* start by assuming 4-port for ZERO casing */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1); + /* drop thru to set hdw_bid and alternate PCI CxT1E1 settings */ +#endif + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1): + /* + * This Board ID is a generic identification. Use the number of + * found ports to further define this hardware. + */ + switch (ci->max_port) + { + default: /* shouldn't need a default, but have one + * anyway */ + case 4: + ci->hdw_bid = SBE_BID_PCI_C4T1E1; /* 0x04 - SBE wanPCI-C4T1E1 */ + break; + case 2: + ci->hdw_bid = SBE_BID_PCI_C2T1E1; /* 0x02 - SBE wanPCI-C2T1E1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C2T1E1); + break; + case 1: + ci->hdw_bid = SBE_BID_PCI_C1T1E1; /* 0x01 - SBE wanPCI-C1T1E1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C1T1E1); + break; + } + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C2T1E1): + ci->hdw_bid = SBE_BID_PCI_C2T1E1; /* 0x02 - SBE wanPCI-C2T1E1 */ + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C1T1E1): + ci->hdw_bid = SBE_BID_PCI_C1T1E1; /* 0x01 - SBE wanPCI-C1T1E1 */ + break; + default: + /*** bid = "<unknown>"; ***/ + ci->hdw_bid = SBE_BID_PMC_C4T1E1; /* 0x41 - SBE wanPTMC-C4T1E1 */ + break; + } +} + +/* given the presetting of hdw_bid, set the corresponding brd_id */ + +void +sbeid_set_bdtype (ci_t * ci) +{ + /* set SBE's unique PCI VENDOR/DEVID */ + switch (ci->hdw_bid) + { + case SBE_BID_C1T3: /* SBE wanPMC-C1T3 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T3); + break; + case SBE_BID_C24TE1: /* SBE wanPTMC-C24TE1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_C24TE1); + break; + case SBE_BID_256T3_E1: /* SBE wanPTMC-256T3 E1 Version */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_E1); + break; + case SBE_BID_256T3_T1: /* SBE wanPTMC-256T3 T1 Version */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_T1); + break; + case SBE_BID_PMC_C4T1E1: /* 0xC4 - SBE wanPMC-C4T1E1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1); + break; + case SBE_BID_PMC_C2T1E1: /* 0xC2 - SBE wanPMC-C2T1E1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1); + break; + case SBE_BID_PMC_C1T1E1: /* 0xC1 - SBE wanPMC-C1T1E1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1); + break; + case SBE_BID_PCI_C4T1E1: /* 0x04 - SBE wanPCI-C4T1E1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1); + break; + case SBE_BID_PCI_C2T1E1: /* 0x02 - SBE wanPCI-C2T1E1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C2T1E1); + break; + case SBE_BID_PCI_C1T1E1: /* 0x01 - SBE wanPCI-C1T1E1 */ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C1T1E1); + break; + + default: + /*** hdw_bid = "<unknown>"; ***/ + ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1); + break; + } +} + + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/sbeproc.c b/drivers/staging/cxt1e1/sbeproc.c new file mode 100644 index 000000000000..61ca639c184f --- /dev/null +++ b/drivers/staging/cxt1e1/sbeproc.c @@ -0,0 +1,358 @@ +/* Copyright (C) 2004-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/types.h> +#include <linux/module.h> +#include <linux/errno.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/proc_fs.h> +#include <linux/sched.h> +#include <asm/uaccess.h> +#include "pmcc4_sysdep.h" +#include "sbecom_inline_linux.h" +#include "pmcc4_private.h" +#include "sbeproc.h" + +/* forwards */ +void sbecom_get_brdinfo (ci_t *, struct sbe_brd_info *, u_int8_t *); +extern struct s_hdw_info hdw_info[MAX_BOARDS]; + +#ifdef CONFIG_PROC_FS + +/********************************************************************/ +/* procfs stuff */ +/********************************************************************/ + + +void +sbecom_proc_brd_cleanup (ci_t * ci) +{ + if (ci->dir_dev) + { + char dir[7 + SBE_IFACETMPL_SIZE + 1]; + snprintf(dir, sizeof(dir), "driver/%s", ci->devname); + remove_proc_entry("info", ci->dir_dev); + remove_proc_entry(dir, NULL); + ci->dir_dev = NULL; + } +} + + +static int +sbecom_proc_get_sbe_info (char *buffer, char **start, off_t offset, + int length, int *eof, void *priv) +{ + ci_t *ci = (ci_t *) priv; + int len = 0; + char *spd; + struct sbe_brd_info *bip; + + if (!(bip = OS_kmalloc (sizeof (struct sbe_brd_info)))) + { + return -ENOMEM; + } +#if 0 + /** RLD DEBUG **/ + printk (">> sbecom_proc_get_sbe_info: entered, offset %d. length %d.\n", + (int) offset, (int) length); +#endif + + { + hdw_info_t *hi = &hdw_info[ci->brdno]; + + u_int8_t *bsn = 0; + + switch (hi->promfmt) + { + case PROM_FORMAT_TYPE1: + bsn = (u_int8_t *) hi->mfg_info.pft1.Serial; + break; + case PROM_FORMAT_TYPE2: + bsn = (u_int8_t *) hi->mfg_info.pft2.Serial; + break; + } + + sbecom_get_brdinfo (ci, bip, bsn); + } + +#if 0 + /** RLD DEBUG **/ + printk (">> sbecom_get_brdinfo: returned, first_if %p <%s> last_if %p <%s>\n", + (char *) &bip->first_iname, (char *) &bip->first_iname, + (char *) &bip->last_iname, (char *) &bip->last_iname); +#endif + len += sprintf (buffer + len, "Board Type: "); + switch (bip->brd_id) + { + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T3): + len += sprintf (buffer + len, "wanPMC-C1T3"); + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_E1): + len += sprintf (buffer + len, "wanPTMC-256T3 <E1>"); + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_T1): + len += sprintf (buffer + len, "wanPTMC-256T3 <T1>"); + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_C24TE1): + len += sprintf (buffer + len, "wanPTMC-C24TE1"); + break; + + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1): + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1_L): + len += sprintf (buffer + len, "wanPMC-C4T1E1"); + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1): + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1_L): + len += sprintf (buffer + len, "wanPMC-C2T1E1"); + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1): + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1_L): + len += sprintf (buffer + len, "wanPMC-C1T1E1"); + break; + + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1): + len += sprintf (buffer + len, "wanPCI-C4T1E1"); + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C2T1E1): + len += sprintf (buffer + len, "wanPCI-C2T1E1"); + break; + case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C1T1E1): + len += sprintf (buffer + len, "wanPCI-C1T1E1"); + break; + + default: + len += sprintf (buffer + len, "unknown"); + break; + } + len += sprintf (buffer + len, " [%08X]\n", bip->brd_id); + + len += sprintf (buffer + len, "Board Number: %d\n", bip->brdno); + len += sprintf (buffer + len, "Hardware ID: 0x%02X\n", ci->hdw_bid); + len += sprintf (buffer + len, "Board SN: %06X\n", bip->brd_sn); + len += sprintf (buffer + len, "Board MAC: %02X-%02X-%02X-%02X-%02X-%02X\n", + bip->brd_mac_addr[0], bip->brd_mac_addr[1], bip->brd_mac_addr[2], + bip->brd_mac_addr[3], bip->brd_mac_addr[4], bip->brd_mac_addr[5]); + len += sprintf (buffer + len, "Ports: %d\n", ci->max_port); + len += sprintf (buffer + len, "Channels: %d\n", bip->brd_chan_cnt); +#if 1 + len += sprintf (buffer + len, "Interface: %s -> %s\n", + (char *) &bip->first_iname, (char *) &bip->last_iname); +#else + len += sprintf (buffer + len, "Interface: <not available> 1st %p lst %p\n", + (char *) &bip->first_iname, (char *) &bip->last_iname); +#endif + + switch (bip->brd_pci_speed) + { + case BINFO_PCI_SPEED_33: + spd = "33Mhz"; + break; + case BINFO_PCI_SPEED_66: + spd = "66Mhz"; + break; + default: + spd = "<not available>"; + break; + } + len += sprintf (buffer + len, "PCI Bus Speed: %s\n", spd); + len += sprintf (buffer + len, "Release: %s\n", ci->release); + +#ifdef SBE_PMCC4_ENABLE + { + extern int max_mru; +#if 0 + extern int max_chans_used; + extern int max_mtu; +#endif + extern int max_rxdesc_used, max_txdesc_used; + + len += sprintf (buffer + len, "\nmax_mru: %d\n", max_mru); +#if 0 + len += sprintf (buffer + len, "\nmax_chans_used: %d\n", max_chans_used); + len += sprintf (buffer + len, "max_mtu: %d\n", max_mtu); +#endif + len += sprintf (buffer + len, "max_rxdesc_used: %d\n", max_rxdesc_used); + len += sprintf (buffer + len, "max_txdesc_used: %d\n", max_txdesc_used); + } +#endif + + OS_kfree (bip); /* cleanup */ + + /*** + * How to be a proc read function + * ------------------------------ + * Prototype: + * int f(char *buffer, char **start, off_t offset, + * int count, int *peof, void *dat) + * + * Assume that the buffer is "count" bytes in size. + * + * If you know you have supplied all the data you + * have, set *peof. + * + * You have three ways to return data: + * 0) Leave *start = NULL. (This is the default.) + * Put the data of the requested offset at that + * offset within the buffer. Return the number (n) + * of bytes there are from the beginning of the + * buffer up to the last byte of data. If the + * number of supplied bytes (= n - offset) is + * greater than zero and you didn't signal eof + * and the reader is prepared to take more data + * you will be called again with the requested + * offset advanced by the number of bytes + * absorbed. This interface is useful for files + * no larger than the buffer. + * 1) Set *start = an unsigned long value less than + * the buffer address but greater than zero. + * Put the data of the requested offset at the + * beginning of the buffer. Return the number of + * bytes of data placed there. If this number is + * greater than zero and you didn't signal eof + * and the reader is prepared to take more data + * you will be called again with the requested + * offset advanced by *start. This interface is + * useful when you have a large file consisting + * of a series of blocks which you want to count + * and return as wholes. + * (Hack by Paul.Russell@rustcorp.com.au) + * 2) Set *start = an address within the buffer. + * Put the data of the requested offset at *start. + * Return the number of bytes of data placed there. + * If this number is greater than zero and you + * didn't signal eof and the reader is prepared to + * take more data you will be called again with the + * requested offset advanced by the number of bytes + * absorbed. + */ + +#if 1 + /* #4 - intepretation of above = set EOF, return len */ + *eof = 1; +#endif + +#if 0 + /* + * #1 - from net/wireless/atmel.c RLD NOTE -there's something wrong with + * this plagarized code which results in this routine being called TWICE. + * The second call returns ZERO, resulting in hidden failure, but at + * least only a single message set is being displayed. + */ + if (len <= offset + length) + *eof = 1; + *start = buffer + offset; + len -= offset; + if (len > length) + len = length; + if (len < 0) + len = 0; +#endif + +#if 0 /* #2 from net/tokenring/olympic.c + + * lanstreamer.c */ + { + off_t begin = 0; + int size = 0; + off_t pos = 0; + + size = len; + pos = begin + size; + if (pos < offset) + { + len = 0; + begin = pos; + } + *start = buffer + (offset - begin); /* Start of wanted data */ + len -= (offset - begin); /* Start slop */ + if (len > length) + len = length; /* Ending slop */ + } +#endif + +#if 0 /* #3 from + * char/ftape/lowlevel/ftape-proc.c */ + len = strlen (buffer); + *start = NULL; + if (offset + length >= len) + *eof = 1; + else + *eof = 0; +#endif + +#if 0 + printk (">> proc_fs: returned len = %d., start %p\n", len, start); /* RLD DEBUG */ +#endif + +/*** + using NONE: returns = 314.314.314. + using #1 : returns = 314, 0. + using #2 : returns = 314, 0, 0. + using #3 : returns = 314, 314. + using #4 : returns = 314, 314. +***/ + + return len; +} + +/* initialize the /proc subsystem for the specific SBE driver */ + +int __init +sbecom_proc_brd_init (ci_t * ci) +{ + struct proc_dir_entry *e; + char dir[7 + SBE_IFACETMPL_SIZE + 1]; + + /* create a directory in the root procfs */ + snprintf(dir, sizeof(dir), "driver/%s", ci->devname); + ci->dir_dev = proc_mkdir(dir, NULL); + if (!ci->dir_dev) + { + printk (KERN_ERR "%s: Unable to create directory /proc/driver/%s\n", + THIS_MODULE->name, ci->devname); + goto fail; + } + e = create_proc_read_entry ("info", S_IFREG | S_IRUGO, + ci->dir_dev, sbecom_proc_get_sbe_info, ci); + if (!e) + { + printk (KERN_ERR "%s: Unable to create entry /proc/driver/%s/info\n", + THIS_MODULE->name, ci->devname); + goto fail; + } + return 0; + +fail: + sbecom_proc_brd_cleanup (ci); + return 1; +} + +#else /*** ! CONFIG_PROC_FS ***/ + +/* stubbed off dummy routines */ + +void +sbecom_proc_brd_cleanup (ci_t * ci) +{ +} + +int __init +sbecom_proc_brd_init (ci_t * ci) +{ + return 0; +} + +#endif /*** CONFIG_PROC_FS ***/ + + +/*** End-of-File ***/ diff --git a/drivers/staging/cxt1e1/sbeproc.h b/drivers/staging/cxt1e1/sbeproc.h new file mode 100644 index 000000000000..4aa53f44ec0b --- /dev/null +++ b/drivers/staging/cxt1e1/sbeproc.h @@ -0,0 +1,52 @@ +/* + * $Id: sbeproc.h,v 1.2 2005/10/17 23:55:28 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_SBEPROC_H_ +#define _INC_SBEPROC_H_ + +/*----------------------------------------------------------------------------- + * sbeproc.h - + * + * Copyright (C) 2004-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.2 $ + * Last changed on $Date: 2005/10/17 23:55:28 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: sbeproc.h,v $ + * Revision 1.2 2005/10/17 23:55:28 rickd + * sbecom_proc_brd_init() is an declared an __init function. + * + * Revision 1.1 2005/09/28 00:10:09 rickd + * Remove unneeded inclusion of c4_private.h. + * + * Revision 1.0 2005/05/10 22:21:46 rickd + * Initial check-in. + * + *----------------------------------------------------------------------------- + */ + + +#ifdef CONFIG_PROC_FS +#ifdef __KERNEL__ +void sbecom_proc_brd_cleanup (ci_t *); +int __init sbecom_proc_brd_init (ci_t *); + +#endif /*** __KERNEL__ ***/ +#endif /*** CONFIG_PROC_FS ***/ +#endif /*** _INC_SBEPROC_H_ ***/ diff --git a/drivers/staging/cxt1e1/sbew_ioc.h b/drivers/staging/cxt1e1/sbew_ioc.h new file mode 100644 index 000000000000..14d371904d1f --- /dev/null +++ b/drivers/staging/cxt1e1/sbew_ioc.h @@ -0,0 +1,136 @@ +/* + * $Id: sbew_ioc.h,v 1.0 2005/09/28 00:10:10 rickd PMCC4_3_1B $ + */ + +#ifndef _INC_SBEWIOC_H_ +#define _INC_SBEWIOC_H_ + +/*----------------------------------------------------------------------------- + * sbew_ioc.h - + * + * Copyright (C) 2002-2005 SBE, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * For further information, contact via email: support@sbei.com + * SBE, Inc. San Ramon, California U.S.A. + * + *----------------------------------------------------------------------------- + * RCS info: + * RCS revision: $Revision: 1.0 $ + * Last changed on $Date: 2005/09/28 00:10:10 $ + * Changed by $Author: rickd $ + *----------------------------------------------------------------------------- + * $Log: sbew_ioc.h,v $ + * Revision 1.0 2005/09/28 00:10:10 rickd + * Initial revision + * + * Revision 1.6 2005/01/11 18:41:01 rickd + * Add BRDADDR_GET Ioctl. + * + * Revision 1.5 2004/09/16 18:55:59 rickd + * Start setting up for generic framer configuration Ioctl by switch + * from tect3_framer_param[] to sbecom_framer_param[]. + * + * Revision 1.4 2004/06/28 17:58:15 rickd + * Rename IOC_TSMAP_[GS] to IOC_TSIOC_[GS] to support need for + * multiple formats of data when setting up TimeSlots. + * + * Revision 1.3 2004/06/22 21:18:13 rickd + * read_vec now() ONLY handles a single common wrt_vec array. + * + * Revision 1.1 2004/06/10 18:11:34 rickd + * Add IID_GET Ioctl reference. + * + * Revision 1.0 2004/06/08 22:59:38 rickd + * Initial revision + * + * Revision 2.0 2004/06/07 17:49:47 rickd + * Initial library release following merge of wanc1t3/wan256 into + * common elements for lib. + * + *----------------------------------------------------------------------------- + */ + +#ifndef __KERNEL__ +#include <sys/types.h> +#endif +#ifdef SunOS +#include <sys/ioccom.h> +#else +#include <linux/ioctl.h> +#endif + +#ifdef __cplusplus +extern "C" +{ +#endif + +#define SBE_LOCKFILE "/tmp/.sbewan.LCK" + +#define SBE_IOC_COOKIE 0x19780926 +#define SBE_IOC_MAGIC ('s') + +/* IOW write - data has to go into driver from application */ +/* IOR read - data has to be returned to application from driver */ + +/* + * Note: for an IOWR Ioctl, the read and write data do not have to + * be the same size, but the entity declared within the IOC must be + * the larger of the two. + */ + +#define SBE_IOC_LOGLEVEL _IOW(SBE_IOC_MAGIC, 0x00, int) +#define SBE_IOC_CHAN_NEW _IOW(SBE_IOC_MAGIC, 0x01,int) /* unused */ +#define SBE_IOC_CHAN_UP _IOW(SBE_IOC_MAGIC, 0x02,int) /* unused */ +#define SBE_IOC_CHAN_DOWN _IOW(SBE_IOC_MAGIC, 0x03,int) /* unused */ +#define SBE_IOC_CHAN_GET _IOWR(SBE_IOC_MAGIC,0x04, struct sbecom_chan_param) +#define SBE_IOC_CHAN_SET _IOW(SBE_IOC_MAGIC, 0x05, struct sbecom_chan_param) +#define SBE_IOC_CHAN_GET_STAT _IOWR(SBE_IOC_MAGIC,0x06, struct sbecom_chan_stats) +#define SBE_IOC_CHAN_DEL_STAT _IOW(SBE_IOC_MAGIC, 0x07, int) +#define SBE_IOC_PORTS_ENABLE _IOW(SBE_IOC_MAGIC, 0x0A, int) +#define SBE_IOC_PORT_GET _IOWR(SBE_IOC_MAGIC,0x0C, struct sbecom_port_param) +#define SBE_IOC_PORT_SET _IOW(SBE_IOC_MAGIC, 0x0D, struct sbecom_port_param) +#define SBE_IOC_READ_VEC _IOWR(SBE_IOC_MAGIC,0x10, struct sbecom_wrt_vec) +#define SBE_IOC_WRITE_VEC _IOWR(SBE_IOC_MAGIC,0x11, struct sbecom_wrt_vec) +#define SBE_IOC_GET_SN _IOR(SBE_IOC_MAGIC, 0x12, u_int32_t) +#define SBE_IOC_RESET_DEV _IOW(SBE_IOC_MAGIC, 0x13, int) +#define SBE_IOC_FRAMER_GET _IOWR(SBE_IOC_MAGIC,0x14, struct sbecom_framer_param) +#define SBE_IOC_FRAMER_SET _IOW(SBE_IOC_MAGIC, 0x15, struct sbecom_framer_param) +#define SBE_IOC_CARD_GET _IOR(SBE_IOC_MAGIC, 0x20, struct sbecom_card_param) +#define SBE_IOC_CARD_SET _IOW(SBE_IOC_MAGIC, 0x21, struct sbecom_card_param) +#define SBE_IOC_CARD_GET_STAT _IOR(SBE_IOC_MAGIC, 0x22, struct temux_card_stats) +#define SBE_IOC_CARD_DEL_STAT _IO(SBE_IOC_MAGIC, 0x23) +#define SBE_IOC_CARD_CHAN_STAT _IOR(SBE_IOC_MAGIC, 0x24, struct sbecom_chan_stats) +#define SBE_IOC_CARD_BLINK _IOW(SBE_IOC_MAGIC, 0x30, int) +#define SBE_IOC_DRVINFO_GET _IOWR(SBE_IOC_MAGIC,0x31, struct sbe_drv_info) +#define SBE_IOC_BRDINFO_GET _IOR(SBE_IOC_MAGIC, 0x32, struct sbe_brd_info) +#define SBE_IOC_IID_GET _IOWR(SBE_IOC_MAGIC,0x33, struct sbe_iid_info) +#define SBE_IOC_BRDADDR_GET _IOWR(SBE_IOC_MAGIC, 0x34, struct sbe_brd_addr) + +#ifdef NOT_YET_COMMON +#define SBE_IOC_TSIOC_GET _IOWR(SBE_IOC_MAGIC,0x16, struct wanc1t3_ts_param) +#define SBE_IOC_TSIOC_SET _IOW(SBE_IOC_MAGIC, 0x17, struct wanc1t3_ts_param) +#endif + +/* + * Restrict SBE_IOC_WRITE_VEC & READ_VEC to a single parameter pair, application + * then must issue multiple Ioctls for large blocks of contiguous data. + */ + +#define SBE_IOC_MAXVEC 1 + + +#ifdef __cplusplus +} +#endif + +#endif /*** _INC_SBEWIOC_H_ ***/ diff --git a/drivers/staging/dream/Kconfig b/drivers/staging/dream/Kconfig index 4afa081c870c..707cc71a8a6a 100644 --- a/drivers/staging/dream/Kconfig +++ b/drivers/staging/dream/Kconfig @@ -1,16 +1,14 @@ config DREAM - tristate "HTC Dream support" - depends on BROKEN + tristate "HTC Dream support" + depends on MACH_TROUT +if DREAM source "drivers/staging/dream/smd/Kconfig" source "drivers/staging/dream/camera/Kconfig" - config INPUT_GPIO tristate "GPIO driver support" help Say Y here if you want to support gpio based keys, wheels etc... - - - +endif diff --git a/drivers/staging/dream/Makefile b/drivers/staging/dream/Makefile index 2b7915197078..43d1eec8e257 100644 --- a/drivers/staging/dream/Makefile +++ b/drivers/staging/dream/Makefile @@ -1,3 +1,4 @@ +EXTRA_CFLAGS=-Idrivers/staging/dream/include obj-$(CONFIG_MSM_ADSP) += qdsp5/ smd/ obj-$(CONFIG_MSM_CAMERA) += camera/ obj-$(CONFIG_INPUT_GPIO) += gpio_axis.o gpio_event.o gpio_input.o gpio_matrix.o gpio_output.o diff --git a/drivers/staging/dream/TODO b/drivers/staging/dream/TODO index c07c8803f07c..dcd3ba808655 100644 --- a/drivers/staging/dream/TODO +++ b/drivers/staging/dream/TODO @@ -1,4 +1,3 @@ -* remove support for wakelocks since those are not in mainline * camera driver uses old V4L API diff --git a/drivers/staging/dream/qdsp5/audio_out.c b/drivers/staging/dream/qdsp5/audio_out.c index fe7809dd4401..76d7fa5667d5 100644 --- a/drivers/staging/dream/qdsp5/audio_out.c +++ b/drivers/staging/dream/qdsp5/audio_out.c @@ -182,9 +182,6 @@ struct audio { int stopped; /* set when stopped, cleared on flush */ unsigned volume; - struct wake_lock wakelock; - struct wake_lock idlelock; - int adrc_enable; struct adrc_filter adrc; @@ -198,14 +195,10 @@ struct audio { static void audio_prevent_sleep(struct audio *audio) { printk(KERN_INFO "++++++++++++++++++++++++++++++\n"); - wake_lock(&audio->wakelock); - wake_lock(&audio->idlelock); } static void audio_allow_sleep(struct audio *audio) { - wake_unlock(&audio->wakelock); - wake_unlock(&audio->idlelock); printk(KERN_INFO "------------------------------\n"); } @@ -840,8 +833,6 @@ static int __init audio_init(void) mutex_init(&the_audio.write_lock); spin_lock_init(&the_audio.dsp_lock); init_waitqueue_head(&the_audio.wait); - wake_lock_init(&the_audio.wakelock, WAKE_LOCK_SUSPEND, "audio_pcm"); - wake_lock_init(&the_audio.idlelock, WAKE_LOCK_IDLE, "audio_pcm_idle"); return (misc_register(&audio_misc) || misc_register(&audpp_misc)); } diff --git a/drivers/staging/dream/smd/smd_rpcrouter_servers.c b/drivers/staging/dream/smd/smd_rpcrouter_servers.c index 1b152abb2783..bec3ee9371b3 100644 --- a/drivers/staging/dream/smd/smd_rpcrouter_servers.c +++ b/drivers/staging/dream/smd/smd_rpcrouter_servers.c @@ -42,7 +42,6 @@ static struct msm_rpc_endpoint *endpoint; static LIST_HEAD(rpc_server_list); static DEFINE_MUTEX(rpc_server_list_lock); static int rpc_servers_active; -static struct wake_lock rpc_servers_wake_lock; static void rpc_server_register(struct msm_rpc_server *server) { @@ -136,10 +135,8 @@ static int rpc_servers_thread(void *data) int rc; for (;;) { - wake_unlock(&rpc_servers_wake_lock); rc = wait_event_interruptible(endpoint->wait_q, !list_empty(&endpoint->read_q)); - wake_lock(&rpc_servers_wake_lock); rc = msm_rpc_read(endpoint, &buffer, -1, -1); if (rc < 0) { printk(KERN_ERR "%s: could not read: %d\n", @@ -219,7 +216,6 @@ static struct platform_driver rpcservers_driver = { static int __init rpc_servers_init(void) { - wake_lock_init(&rpc_servers_wake_lock, WAKE_LOCK_SUSPEND, "rpc_server"); return platform_driver_register(&rpcservers_driver); } diff --git a/drivers/staging/dt3155/allocator.c b/drivers/staging/dt3155/allocator.c index db382ef90217..bd5adbc2a238 100644 --- a/drivers/staging/dt3155/allocator.c +++ b/drivers/staging/dt3155/allocator.c @@ -45,7 +45,6 @@ # define MODULE #endif -#include <linux/version.h> #include <linux/sched.h> #include <linux/kernel.h> @@ -59,6 +58,8 @@ #include <asm/page.h> +#include "allocator.h" + /*#define ALL_DEBUG*/ #define ALL_MSG "allocator: " @@ -84,9 +85,9 @@ /*#define PDEBUGG(fmt, args...) printk( KERN_DEBUG ALL_MSG fmt, ## args)*/ -int allocator_himem = 1; /* 0 = probe, pos. = megs, neg. = disable */ -int allocator_step = 1; /* This is the step size in MB */ -int allocator_probe = 1; /* This is a flag -- 1=probe, 0=don't probe */ +static int allocator_himem = 1; /* 0 = probe, pos. = megs, neg. = disable */ +static int allocator_step = 1; /* This is the step size in MB */ +static int allocator_probe = 1; /* This is a flag -- 1=probe, 0=don't probe */ static unsigned long allocator_buffer; /* physical address */ static unsigned long allocator_buffer_size; /* kilobytes */ @@ -102,8 +103,7 @@ struct allocator_struct { struct allocator_struct *next; }; -struct allocator_struct *allocator_list; - +static struct allocator_struct *allocator_list; #ifdef ALL_DEBUG static int dump_list(void) @@ -125,7 +125,7 @@ static int dump_list(void) * be used straight ahead for DMA, but needs remapping for program use). */ -unsigned long allocator_allocate_dma(unsigned long kilobytes, int prio) +unsigned long allocator_allocate_dma(unsigned long kilobytes, gfp_t flags) { struct allocator_struct *ptr = allocator_list, *newptr; unsigned long bytes = kilobytes << 10; @@ -148,7 +148,7 @@ unsigned long allocator_allocate_dma(unsigned long kilobytes, int prio) PDEBUG("alloc failed\n"); return 0; /* end of list */ } - newptr = kmalloc(sizeof(struct allocator_struct), prio); + newptr = kmalloc(sizeof(struct allocator_struct), flags); if (!newptr) return 0; diff --git a/drivers/staging/dt3155/allocator.h b/drivers/staging/dt3155/allocator.h index bdf3268ca52d..425b70fcd500 100644 --- a/drivers/staging/dt3155/allocator.h +++ b/drivers/staging/dt3155/allocator.h @@ -22,7 +22,7 @@ * */ -void allocator_free_dma(unsigned long address); -unsigned long allocator_allocate_dma(unsigned long kilobytes, int priority); +int allocator_free_dma(unsigned long address); +unsigned long allocator_allocate_dma(unsigned long kilobytes, gfp_t flags); int allocator_init(u32 *); void allocator_cleanup(void); diff --git a/drivers/staging/dt3155/dt3155.h b/drivers/staging/dt3155/dt3155.h index 1bf786364eec..793e2fcf4466 100644 --- a/drivers/staging/dt3155/dt3155.h +++ b/drivers/staging/dt3155/dt3155.h @@ -34,19 +34,9 @@ MA 02111-1307 USA #ifndef _DT3155_INC #define _DT3155_INC -#ifdef __KERNEL__ #include <linux/types.h> #include <linux/time.h> /* struct timeval */ -#else -#include <sys/ioctl.h> -#include <sys/param.h> -#include <sys/time.h> -#include <unistd.h> -#endif - -#define TRUE 1 -#define FALSE 0 /* Uncomment this for 50Hz CCIR */ #define CCIR 1 @@ -62,15 +52,15 @@ MA 02111-1307 USA #ifdef CCIR #define DT3155_MAX_ROWS 576 #define DT3155_MAX_COLS 768 -#define FORMAT50HZ TRUE +#define FORMAT50HZ 1 #else #define DT3155_MAX_ROWS 480 #define DT3155_MAX_COLS 640 -#define FORMAT50HZ FALSE +#define FORMAT50HZ 0 #endif /* Configuration structure */ -struct dt3155_config_s { +struct dt3155_config { u32 acq_mode; u32 cols, rows; u32 continuous; @@ -78,20 +68,20 @@ struct dt3155_config_s { /* hold data for each frame */ -typedef struct { +struct frame_info { u32 addr; /* address of the buffer with the frame */ u32 tag; /* unique number for the frame */ struct timeval time; /* time that capture took place */ -} frame_info_t; +}; /* * Structure for interrupt and buffer handling. * This is the setup for 1 card */ -struct dt3155_fbuffer_s { +struct dt3155_fbuffer { int nbuffers; - frame_info_t frame_info[BOARD_MAX_BUFFS]; + struct frame_info frame_info[BOARD_MAX_BUFFS]; int empty_buffers[BOARD_MAX_BUFFS]; /* indexes empty frames */ int empty_len; /* Number of empty buffers */ @@ -120,20 +110,20 @@ struct dt3155_fbuffer_s { #define DT3155_ACQ 2 /* There is one status structure for each card. */ -typedef struct dt3155_status_s { +struct dt3155_status { int fixed_mode; /* if 1, we are in fixed frame mode */ u32 reg_addr; /* Register address for a single card */ u32 mem_addr; /* Buffer start addr for this card */ u32 mem_size; /* This is the amount of mem available */ u32 irq; /* this card's irq */ - struct dt3155_config_s config; /* configuration struct */ - struct dt3155_fbuffer_s fbuffer; /* frame buffer state struct */ + struct dt3155_config config; /* configuration struct */ + struct dt3155_fbuffer fbuffer; /* frame buffer state struct */ u32 state; /* this card's state */ u32 device_installed; /* Flag if installed. 1=installed */ -} dt3155_status_t; +}; /* Reference to global status structure */ -extern struct dt3155_status_s dt3155_status[MAXBOARDS]; +extern struct dt3155_status dt3155_status[MAXBOARDS]; #define DT3155_STATE_IDLE 0x00 #define DT3155_STATE_FRAME 0x01 @@ -144,8 +134,8 @@ extern struct dt3155_status_s dt3155_status[MAXBOARDS]; #define DT3155_IOC_MAGIC '!' -#define DT3155_SET_CONFIG _IOW(DT3155_IOC_MAGIC, 1, struct dt3155_config_s) -#define DT3155_GET_CONFIG _IOR(DT3155_IOC_MAGIC, 2, struct dt3155_status_s) +#define DT3155_SET_CONFIG _IOW(DT3155_IOC_MAGIC, 1, struct dt3155_config) +#define DT3155_GET_CONFIG _IOR(DT3155_IOC_MAGIC, 2, struct dt3155_status) #define DT3155_STOP _IO(DT3155_IOC_MAGIC, 3) #define DT3155_START _IO(DT3155_IOC_MAGIC, 4) #define DT3155_FLUSH _IO(DT3155_IOC_MAGIC, 5) @@ -160,12 +150,12 @@ extern struct dt3155_status_s dt3155_status[MAXBOARDS]; #define DT_ERR_MASK 0xff0000/* not used but it might be one day */ /* User code will probably want to declare one of these for each card */ -typedef struct dt3155_read_s { +struct dt3155_read { u32 offset; u32 frame_seq; u32 state; - frame_info_t frame_info; -} dt3155_read_t; + struct frame_info frame_info; +}; #endif /* _DT3155_inc */ diff --git a/drivers/staging/dt3155/dt3155_drv.c b/drivers/staging/dt3155/dt3155_drv.c index 7ac2c6d8e9a3..40ef97f3feb5 100644 --- a/drivers/staging/dt3155/dt3155_drv.c +++ b/drivers/staging/dt3155/dt3155_drv.c @@ -63,6 +63,7 @@ extern void printques(int); #include <linux/types.h> #include <linux/poll.h> #include <linux/sched.h> +#include <linux/smp_lock.h> #include <asm/io.h> #include <asm/uaccess.h> @@ -94,7 +95,7 @@ int dt3155_errno = 0; #endif /* wait queue for interrupts */ -wait_queue_head_t dt3155_read_wait_queue[ MAXBOARDS ]; +wait_queue_head_t dt3155_read_wait_queue[MAXBOARDS]; #define DT_3155_SUCCESS 0 #define DT_3155_FAILURE -EIO @@ -111,10 +112,10 @@ int dt3155_major = 0; /* Global structures and variables */ /* Status of each device */ -struct dt3155_status_s dt3155_status[ MAXBOARDS ]; +struct dt3155_status dt3155_status[MAXBOARDS]; /* kernel logical address of the board */ -u8 *dt3155_lbase[ MAXBOARDS ] = { NULL +u8 *dt3155_lbase[MAXBOARDS] = { NULL #if MAXBOARDS == 2 , NULL #endif @@ -122,7 +123,7 @@ u8 *dt3155_lbase[ MAXBOARDS ] = { NULL /* DT3155 registers */ u8 *dt3155_bbase = NULL; /* kernel logical address of the * * buffer region */ -u32 dt3155_dev_open[ MAXBOARDS ] = {0 +u32 dt3155_dev_open[MAXBOARDS] = {0 #if MAXBOARDS == 2 , 0 #endif @@ -141,17 +142,17 @@ static void quick_stop (int minor) { // TODO: scott was here #if 1 - ReadMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg); + ReadMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg); /* disable interrupts */ int_csr_r.fld.FLD_END_EVE_EN = 0; int_csr_r.fld.FLD_END_ODD_EN = 0; - WriteMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); + WriteMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg); - dt3155_status[ minor ].state &= ~(DT3155_STATE_STOP|0xff); + dt3155_status[minor].state &= ~(DT3155_STATE_STOP|0xff); /* mark the system stopped: */ - dt3155_status[ minor ].state |= DT3155_STATE_IDLE; - dt3155_fbuffer[ minor ]->stop_acquire = 0; - dt3155_fbuffer[ minor ]->even_stopped = 0; + dt3155_status[minor].state |= DT3155_STATE_IDLE; + dt3155_fbuffer[minor]->stop_acquire = 0; + dt3155_fbuffer[minor]->even_stopped = 0; #else dt3155_status[minor].state |= DT3155_STATE_STOP; dt3155_status[minor].fbuffer.stop_acquire = 1; @@ -167,7 +168,7 @@ static void quick_stop (int minor) * - Assumes irq's are disabled, via SA_INTERRUPT flag * being set in request_irq() call from init_module() *****************************************************/ -static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs ) +static void dt3155_isr(int irq, void *dev_id, struct pt_regs *regs) { int minor = -1; int index; @@ -175,8 +176,8 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs ) u32 buffer_addr; /* find out who issued the interrupt */ - for ( index = 0; index < ndevices; index++ ) { - if( dev_id == (void*) &dt3155_status[ index ]) + for (index = 0; index < ndevices; index++) { + if(dev_id == (void*) &dt3155_status[index]) { minor = index; break; @@ -184,15 +185,15 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs ) } /* hopefully we should not get here */ - if ( minor < 0 || minor >= MAXBOARDS ) { + if (minor < 0 || minor >= MAXBOARDS) { printk(KERN_ERR "dt3155_isr called with invalid dev_id\n"); return; } /* Check for corruption and set a flag if so */ - ReadMReg( (dt3155_lbase[ minor ] + CSR1), csr1_r.reg ); + ReadMReg((dt3155_lbase[minor] + CSR1), csr1_r.reg); - if ( (csr1_r.fld.FLD_CRPT_EVE) || (csr1_r.fld.FLD_CRPT_ODD) ) + if ((csr1_r.fld.FLD_CRPT_EVE) || (csr1_r.fld.FLD_CRPT_ODD)) { /* TODO: this should probably stop acquisition */ /* and set some flags so that dt3155_read */ @@ -202,27 +203,27 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs ) return; } - ReadMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg); + ReadMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg); /* Handle the even field ... */ if (int_csr_r.fld.FLD_END_EVE) { - if ( (dt3155_status[ minor ].state & DT3155_STATE_MODE) == - DT3155_STATE_FLD ) + if ((dt3155_status[minor].state & DT3155_STATE_MODE) == + DT3155_STATE_FLD) { - dt3155_fbuffer[ minor ]->frame_count++; + dt3155_fbuffer[minor]->frame_count++; } - ReadI2C(dt3155_lbase[ minor ], EVEN_CSR, &i2c_even_csr.reg); + ReadI2C(dt3155_lbase[minor], EVEN_CSR, &i2c_even_csr.reg); /* Clear the interrupt? */ int_csr_r.fld.FLD_END_EVE = 1; /* disable the interrupt if last field */ - if (dt3155_fbuffer[ minor ]->stop_acquire) + if (dt3155_fbuffer[minor]->stop_acquire) { printk("dt3155: even stopped.\n"); - dt3155_fbuffer[ minor ]->even_stopped = 1; + dt3155_fbuffer[minor]->even_stopped = 1; if (i2c_even_csr.fld.SNGL_EVE) { int_csr_r.fld.FLD_END_EVE_EN = 0; @@ -233,75 +234,75 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs ) } } - WriteMReg( (dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); + WriteMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg); /* Set up next DMA if we are doing FIELDS */ - if ( (dt3155_status[ minor ].state & DT3155_STATE_MODE ) == + if ((dt3155_status[minor].state & DT3155_STATE_MODE) == DT3155_STATE_FLD) { /* GCS (Aug 2, 2002) -- In field mode, dma the odd field into the lower half of the buffer */ - const u32 stride = dt3155_status[ minor ].config.cols; - buffer_addr = dt3155_fbuffer[ minor ]-> - frame_info[ dt3155_fbuffer[ minor ]->active_buf ].addr + const u32 stride = dt3155_status[minor].config.cols; + buffer_addr = dt3155_fbuffer[minor]-> + frame_info[dt3155_fbuffer[minor]->active_buf].addr + (DT3155_MAX_ROWS / 2) * stride; local_save_flags(flags); local_irq_disable(); - wake_up_interruptible( &dt3155_read_wait_queue[ minor ] ); + wake_up_interruptible(&dt3155_read_wait_queue[minor]); /* Set up the DMA address for the next field */ local_irq_restore(flags); - WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_START), buffer_addr); + WriteMReg((dt3155_lbase[minor] + ODD_DMA_START), buffer_addr); } /* Check for errors. */ i2c_even_csr.fld.DONE_EVE = 1; - if ( i2c_even_csr.fld.ERROR_EVE ) + if (i2c_even_csr.fld.ERROR_EVE) dt3155_errno = DT_ERR_OVERRUN; - WriteI2C( dt3155_lbase[ minor ], EVEN_CSR, i2c_even_csr.reg ); + WriteI2C(dt3155_lbase[minor], EVEN_CSR, i2c_even_csr.reg); /* Note that we actually saw an even field meaning */ /* that subsequent odd field complete the frame */ - dt3155_fbuffer[ minor ]->even_happened = 1; + dt3155_fbuffer[minor]->even_happened = 1; /* recording the time that the even field finished, this should be */ /* about time in the middle of the frame */ - do_gettimeofday( &(dt3155_fbuffer[ minor ]-> - frame_info[ dt3155_fbuffer[ minor ]-> - active_buf ].time) ); + do_gettimeofday(&(dt3155_fbuffer[minor]-> + frame_info[dt3155_fbuffer[minor]-> + active_buf].time)); return; } /* ... now handle the odd field */ - if ( int_csr_r.fld.FLD_END_ODD ) + if (int_csr_r.fld.FLD_END_ODD) { - ReadI2C( dt3155_lbase[ minor ], ODD_CSR, &i2c_odd_csr.reg ); + ReadI2C(dt3155_lbase[minor], ODD_CSR, &i2c_odd_csr.reg); /* Clear the interrupt? */ int_csr_r.fld.FLD_END_ODD = 1; - if (dt3155_fbuffer[ minor ]->even_happened || - (dt3155_status[ minor ].state & DT3155_STATE_MODE) == + if (dt3155_fbuffer[minor]->even_happened || + (dt3155_status[minor].state & DT3155_STATE_MODE) == DT3155_STATE_FLD) { - dt3155_fbuffer[ minor ]->frame_count++; + dt3155_fbuffer[minor]->frame_count++; } - if ( dt3155_fbuffer[ minor ]->stop_acquire && - dt3155_fbuffer[ minor ]->even_stopped ) + if (dt3155_fbuffer[minor]->stop_acquire && + dt3155_fbuffer[minor]->even_stopped) { printk(KERN_DEBUG "dt3155: stopping odd..\n"); - if ( i2c_odd_csr.fld.SNGL_ODD ) + if (i2c_odd_csr.fld.SNGL_ODD) { /* disable interrupts */ int_csr_r.fld.FLD_END_ODD_EN = 0; - dt3155_status[ minor ].state &= ~(DT3155_STATE_STOP|0xff); + dt3155_status[minor].state &= ~(DT3155_STATE_STOP|0xff); /* mark the system stopped: */ - dt3155_status[ minor ].state |= DT3155_STATE_IDLE; - dt3155_fbuffer[ minor ]->stop_acquire = 0; - dt3155_fbuffer[ minor ]->even_stopped = 0; + dt3155_status[minor].state |= DT3155_STATE_IDLE; + dt3155_fbuffer[minor]->stop_acquire = 0; + dt3155_fbuffer[minor]->even_stopped = 0; printk(KERN_DEBUG "dt3155: state is now %x\n", dt3155_status[minor].state); @@ -312,104 +313,104 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs ) } } - WriteMReg( (dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); + WriteMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg); /* if the odd field has been acquired, then */ /* change the next dma location for both fields */ /* and wake up the process if sleeping */ - if ( dt3155_fbuffer[ minor ]->even_happened || - (dt3155_status[ minor ].state & DT3155_STATE_MODE) == - DT3155_STATE_FLD ) + if (dt3155_fbuffer[minor]->even_happened || + (dt3155_status[minor].state & DT3155_STATE_MODE) == + DT3155_STATE_FLD) { local_save_flags(flags); local_irq_disable(); #ifdef DEBUG_QUES_B - printques( minor ); + printques(minor); #endif - if ( dt3155_fbuffer[ minor ]->nbuffers > 2 ) + if (dt3155_fbuffer[minor]->nbuffers > 2) { - if ( !are_empty_buffers( minor ) ) + if (!are_empty_buffers(minor)) { /* The number of active + locked buffers is * at most 2, and since there are none empty, there * must be at least nbuffers-2 ready buffers. * This is where we 'drop frames', oldest first. */ - push_empty( pop_ready( minor ), minor ); + push_empty(pop_ready(minor), minor); } /* The ready_que can't be full, since we know * there is one active buffer right now, so it's safe * to push the active buf on the ready_que. */ - push_ready( minor, dt3155_fbuffer[ minor ]->active_buf ); + push_ready(minor, dt3155_fbuffer[minor]->active_buf); /* There's at least 1 empty -- make it active */ - dt3155_fbuffer[ minor ]->active_buf = pop_empty( minor ); - dt3155_fbuffer[ minor ]-> - frame_info[ dt3155_fbuffer[ minor ]-> - active_buf ].tag = ++unique_tag; + dt3155_fbuffer[minor]->active_buf = pop_empty(minor); + dt3155_fbuffer[minor]-> + frame_info[dt3155_fbuffer[minor]-> + active_buf].tag = ++unique_tag; } else /* nbuffers == 2, special case */ { /* There is 1 active buffer. * If there is a locked buffer, keep the active buffer * the same -- that means we drop a frame. */ - if ( dt3155_fbuffer[ minor ]->locked_buf < 0 ) + if (dt3155_fbuffer[minor]->locked_buf < 0) { - push_ready( minor, - dt3155_fbuffer[ minor ]->active_buf ); - if (are_empty_buffers( minor ) ) + push_ready(minor, + dt3155_fbuffer[minor]->active_buf); + if (are_empty_buffers(minor)) { - dt3155_fbuffer[ minor ]->active_buf = - pop_empty( minor ); + dt3155_fbuffer[minor]->active_buf = + pop_empty(minor); } else { /* no empty or locked buffers, so use a readybuf */ - dt3155_fbuffer[ minor ]->active_buf = - pop_ready( minor ); + dt3155_fbuffer[minor]->active_buf = + pop_ready(minor); } } } #ifdef DEBUG_QUES_B - printques( minor ); + printques(minor); #endif - dt3155_fbuffer[ minor ]->even_happened = 0; + dt3155_fbuffer[minor]->even_happened = 0; - wake_up_interruptible( &dt3155_read_wait_queue[ minor ] ); + wake_up_interruptible(&dt3155_read_wait_queue[minor]); local_irq_restore(flags); } /* Set up the DMA address for the next frame/field */ - buffer_addr = dt3155_fbuffer[ minor ]-> - frame_info[ dt3155_fbuffer[ minor ]->active_buf ].addr; - if ( (dt3155_status[ minor ].state & DT3155_STATE_MODE) == - DT3155_STATE_FLD ) + buffer_addr = dt3155_fbuffer[minor]-> + frame_info[dt3155_fbuffer[minor]->active_buf].addr; + if ((dt3155_status[minor].state & DT3155_STATE_MODE) == + DT3155_STATE_FLD) { - WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), buffer_addr); + WriteMReg((dt3155_lbase[minor] + EVEN_DMA_START), buffer_addr); } else { - WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), buffer_addr); + WriteMReg((dt3155_lbase[minor] + EVEN_DMA_START), buffer_addr); - WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_START), buffer_addr - + dt3155_status[ minor ].config.cols); + WriteMReg((dt3155_lbase[minor] + ODD_DMA_START), buffer_addr + + dt3155_status[minor].config.cols); } /* Do error checking */ i2c_odd_csr.fld.DONE_ODD = 1; - if ( i2c_odd_csr.fld.ERROR_ODD ) + if (i2c_odd_csr.fld.ERROR_ODD) dt3155_errno = DT_ERR_OVERRUN; - WriteI2C(dt3155_lbase[ minor ], ODD_CSR, i2c_odd_csr.reg ); + WriteI2C(dt3155_lbase[minor], ODD_CSR, i2c_odd_csr.reg); return; } /* If we get here, the Odd Field wasn't it either... */ - printk( "neither even nor odd. shared perhaps?\n"); + printk("neither even nor odd. shared perhaps?\n"); } /***************************************************** @@ -420,22 +421,22 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs ) *****************************************************/ static void dt3155_init_isr(int minor) { - const u32 stride = dt3155_status[ minor ].config.cols; + const u32 stride = dt3155_status[minor].config.cols; - switch (dt3155_status[ minor ].state & DT3155_STATE_MODE) + switch (dt3155_status[minor].state & DT3155_STATE_MODE) { case DT3155_STATE_FLD: { - even_dma_start_r = dt3155_status[ minor ]. - fbuffer.frame_info[ dt3155_status[ minor ].fbuffer.active_buf ].addr; + even_dma_start_r = dt3155_status[minor]. + fbuffer.frame_info[dt3155_status[minor].fbuffer.active_buf].addr; even_dma_stride_r = 0; odd_dma_stride_r = 0; - WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), + WriteMReg((dt3155_lbase[minor] + EVEN_DMA_START), even_dma_start_r); - WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_STRIDE), + WriteMReg((dt3155_lbase[minor] + EVEN_DMA_STRIDE), even_dma_stride_r); - WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_STRIDE), + WriteMReg((dt3155_lbase[minor] + ODD_DMA_STRIDE), odd_dma_stride_r); break; } @@ -443,19 +444,19 @@ static void dt3155_init_isr(int minor) case DT3155_STATE_FRAME: default: { - even_dma_start_r = dt3155_status[ minor ]. - fbuffer.frame_info[ dt3155_status[ minor ].fbuffer.active_buf ].addr; + even_dma_start_r = dt3155_status[minor]. + fbuffer.frame_info[dt3155_status[minor].fbuffer.active_buf].addr; odd_dma_start_r = even_dma_start_r + stride; even_dma_stride_r = stride; odd_dma_stride_r = stride; - WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), + WriteMReg((dt3155_lbase[minor] + EVEN_DMA_START), even_dma_start_r); - WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_START), + WriteMReg((dt3155_lbase[minor] + ODD_DMA_START), odd_dma_start_r); - WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_STRIDE), + WriteMReg((dt3155_lbase[minor] + EVEN_DMA_STRIDE), even_dma_stride_r); - WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_STRIDE), + WriteMReg((dt3155_lbase[minor] + ODD_DMA_STRIDE), odd_dma_stride_r); break; } @@ -464,9 +465,9 @@ static void dt3155_init_isr(int minor) /* 50/60 Hz should be set before this point but let's make sure it is */ /* right anyway */ - ReadI2C(dt3155_lbase[ minor ], CSR2, &i2c_csr2.reg); + ReadI2C(dt3155_lbase[minor], CSR2, &i2c_csr2.reg); i2c_csr2.fld.HZ50 = FORMAT50HZ; - WriteI2C(dt3155_lbase[ minor ], CSR2, i2c_csr2.reg); + WriteI2C(dt3155_lbase[minor], CSR2, i2c_csr2.reg); /* enable busmaster chip, clear flags */ @@ -486,7 +487,7 @@ static void dt3155_init_isr(int minor) csr1_r.fld.FLD_CRPT_EVE = 1; /* writing a 1 clears flags */ csr1_r.fld.FLD_CRPT_ODD = 1; - WriteMReg((dt3155_lbase[ minor ] + CSR1),csr1_r.reg); + WriteMReg((dt3155_lbase[minor] + CSR1),csr1_r.reg); /* Enable interrupts at the end of each field */ @@ -495,14 +496,14 @@ static void dt3155_init_isr(int minor) int_csr_r.fld.FLD_END_ODD_EN = 1; int_csr_r.fld.FLD_START_EN = 0; - WriteMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg); + WriteMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg); /* start internal BUSY bits */ - ReadI2C(dt3155_lbase[ minor ], CSR2, &i2c_csr2.reg); + ReadI2C(dt3155_lbase[minor], CSR2, &i2c_csr2.reg); i2c_csr2.fld.BUSY_ODD = 1; i2c_csr2.fld.BUSY_EVE = 1; - WriteI2C(dt3155_lbase[ minor ], CSR2, i2c_csr2.reg); + WriteI2C(dt3155_lbase[minor], CSR2, i2c_csr2.reg); /* Now its up to the interrupt routine!! */ @@ -521,7 +522,7 @@ static int dt3155_ioctl(struct inode *inode, { int minor = MINOR(inode->i_rdev); /* What device are we ioctl()'ing? */ - if ( minor >= MAXBOARDS || minor < 0 ) + if (minor >= MAXBOARDS || minor < 0) return -ENODEV; /* make sure it is valid command */ @@ -545,7 +546,7 @@ static int dt3155_ioctl(struct inode *inode, return -EBUSY; { - struct dt3155_config_s tmp; + struct dt3155_config tmp; if (copy_from_user((void *)&tmp, (void *) arg, sizeof(tmp))) return -EFAULT; /* check for valid settings */ @@ -565,7 +566,7 @@ static int dt3155_ioctl(struct inode *inode, case DT3155_GET_CONFIG: { if (copy_to_user((void *) arg, (void *) &dt3155_status[minor], - sizeof(dt3155_status_t) )) + sizeof(struct dt3155_status))) return -EFAULT; return 0; } @@ -586,7 +587,7 @@ static int dt3155_ioctl(struct inode *inode, quick_stop(minor); if (copy_to_user((void *) arg, (void *) &dt3155_status[minor], - sizeof(dt3155_status_t))) + sizeof(struct dt3155_status))) return -EFAULT; return 0; } @@ -609,8 +610,8 @@ static int dt3155_ioctl(struct inode *inode, } dt3155_init_isr(minor); - if (copy_to_user( (void *) arg, (void *) &dt3155_status[minor], - sizeof(dt3155_status_t))) + if (copy_to_user((void *) arg, (void *) &dt3155_status[minor], + sizeof(struct dt3155_status))) return -EFAULT; return 0; } @@ -681,36 +682,36 @@ static int dt3155_mmap (struct file * file, struct vm_area_struct * vma) * MOD_INC_USE_COUNT make sure that the driver memory is not freed * while the device is in use. *****************************************************/ -static int dt3155_open( struct inode* inode, struct file* filep) +static int dt3155_open(struct inode* inode, struct file* filep) { int minor = MINOR(inode->i_rdev); /* what device are we opening? */ - if (dt3155_dev_open[ minor ]) { + if (dt3155_dev_open[minor]) { printk ("DT3155: Already opened by another process.\n"); return -EBUSY; } - if (dt3155_status[ minor ].device_installed==0) + if (dt3155_status[minor].device_installed==0) { printk("DT3155 Open Error: No such device dt3155 minor number %d\n", minor); return -EIO; } - if (dt3155_status[ minor ].state != DT3155_STATE_IDLE) { + if (dt3155_status[minor].state != DT3155_STATE_IDLE) { printk ("DT3155: Not in idle state (state = %x)\n", - dt3155_status[ minor ].state); + dt3155_status[minor].state); return -EBUSY; } printk("DT3155: Device opened.\n"); - dt3155_dev_open[ minor ] = 1 ; + dt3155_dev_open[minor] = 1 ; - dt3155_flush( minor ); + dt3155_flush(minor); /* Disable ALL interrupts */ int_csr_r.reg = 0; - WriteMReg( (dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); + WriteMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg); init_waitqueue_head(&(dt3155_read_wait_queue[minor])); @@ -724,20 +725,20 @@ static int dt3155_open( struct inode* inode, struct file* filep) * Now decrement the use count. * *****************************************************/ -static int dt3155_close( struct inode *inode, struct file *filep) +static int dt3155_close(struct inode *inode, struct file *filep) { int minor; minor = MINOR(inode->i_rdev); /* which device are we closing */ - if (!dt3155_dev_open[ minor ]) + if (!dt3155_dev_open[minor]) { printk("DT3155: attempt to CLOSE a not OPEN device\n"); } else { - dt3155_dev_open[ minor ] = 0; + dt3155_dev_open[minor] = 0; - if (dt3155_status[ minor ].state != DT3155_STATE_IDLE) + if (dt3155_status[minor].state != DT3155_STATE_IDLE) { quick_stop(minor); } @@ -756,11 +757,11 @@ static ssize_t dt3155_read(struct file *filep, char __user *buf, int minor = MINOR(filep->f_dentry->d_inode->i_rdev); u32 offset; int frame_index; - frame_info_t *frame_info_p; + struct frame_info *frame_info; /* TODO: this should check the error flag and */ /* return an error on hardware failures */ - if (count != sizeof(dt3155_read_t)) + if (count != sizeof(struct dt3155_read)) { printk("DT3155 ERROR (NJC): count is not right\n"); return -EINVAL; @@ -781,7 +782,7 @@ static ssize_t dt3155_read(struct file *filep, char __user *buf, if (filep->f_flags & O_NDELAY) { if ((frame_index = dt3155_get_ready_buffer(minor)) < 0) { - /*printk( "dt3155: no buffers available (?)\n");*/ + /*printk("dt3155: no buffers available (?)\n");*/ /* printques(minor); */ return -EAGAIN; } @@ -806,21 +807,21 @@ static ssize_t dt3155_read(struct file *filep, char __user *buf, } } - frame_info_p = &dt3155_status[minor].fbuffer.frame_info[frame_index]; + frame_info = &dt3155_status[minor].fbuffer.frame_info[frame_index]; /* make this an offset */ - offset = frame_info_p->addr - dt3155_status[minor].mem_addr; + offset = frame_info->addr - dt3155_status[minor].mem_addr; put_user(offset, (unsigned int *) buf); buf += sizeof(u32); - put_user( dt3155_status[minor].fbuffer.frame_count, (unsigned int *) buf); + put_user(dt3155_status[minor].fbuffer.frame_count, (unsigned int *) buf); buf += sizeof(u32); put_user(dt3155_status[minor].state, (unsigned int *) buf); buf += sizeof(u32); - if (copy_to_user(buf, frame_info_p, sizeof(frame_info_t))) + if (copy_to_user(buf, frame_info, sizeof(*frame_info))) return -EFAULT; - return sizeof(dt3155_read_t); + return sizeof(struct dt3155_read); } static unsigned int dt3155_poll (struct file * filp, poll_table *wait) @@ -835,6 +836,17 @@ static unsigned int dt3155_poll (struct file * filp, poll_table *wait) return 0; } +static long +dt3155_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + int ret; + + lock_kernel(); + ret = dt3155_ioctl(file->f_path.dentry->d_inode, file, cmd, arg); + unlock_kernel(); + + return ret; +} /***************************************************** * file operations supported by DT3155 driver @@ -842,12 +854,12 @@ static unsigned int dt3155_poll (struct file * filp, poll_table *wait) * register_chrdev *****************************************************/ static struct file_operations dt3155_fops = { - read: dt3155_read, - ioctl: dt3155_ioctl, - mmap: dt3155_mmap, - poll: dt3155_poll, - open: dt3155_open, - release: dt3155_close + .read = dt3155_read, + .unlocked_ioctl = dt3155_unlocked_ioctl, + .mmap = dt3155_mmap, + .poll = dt3155_poll, + .open = dt3155_open, + .release = dt3155_close }; @@ -889,7 +901,7 @@ static int find_PCI (void) /* Now, just go out and make sure that this/these device(s) is/are actually mapped into the kernel address space */ - if ((error = pci_read_config_dword( pci_dev, PCI_BASE_ADDRESS_0, + if ((error = pci_read_config_dword(pci_dev, PCI_BASE_ADDRESS_0, (u32 *) &base))) { printk("DT3155: Was not able to find device \n"); @@ -901,26 +913,26 @@ static int find_PCI (void) /* Remap the base address to a logical address through which we * can access it. */ - dt3155_lbase[ pci_index - 1 ] = ioremap(base,PCI_PAGE_SIZE); - dt3155_status[ pci_index - 1 ].reg_addr = base; + dt3155_lbase[pci_index - 1] = ioremap(base,PCI_PAGE_SIZE); + dt3155_status[pci_index - 1].reg_addr = base; DT_3155_DEBUG_MSG("DT3155: New logical address is %p \n", dt3155_lbase[pci_index-1]); - if ( !dt3155_lbase[pci_index-1] ) + if (!dt3155_lbase[pci_index-1]) { printk("DT3155: Unable to remap control registers\n"); goto err; } - if ( (error = pci_read_config_byte( pci_dev, PCI_INTERRUPT_LINE, &irq)) ) + if ((error = pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &irq))) { printk("DT3155: Was not able to find device \n"); goto err; } DT_3155_DEBUG_MSG("DT3155: IRQ is %d \n",irq); - dt3155_status[ pci_index-1 ].irq = irq; + dt3155_status[pci_index-1].irq = irq; /* Set flag: kth device found! */ - dt3155_status[ pci_index-1 ].device_installed = 1; + dt3155_status[pci_index-1].device_installed = 1; printk("DT3155: Installing device %d w/irq %d and address %p\n", pci_index, dt3155_status[pci_index-1].irq, @@ -945,89 +957,89 @@ int init_module(void) { int index; int rcode = 0; - char *devname[ MAXBOARDS ]; + char *devname[MAXBOARDS]; - devname[ 0 ] = "dt3155a"; + devname[0] = "dt3155a"; #if MAXBOARDS == 2 - devname[ 1 ] = "dt3155b"; + devname[1] = "dt3155b"; #endif printk("DT3155: Loading module...\n"); /* Register the device driver */ - rcode = register_chrdev( dt3155_major, "dt3155", &dt3155_fops ); - if( rcode < 0 ) + rcode = register_chrdev(dt3155_major, "dt3155", &dt3155_fops); + if(rcode < 0) { - printk( KERN_INFO "DT3155: register_chrdev failed \n"); + printk(KERN_INFO "DT3155: register_chrdev failed \n"); return rcode; } - if( dt3155_major == 0 ) + if(dt3155_major == 0) dt3155_major = rcode; /* dynamic */ /* init the status variables. */ /* DMA memory is taken care of in setup_buffers() */ - for ( index = 0; index < MAXBOARDS; index++ ) + for (index = 0; index < MAXBOARDS; index++) { - dt3155_status[ index ].config.acq_mode = DT3155_MODE_FRAME; - dt3155_status[ index ].config.continuous = DT3155_ACQ; - dt3155_status[ index ].config.cols = DT3155_MAX_COLS; - dt3155_status[ index ].config.rows = DT3155_MAX_ROWS; - dt3155_status[ index ].state = DT3155_STATE_IDLE; + dt3155_status[index].config.acq_mode = DT3155_MODE_FRAME; + dt3155_status[index].config.continuous = DT3155_ACQ; + dt3155_status[index].config.cols = DT3155_MAX_COLS; + dt3155_status[index].config.rows = DT3155_MAX_ROWS; + dt3155_status[index].state = DT3155_STATE_IDLE; /* find_PCI() will check if devices are installed; */ /* first assume they're not: */ - dt3155_status[ index ].mem_addr = 0; - dt3155_status[ index ].mem_size = 0; - dt3155_status[ index ].state = DT3155_STATE_IDLE; - dt3155_status[ index ].device_installed = 0; + dt3155_status[index].mem_addr = 0; + dt3155_status[index].mem_size = 0; + dt3155_status[index].state = DT3155_STATE_IDLE; + dt3155_status[index].device_installed = 0; } /* Now let's find the hardware. find_PCI() will set ndevices to the * number of cards found in this machine. */ { - if ( (rcode = find_PCI()) != DT_3155_SUCCESS ) + if ((rcode = find_PCI()) != DT_3155_SUCCESS) { printk("DT3155 error: find_PCI() failed to find dt3155 board(s)\n"); - unregister_chrdev( dt3155_major, "dt3155" ); + unregister_chrdev(dt3155_major, "dt3155"); return rcode; } } /* Ok, time to setup the frame buffers */ - if( (rcode = dt3155_setup_buffers(&allocatorAddr)) < 0 ) + if((rcode = dt3155_setup_buffers(&allocatorAddr)) < 0) { printk("DT3155: Error: setting up buffer not large enough."); - unregister_chrdev( dt3155_major, "dt3155" ); + unregister_chrdev(dt3155_major, "dt3155"); return rcode; } /* If we are this far, then there is enough RAM */ /* for the buffers: Print the configuration. */ - for( index = 0; index < ndevices; index++ ) + for( index = 0; index < ndevices; index++) { printk("DT3155: Device = %d; acq_mode = %d; " "continuous = %d; cols = %d; rows = %d;\n", index , - dt3155_status[ index ].config.acq_mode, - dt3155_status[ index ].config.continuous, - dt3155_status[ index ].config.cols, - dt3155_status[ index ].config.rows); + dt3155_status[index].config.acq_mode, + dt3155_status[index].config.continuous, + dt3155_status[index].config.cols, + dt3155_status[index].config.rows); printk("DT3155: m_addr = 0x%x; m_size = %ld; " "state = %d; device_installed = %d\n", - dt3155_status[ index ].mem_addr, - (long int)dt3155_status[ index ].mem_size, - dt3155_status[ index ].state, - dt3155_status[ index ].device_installed); + dt3155_status[index].mem_addr, + (long int)dt3155_status[index].mem_size, + dt3155_status[index].state, + dt3155_status[index].device_installed); } /* Disable ALL interrupts */ int_csr_r.reg = 0; - for( index = 0; index < ndevices; index++ ) + for( index = 0; index < ndevices; index++) { - WriteMReg( (dt3155_lbase[ index ] + INT_CSR), int_csr_r.reg ); - if( dt3155_status[ index ].device_installed ) + WriteMReg((dt3155_lbase[index] + INT_CSR), int_csr_r.reg); + if(dt3155_status[index].device_installed) { /* * This driver *looks* like it can handle sharing interrupts, @@ -1036,14 +1048,14 @@ int init_module(void) * as a reminder in case any problems arise. (SS) */ /* in older kernels flags are: SA_SHIRQ | SA_INTERRUPT */ - rcode = request_irq( dt3155_status[ index ].irq, (void *)dt3155_isr, - IRQF_SHARED | IRQF_DISABLED, devname[ index ], + rcode = request_irq(dt3155_status[index].irq, (void *)dt3155_isr, + IRQF_SHARED | IRQF_DISABLED, devname[index], (void*) &dt3155_status[index]); - if( rcode < 0 ) + if(rcode < 0) { printk("DT3155: minor %d request_irq failed for IRQ %d\n", index, dt3155_status[index].irq); - unregister_chrdev( dt3155_major, "dt3155" ); + unregister_chrdev(dt3155_major, "dt3155"); return rcode; } } @@ -1072,15 +1084,15 @@ void cleanup_module(void) allocator_cleanup(); #endif - unregister_chrdev( dt3155_major, "dt3155" ); + unregister_chrdev(dt3155_major, "dt3155"); - for( index = 0; index < ndevices; index++ ) + for(index = 0; index < ndevices; index++) { - if( dt3155_status[ index ].device_installed == 1 ) + if(dt3155_status[index].device_installed == 1) { - printk( "DT3155: Freeing irq %d for device %d\n", - dt3155_status[ index ].irq, index ); - free_irq( dt3155_status[ index ].irq, (void*)&dt3155_status[index] ); + printk("DT3155: Freeing irq %d for device %d\n", + dt3155_status[index].irq, index); + free_irq(dt3155_status[index].irq, (void*)&dt3155_status[index]); } } } diff --git a/drivers/staging/dt3155/dt3155_io.c b/drivers/staging/dt3155/dt3155_io.c index 6b9c68501a61..7792e712d16e 100644 --- a/drivers/staging/dt3155/dt3155_io.c +++ b/drivers/staging/dt3155/dt3155_io.c @@ -74,23 +74,22 @@ u8 i2c_pm_lut_data; * wait_ibsyclr() * * This function handles read/write timing and r/w timeout error - * - * Returns TRUE if NEW_CYCLE clears - * Returns FALSE if NEW_CYCLE doesn't clear in roughly 3 msecs, otherwise - * returns 0 */ static int wait_ibsyclr(u8 *lpReg) { /* wait 100 microseconds */ udelay(100L); /* __delay(loops_per_sec/10000); */ + + ReadMReg(lpReg + IIC_CSR2, iic_csr2_r.reg); if (iic_csr2_r.fld.NEW_CYCLE) { /* if NEW_CYCLE didn't clear */ /* TIMEOUT ERROR */ dt3155_errno = DT_ERR_I2C_TIMEOUT; - return FALSE; - } else - return TRUE; /* no error */ + return -ETIMEDOUT; + } + + return 0; /* no error */ } /* @@ -101,14 +100,9 @@ static int wait_ibsyclr(u8 *lpReg) * 1st parameter is pointer to 32-bit register base address * 2nd parameter is reg. index; * 3rd is value to be written - * - * Returns TRUE - Successful completion - * FALSE - Timeout error - cycle did not complete! */ int WriteI2C(u8 *lpReg, u_short wIregIndex, u8 byVal) { - int writestat; /* status for return */ - /* read 32 bit IIC_CSR2 register data into union */ ReadMReg((lpReg + IIC_CSR2), iic_csr2_r.reg); @@ -126,8 +120,7 @@ int WriteI2C(u8 *lpReg, u_short wIregIndex, u8 byVal) WriteMReg((lpReg + IIC_CSR2), iic_csr2_r.reg); /* wait for IIC cycle to finish */ - writestat = wait_ibsyclr(lpReg); - return writestat; + return wait_ibsyclr(lpReg); } /* @@ -138,9 +131,6 @@ int WriteI2C(u8 *lpReg, u_short wIregIndex, u8 byVal) * 1st parameter is pointer to 32-bit register base address * 2nd parameter is reg. index; * 3rd is adrs of value to be read - * - * Returns TRUE - Successful completion - * FALSE - Timeout error - cycle did not complete! */ int ReadI2C(u8 *lpReg, u_short wIregIndex, u8 *byVal) { diff --git a/drivers/staging/dt3155/dt3155_isr.c b/drivers/staging/dt3155/dt3155_isr.c index 09d7d9b8272d..33ddc9c057ff 100644 --- a/drivers/staging/dt3155/dt3155_isr.c +++ b/drivers/staging/dt3155/dt3155_isr.c @@ -1,7 +1,7 @@ /* Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan, - Jason Lapenta, Scott Smedley, Greg Sharp + Jason Lapenta, Scott Smedley, Greg Sharp This file is part of the DT3155 Device Driver. @@ -22,7 +22,7 @@ MA 02111-1307 USA File: dt3155_isr.c Purpose: Buffer management routines, and other routines for the ISR - (the actual isr is in dt3155_drv.c) + (the actual isr is in dt3155_drv.c) -- Changes -- @@ -30,16 +30,16 @@ Purpose: Buffer management routines, and other routines for the ISR ------------------------------------------------------------------- 03-Jul-2000 JML n/a 02-Apr-2002 SS Mods to make work with separate allocator - module; Merged John Roll's mods to make work with - multiple boards. + module; Merged John Roll's mods to make work with + multiple boards. 10-Jul-2002 GCS Complete rewrite of setup_buffers to disallow - buffers which span a 4MB boundary. + buffers which span a 4MB boundary. 24-Jul-2002 SS GPL licence. 30-Jul-2002 NJC Added support for buffer loop. 31-Jul-2002 NJC Complete rewrite of buffer management 02-Aug-2002 NJC Including slab.h instead of malloc.h (no warning). - Also, allocator_init() now returns allocator_max - so cleaned up allocate_buffers() accordingly. + Also, allocator_init() now returns allocator_max + so cleaned up allocate_buffers() accordingly. 08-Aug-2005 SS port to 2.6 kernel. */ @@ -60,7 +60,7 @@ Purpose: Buffer management routines, and other routines for the ISR /* Pointer into global structure for handling buffers */ -struct dt3155_fbuffer_s *dt3155_fbuffer[MAXBOARDS] = {NULL +struct dt3155_fbuffer *dt3155_fbuffer[MAXBOARDS] = {NULL #if MAXBOARDS == 2 , NULL #endif @@ -77,9 +77,9 @@ struct dt3155_fbuffer_s *dt3155_fbuffer[MAXBOARDS] = {NULL * are_empty_buffers * m is minor # of device ***************************/ -inline bool are_empty_buffers( int m ) +bool are_empty_buffers(int m) { - return ( dt3155_fbuffer[ m ]->empty_len ); + return dt3155_fbuffer[m]->empty_len; } /************************** @@ -92,56 +92,56 @@ inline bool are_empty_buffers( int m ) * given by dt3155_fbuffer[m]->empty_buffers[0]. * empty_buffers should never fill up, though this is not checked. **************************/ -inline void push_empty( int index, int m ) +void push_empty(int index, int m) { - dt3155_fbuffer[m]->empty_buffers[ dt3155_fbuffer[m]->empty_len ] = index; + dt3155_fbuffer[m]->empty_buffers[dt3155_fbuffer[m]->empty_len] = index; dt3155_fbuffer[m]->empty_len++; } /************************** - * pop_empty( m ) + * pop_empty(m) * m is minor # of device **************************/ -inline int pop_empty( int m ) +int pop_empty(int m) { dt3155_fbuffer[m]->empty_len--; - return dt3155_fbuffer[m]->empty_buffers[ dt3155_fbuffer[m]->empty_len ]; + return dt3155_fbuffer[m]->empty_buffers[dt3155_fbuffer[m]->empty_len]; } /************************* - * is_ready_buf_empty( m ) + * is_ready_buf_empty(m) * m is minor # of device *************************/ -inline bool is_ready_buf_empty( int m ) +bool is_ready_buf_empty(int m) { - return ((dt3155_fbuffer[ m ]->ready_len) == 0); + return ((dt3155_fbuffer[m]->ready_len) == 0); } /************************* - * is_ready_buf_full( m ) + * is_ready_buf_full(m) * m is minor # of device * this should *never* be true if there are any active, locked or empty * buffers, since it corresponds to nbuffers ready buffers!! * 7/31/02: total rewrite. --NJC *************************/ -inline bool is_ready_buf_full( int m ) +bool is_ready_buf_full(int m) { - return ( dt3155_fbuffer[ m ]->ready_len == dt3155_fbuffer[ m ]->nbuffers ); + return dt3155_fbuffer[m]->ready_len == dt3155_fbuffer[m]->nbuffers; } /***************************************************** - * push_ready( m, buffer ) + * push_ready(m, buffer) * m is minor # of device * *****************************************************/ -inline void push_ready( int m, int index ) +void push_ready(int m, int index) { int head = dt3155_fbuffer[m]->ready_head; - dt3155_fbuffer[ m ]->ready_que[ head ] = index; - dt3155_fbuffer[ m ]->ready_head = ( (head + 1) % - (dt3155_fbuffer[ m ]->nbuffers) ); - dt3155_fbuffer[ m ]->ready_len++; + dt3155_fbuffer[m]->ready_que[head] = index; + dt3155_fbuffer[m]->ready_head = ((head + 1) % + (dt3155_fbuffer[m]->nbuffers)); + dt3155_fbuffer[m]->ready_len++; } @@ -151,12 +151,12 @@ inline void push_ready( int m, int index ) * * Simply comptutes the tail given the head and the length. *****************************************************/ -static inline int get_tail( int m ) +static int get_tail(int m) { - return ((dt3155_fbuffer[ m ]->ready_head - - dt3155_fbuffer[ m ]->ready_len + - dt3155_fbuffer[ m ]->nbuffers)% - (dt3155_fbuffer[ m ]->nbuffers)); + return (dt3155_fbuffer[m]->ready_head - + dt3155_fbuffer[m]->ready_len + + dt3155_fbuffer[m]->nbuffers)% + (dt3155_fbuffer[m]->nbuffers); } @@ -168,12 +168,12 @@ static inline int get_tail( int m ) * This assumes that there is a ready buffer ready... should * be checked (e.g. with is_ready_buf_empty() prior to call. *****************************************************/ -inline int pop_ready( int m ) +int pop_ready(int m) { int tail; tail = get_tail(m); - dt3155_fbuffer[ m ]->ready_len--; - return dt3155_fbuffer[ m ]->ready_que[ tail ]; + dt3155_fbuffer[m]->ready_len--; + return dt3155_fbuffer[m]->ready_que[tail]; } @@ -181,35 +181,33 @@ inline int pop_ready( int m ) * printques * m is minor # of device *****************************************************/ -inline void printques( int m ) +void printques(int m) { - int head = dt3155_fbuffer[ m ]->ready_head; + int head = dt3155_fbuffer[m]->ready_head; int tail; - int num = dt3155_fbuffer[ m ]->nbuffers; + int num = dt3155_fbuffer[m]->nbuffers; int frame_index; int index; tail = get_tail(m); printk("\n R:"); - for ( index = tail; index != head; index++, index = index % (num) ) - { - frame_index = dt3155_fbuffer[ m ]->ready_que[ index ]; - printk(" %d ", frame_index ); + for (index = tail; index != head; index++, index = index % (num)) { + frame_index = dt3155_fbuffer[m]->ready_que[index]; + printk(" %d ", frame_index); } printk("\n E:"); - for ( index = 0; index < dt3155_fbuffer[ m ]->empty_len; index++ ) - { - frame_index = dt3155_fbuffer[ m ]->empty_buffers[ index ]; - printk(" %d ", frame_index ); + for (index = 0; index < dt3155_fbuffer[m]->empty_len; index++) { + frame_index = dt3155_fbuffer[m]->empty_buffers[index]; + printk(" %d ", frame_index); } - frame_index = dt3155_fbuffer[ m ]->active_buf; + frame_index = dt3155_fbuffer[m]->active_buf; printk("\n A: %d", frame_index); - frame_index = dt3155_fbuffer[ m ]->locked_buf; - printk("\n L: %d \n", frame_index ); + frame_index = dt3155_fbuffer[m]->locked_buf; + printk("\n L: %d\n", frame_index); } @@ -220,11 +218,12 @@ inline void printques( int m ) * the start address up to the beginning of the * next 4MB chunk (assuming bufsize < 4MB). *****************************************************/ -u32 adjust_4MB (u32 buf_addr, u32 bufsize) { - if (((buf_addr+bufsize) & UPPER_10_BITS) != (buf_addr & UPPER_10_BITS)) - return (buf_addr+bufsize) & UPPER_10_BITS; - else - return buf_addr; +u32 adjust_4MB(u32 buf_addr, u32 bufsize) +{ + if (((buf_addr+bufsize) & UPPER_10_BITS) != (buf_addr & UPPER_10_BITS)) + return (buf_addr+bufsize) & UPPER_10_BITS; + else + return buf_addr; } @@ -235,7 +234,7 @@ u32 adjust_4MB (u32 buf_addr, u32 bufsize) { * buffers. If there is not enough free space * try for less memory. *****************************************************/ -void allocate_buffers (u32 *buf_addr, u32* total_size_kbs, +void allocate_buffers(u32 *buf_addr, u32* total_size_kbs, u32 bufsize) { /* Compute the minimum amount of memory guaranteed to hold all @@ -268,15 +267,15 @@ void allocate_buffers (u32 *buf_addr, u32* total_size_kbs, printk("DT3155: ...but need at least: %d KB\n", min_size_kbs); printk("DT3155: ...the allocator has: %d KB\n", allocator_max); size_kbs = (full_size_kbs <= allocator_max ? full_size_kbs : allocator_max); - if (size_kbs > min_size_kbs) { - if ((*buf_addr = allocator_allocate_dma (size_kbs, GFP_KERNEL)) != 0) { - printk("DT3155: Managed to allocate: %d KB\n", size_kbs); - *total_size_kbs = size_kbs; - return; + if (size_kbs > min_size_kbs) { + if ((*buf_addr = allocator_allocate_dma(size_kbs, GFP_KERNEL)) != 0) { + printk("DT3155: Managed to allocate: %d KB\n", size_kbs); + *total_size_kbs = size_kbs; + return; + } } - } /* If we got here, the allocation failed */ - printk ("DT3155: Allocator failed!\n"); + printk("DT3155: Allocator failed!\n"); *buf_addr = 0; *total_size_kbs = 0; return; @@ -312,28 +311,26 @@ u32 dt3155_setup_buffers(u32 *allocatorAddr) int m; /* minor # of device, looped for all devs */ /* zero the fbuffer status and address structure */ - for ( m = 0; m < ndevices; m++) - { - dt3155_fbuffer[ m ] = &(dt3155_status[ m ].fbuffer); + for (m = 0; m < ndevices; m++) { + dt3155_fbuffer[m] = &(dt3155_status[m].fbuffer); /* Make sure the buffering variables are consistent */ { - u8 *ptr = (u8 *) dt3155_fbuffer[ m ]; - for( index = 0; index < sizeof(struct dt3155_fbuffer_s); index++) - *(ptr++)=0; + u8 *ptr = (u8 *) dt3155_fbuffer[m]; + for (index = 0; index < sizeof(struct dt3155_fbuffer); index++) + *(ptr++) = 0; } } /* allocate a large contiguous chunk of RAM */ - allocate_buffers (&rambuff_addr, &rambuff_size, bufsize); + allocate_buffers(&rambuff_addr, &rambuff_size, bufsize); printk("DT3155: mem info\n"); - printk(" - rambuf_addr = 0x%x \n", rambuff_addr); - printk(" - length (kb) = %u \n", rambuff_size); - if( rambuff_addr == 0 ) - { - printk( KERN_INFO - "DT3155: Error setup_buffers() allocator dma failed \n" ); - return -ENOMEM; + printk(" - rambuf_addr = 0x%x\n", rambuff_addr); + printk(" - length (kb) = %u\n", rambuff_size); + if (rambuff_addr == 0) { + printk(KERN_INFO + "DT3155: Error setup_buffers() allocator dma failed\n"); + return -ENOMEM; } *allocatorAddr = rambuff_addr; rambuff_end = rambuff_addr + 1024 * rambuff_size; @@ -341,70 +338,68 @@ u32 dt3155_setup_buffers(u32 *allocatorAddr) /* after allocation, we need to count how many useful buffers there are so we can give an equal number to each device */ rambuff_acm = rambuff_addr; - for ( index = 0; index < MAXBUFFERS; index++) { - rambuff_acm = adjust_4MB (rambuff_acm, bufsize);/*avoid spanning 4MB bdry*/ - if (rambuff_acm + bufsize > rambuff_end) - break; - rambuff_acm += bufsize; - } + for (index = 0; index < MAXBUFFERS; index++) { + rambuff_acm = adjust_4MB(rambuff_acm, bufsize);/*avoid spanning 4MB bdry*/ + if (rambuff_acm + bufsize > rambuff_end) + break; + rambuff_acm += bufsize; + } /* Following line is OK, will waste buffers if index * not evenly divisible by ndevices -NJC*/ numbufs = index / ndevices; printk(" - numbufs = %u\n", numbufs); - if (numbufs < 2) { - printk( KERN_INFO - "DT3155: Error setup_buffers() couldn't allocate 2 bufs/board\n" ); - return -ENOMEM; - } + if (numbufs < 2) { + printk(KERN_INFO + "DT3155: Error setup_buffers() couldn't allocate 2 bufs/board\n"); + return -ENOMEM; + } /* now that we have board memory we spit it up */ /* between the boards and the buffers */ - rambuff_acm = rambuff_addr; - for ( m = 0; m < ndevices; m ++) - { - rambuff_acm = adjust_4MB (rambuff_acm, bufsize); - - /* Save the start of this boards buffer space (for mmap). */ - dt3155_status[ m ].mem_addr = rambuff_acm; - - for (index = 0; index < numbufs; index++) - { - rambuff_acm = adjust_4MB (rambuff_acm, bufsize); - if (rambuff_acm + bufsize > rambuff_end) { - /* Should never happen */ - printk ("DT3155 PROGRAM ERROR (GCS)\n" - "Error distributing allocated buffers\n"); - return -ENOMEM; - } - - dt3155_fbuffer[ m ]->frame_info[ index ].addr = rambuff_acm; - push_empty( index, m ); - /* printk(" - Buffer : %lx\n", - * dt3155_fbuffer[ m ]->frame_info[ index ].addr ); - */ - dt3155_fbuffer[ m ]->nbuffers += 1; - rambuff_acm += bufsize; + rambuff_acm = rambuff_addr; + for (m = 0; m < ndevices; m++) { + rambuff_acm = adjust_4MB(rambuff_acm, bufsize); + + /* Save the start of this boards buffer space (for mmap). */ + dt3155_status[m].mem_addr = rambuff_acm; + + for (index = 0; index < numbufs; index++) { + rambuff_acm = adjust_4MB(rambuff_acm, bufsize); + if (rambuff_acm + bufsize > rambuff_end) { + /* Should never happen */ + printk("DT3155 PROGRAM ERROR (GCS)\n" + "Error distributing allocated buffers\n"); + return -ENOMEM; + } + + dt3155_fbuffer[m]->frame_info[index].addr = rambuff_acm; + push_empty(index, m); + /* printk(" - Buffer : %lx\n", + * dt3155_fbuffer[m]->frame_info[index].addr); + */ + dt3155_fbuffer[m]->nbuffers += 1; + rambuff_acm += bufsize; } - /* Make sure there is an active buffer there. */ - dt3155_fbuffer[ m ]->active_buf = pop_empty( m ); - dt3155_fbuffer[ m ]->even_happened = 0; - dt3155_fbuffer[ m ]->even_stopped = 0; + /* Make sure there is an active buffer there. */ + dt3155_fbuffer[m]->active_buf = pop_empty(m); + dt3155_fbuffer[m]->even_happened = 0; + dt3155_fbuffer[m]->even_stopped = 0; - /* make sure there is no locked_buf JML 2/28/00 */ - dt3155_fbuffer[ m ]->locked_buf = -1; + /* make sure there is no locked_buf JML 2/28/00 */ + dt3155_fbuffer[m]->locked_buf = -1; - dt3155_status[ m ].mem_size = - rambuff_acm - dt3155_status[ m ].mem_addr; + dt3155_status[m].mem_size = + rambuff_acm - dt3155_status[m].mem_addr; - /* setup the ready queue */ - dt3155_fbuffer[ m ]->ready_head = 0; - dt3155_fbuffer[ m ]->ready_len = 0; - printk("Available buffers for device %d: %d\n", - m, dt3155_fbuffer[ m ]->nbuffers); + /* setup the ready queue */ + dt3155_fbuffer[m]->ready_head = 0; + dt3155_fbuffer[m]->ready_len = 0; + printk("Available buffers for device %d: %d\n", + m, dt3155_fbuffer[m]->nbuffers); } - return 1; + return 1; } /***************************************************** @@ -415,13 +410,12 @@ u32 dt3155_setup_buffers(u32 *allocatorAddr) * * m is minor number of device *****************************************************/ -static inline void internal_release_locked_buffer( int m ) +static void internal_release_locked_buffer(int m) { /* Pointer into global structure for handling buffers */ - if ( dt3155_fbuffer[ m ]->locked_buf >= 0 ) - { - push_empty( dt3155_fbuffer[ m ]->locked_buf, m ); - dt3155_fbuffer[ m ]->locked_buf = -1; + if (dt3155_fbuffer[m]->locked_buf >= 0) { + push_empty(dt3155_fbuffer[m]->locked_buf, m); + dt3155_fbuffer[m]->locked_buf = -1; } } @@ -433,7 +427,7 @@ static inline void internal_release_locked_buffer( int m ) * The user function of the above. * *****************************************************/ -inline void dt3155_release_locked_buffer( int m ) +void dt3155_release_locked_buffer(int m) { unsigned long int flags; local_save_flags(flags); @@ -448,28 +442,28 @@ inline void dt3155_release_locked_buffer( int m ) * m is minor # of device * *****************************************************/ -inline int dt3155_flush( int m ) +int dt3155_flush(int m) { int index; unsigned long int flags; local_save_flags(flags); local_irq_disable(); - internal_release_locked_buffer( m ); - dt3155_fbuffer[ m ]->empty_len = 0; + internal_release_locked_buffer(m); + dt3155_fbuffer[m]->empty_len = 0; - for ( index = 0; index < dt3155_fbuffer[ m ]->nbuffers; index++ ) - push_empty( index, m ); + for (index = 0; index < dt3155_fbuffer[m]->nbuffers; index++) + push_empty(index, m); /* Make sure there is an active buffer there. */ - dt3155_fbuffer[ m ]->active_buf = pop_empty( m ); + dt3155_fbuffer[m]->active_buf = pop_empty(m); - dt3155_fbuffer[ m ]->even_happened = 0; - dt3155_fbuffer[ m ]->even_stopped = 0; + dt3155_fbuffer[m]->even_happened = 0; + dt3155_fbuffer[m]->even_stopped = 0; /* setup the ready queue */ - dt3155_fbuffer[ m ]->ready_head = 0; - dt3155_fbuffer[ m ]->ready_len = 0; + dt3155_fbuffer[m]->ready_head = 0; + dt3155_fbuffer[m]->ready_len = 0; local_irq_restore(flags); @@ -485,7 +479,7 @@ inline int dt3155_flush( int m ) * If the user has a buffer locked it will unlock * that buffer before returning the new one. *****************************************************/ -inline int dt3155_get_ready_buffer( int m ) +int dt3155_get_ready_buffer(int m) { int frame_index; unsigned long int flags; @@ -493,21 +487,20 @@ inline int dt3155_get_ready_buffer( int m ) local_irq_disable(); #ifdef DEBUG_QUES_A - printques( m ); + printques(m); #endif - internal_release_locked_buffer( m ); + internal_release_locked_buffer(m); - if (is_ready_buf_empty( m )) - frame_index = -1; - else - { - frame_index = pop_ready( m ); - dt3155_fbuffer[ m ]->locked_buf = frame_index; + if (is_ready_buf_empty(m)) + frame_index = -1; + else { + frame_index = pop_ready(m); + dt3155_fbuffer[m]->locked_buf = frame_index; } #ifdef DEBUG_QUES_B - printques( m ); + printques(m); #endif local_irq_restore(flags); diff --git a/drivers/staging/dt3155/dt3155_isr.h b/drivers/staging/dt3155/dt3155_isr.h index 7595cb16c988..7d474cf743d8 100644 --- a/drivers/staging/dt3155/dt3155_isr.h +++ b/drivers/staging/dt3155/dt3155_isr.h @@ -36,7 +36,7 @@ MA 02111-1307 USA #ifndef DT3155_ISR_H #define DT3155_ISR_H -extern struct dt3155_fbuffer_s *dt3155_fbuffer[MAXBOARDS]; +extern struct dt3155_fbuffer *dt3155_fbuffer[MAXBOARDS]; /* User functions for buffering */ /* Initialize the buffering system. This should */ diff --git a/drivers/staging/et131x/et1310_address_map.h b/drivers/staging/et131x/et1310_address_map.h index ea746ba41faf..e6c8cb3828e9 100644 --- a/drivers/staging/et131x/et1310_address_map.h +++ b/drivers/staging/et131x/et1310_address_map.h @@ -117,7 +117,7 @@ /* * Software reset reg at address 0x0028 - * 0: txdma_sw_reset + * 0: txdma_sw_reset * 1: rxdma_sw_reset * 2: txmac_sw_reset * 3: rxmac_sw_reset @@ -1052,7 +1052,7 @@ typedef struct _RXMAC_t { /* Location: */ * 4-0: register */ -#define MII_ADDR(phy,reg) ((phy) << 8 | (reg)) +#define MII_ADDR(phy, reg) ((phy) << 8 | (reg)) /* * structure for MII Management Control reg in mac address map. @@ -1249,8 +1249,7 @@ typedef struct _MAC_t { /* Location: */ /* * MAC STATS Module of JAGCore Address Mapping */ -struct macstat_regs -{ /* Location: */ +struct macstat_regs { /* Location: */ u32 pad[32]; /* 0x6000 - 607C */ /* Tx/Rx 0-64 Byte Frame Counter */ diff --git a/drivers/staging/et131x/et1310_eeprom.c b/drivers/staging/et131x/et1310_eeprom.c index e4d095b0b52a..5a8e6b913dab 100644 --- a/drivers/staging/et131x/et1310_eeprom.c +++ b/drivers/staging/et131x/et1310_eeprom.c @@ -302,7 +302,7 @@ static int eeprom_read(struct et131x_adapter *etdev, u32 addr, u8 *pdata) err = eeprom_wait_ready(pdev, NULL); if (err) return err; - /* + /* * Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0, * and bits 1:0 both =0. Bit 5 should be set according to the type * of EEPROM being accessed (1=two byte addressing, 0=one byte @@ -383,9 +383,9 @@ int et131x_init_eeprom(struct et131x_adapter *etdev) /* This error could mean that there was an error * reading the eeprom or that the eeprom doesn't exist. - * We will treat each case the same and not try to gather - * additional information that normally would come from the - * eeprom, like MAC Address + * We will treat each case the same and not try to + * gather additional information that normally would + * come from the eeprom, like MAC Address */ etdev->has_eeprom = 0; return -EIO; diff --git a/drivers/staging/et131x/et1310_phy.c b/drivers/staging/et131x/et1310_phy.c index 34cd5d1b586a..a6d9f29ff49c 100644 --- a/drivers/staging/et131x/et1310_phy.c +++ b/drivers/staging/et131x/et1310_phy.c @@ -344,7 +344,7 @@ static void ET1310_PhyDuplexMode(struct et131x_adapter *etdev, u16 duplex) static void ET1310_PhySpeedSelect(struct et131x_adapter *etdev, u16 speed) { u16 data; - static const u16 bits[3]={0x0000, 0x2000, 0x0040}; + static const u16 bits[3] = {0x0000, 0x2000, 0x0040}; /* Read the PHY control register */ MiRead(etdev, PHY_CONTROL, &data); diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c index 54686e2ace69..8f5dcebda76a 100644 --- a/drivers/staging/et131x/et1310_rx.c +++ b/drivers/staging/et131x/et1310_rx.c @@ -344,7 +344,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) "Cannot alloc memory for Packet Status Ring\n"); return -ENOMEM; } - printk("PSR %lx\n", (unsigned long) rx_ring->pPSRingPa); + printk(KERN_INFO "PSR %lx\n", (unsigned long) rx_ring->pPSRingPa); /* * NOTE : pci_alloc_consistent(), used above to alloc DMA regions, @@ -363,7 +363,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) return -ENOMEM; } rx_ring->NumRfd = NIC_DEFAULT_NUM_RFD; - printk("PRS %lx\n", (unsigned long)rx_ring->rx_status_bus); + printk(KERN_INFO "PRS %lx\n", (unsigned long)rx_ring->rx_status_bus); /* Recv * pci_pool_create initializes a lookaside list. After successful @@ -445,10 +445,10 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) rx_ring->pFbr1RingVa - rx_ring->Fbr1offset); bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr1NumEntries) - + 0xfff; + + 0xfff; pci_free_consistent(adapter->pdev, bufsize, - rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa); + rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa); rx_ring->pFbr1RingVa = NULL; } @@ -478,7 +478,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) rx_ring->pFbr0RingVa - rx_ring->Fbr0offset); bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr0NumEntries) - + 0xfff; + + 0xfff; pci_free_consistent(adapter->pdev, bufsize, @@ -504,7 +504,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) pci_free_consistent(adapter->pdev, sizeof(struct rx_status_block), rx_ring->rx_status_block, rx_ring->rx_status_bus); - rx_ring->rx_status_block = NULL; + rx_ring->rx_status_block = NULL; } /* Free receive buffer pool */ @@ -713,7 +713,7 @@ void SetRxDmaTimer(struct et131x_adapter *etdev) */ void et131x_rx_dma_disable(struct et131x_adapter *etdev) { - u32 csr; + u32 csr; /* Setup the receive dma configuration register */ writel(0x00002001, &etdev->regs->rxdma.csr); csr = readl(&etdev->regs->rxdma.csr); @@ -743,9 +743,9 @@ void et131x_rx_dma_enable(struct et131x_adapter *etdev) else if (etdev->rx_ring.Fbr1BufferSize == 16384) csr |= 0x1800; #ifdef USE_FBR0 - csr |= 0x0400; /* FBR0 enable */ + csr |= 0x0400; /* FBR0 enable */ if (etdev->rx_ring.Fbr0BufferSize == 256) - csr |= 0x0100; + csr |= 0x0100; else if (etdev->rx_ring.Fbr0BufferSize == 512) csr |= 0x0200; else if (etdev->rx_ring.Fbr0BufferSize == 1024) @@ -757,7 +757,7 @@ void et131x_rx_dma_enable(struct et131x_adapter *etdev) if ((csr & 0x00020000) != 0) { udelay(5); csr = readl(&etdev->regs->rxdma.csr); - if ((csr & 0x00020000) != 0) { + if ((csr & 0x00020000) != 0) { dev_err(&etdev->pdev->dev, "RX Dma failed to exit halt state. CSR 0x%08x\n", csr); @@ -841,8 +841,7 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev) (rindex == 1 && bindex > rx_local->Fbr1NumEntries - 1)) #else - if (rindex != 1 || - bindex > rx_local->Fbr1NumEntries - 1) + if (rindex != 1 || bindex > rx_local->Fbr1NumEntries - 1) #endif { /* Illegal buffer or ring index cannot be used by S/W*/ @@ -1063,20 +1062,20 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *etdev) static inline u32 bump_fbr(u32 *fbr, u32 limit) { - u32 v = *fbr; - v++; - /* This works for all cases where limit < 1024. The 1023 case - works because 1023++ is 1024 which means the if condition is not - taken but the carry of the bit into the wrap bit toggles the wrap - value correctly */ - if ((v & ET_DMA10_MASK) > limit) { - v &= ~ET_DMA10_MASK; - v ^= ET_DMA10_WRAP; - } - /* For the 1023 case */ - v &= (ET_DMA10_MASK|ET_DMA10_WRAP); - *fbr = v; - return v; + u32 v = *fbr; + v++; + /* This works for all cases where limit < 1024. The 1023 case + works because 1023++ is 1024 which means the if condition is not + taken but the carry of the bit into the wrap bit toggles the wrap + value correctly */ + if ((v & ET_DMA10_MASK) > limit) { + v &= ~ET_DMA10_MASK; + v ^= ET_DMA10_WRAP; + } + /* For the 1023 case */ + v &= (ET_DMA10_MASK|ET_DMA10_WRAP); + *fbr = v; + return v; } /** @@ -1105,7 +1104,7 @@ void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD rfd) if (ri == 1) { struct fbr_desc *next = (struct fbr_desc *) (rx_local->pFbr1RingVa) + - INDEX10(rx_local->local_Fbr1_full); + INDEX10(rx_local->local_Fbr1_full); /* Handle the Free Buffer Ring advancement here. Write * the PA / Buffer Index for the returned buffer into diff --git a/drivers/staging/et131x/et1310_rx.h b/drivers/staging/et131x/et1310_rx.h index ca84a9146d69..e8c653d37a76 100644 --- a/drivers/staging/et131x/et1310_rx.h +++ b/drivers/staging/et131x/et1310_rx.h @@ -91,8 +91,7 @@ #define ALCATEL_BROADCAST_PKT 0x02000000 /* typedefs for Free Buffer Descriptors */ -struct fbr_desc -{ +struct fbr_desc { u32 addr_lo; u32 addr_hi; u32 word2; /* Bits 10-31 reserved, 0-9 descriptor */ @@ -117,7 +116,7 @@ struct fbr_desc * 9: jp Jumbo Packet * 10: vp VLAN Packet * 11-15: unused - * 16: asw_prev_pkt_dropped e.g. IFG too small on previous + * 16: asw_prev_pkt_dropped e.g. IFG too small on previous * 17: asw_RX_DV_event short receive event detected * 18: asw_false_carrier_event bad carrier since last good packet * 19: asw_code_err one or more nibbles signalled as errors diff --git a/drivers/staging/et131x/et131x_initpci.c b/drivers/staging/et131x/et131x_initpci.c index 1dd5fa5b888b..47baab3e6ea8 100644 --- a/drivers/staging/et131x/et131x_initpci.c +++ b/drivers/staging/et131x/et131x_initpci.c @@ -113,7 +113,13 @@ static u32 et131x_speed_set; module_param(et131x_speed_set, uint, 0); MODULE_PARM_DESC(et131x_speed_set, - "Set Link speed and dublex manually (0-5) [0] \n 1 : 10Mb Half-Duplex \n 2 : 10Mb Full-Duplex \n 3 : 100Mb Half-Duplex \n 4 : 100Mb Full-Duplex \n 5 : 1000Mb Full-Duplex \n 0 : Auto Speed Auto Dublex"); + "Set Link speed and dublex manually (0-5) [0]\n \ + 1 : 10Mb Half-Duplex\n \ + 2 : 10Mb Full-Duplex\n \ + 3 : 100Mb Half-Duplex\n \ + 4 : 100Mb Full-Duplex\n \ + 5 : 1000Mb Full-Duplex\n \ + 0 : Auto Speed Auto Dublex"); /** * et131x_hwaddr_init - set up the MAC Address on the ET1310 @@ -558,7 +564,7 @@ static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev, /* Parse configuration parameters into the private adapter struct */ if (et131x_speed_set) dev_info(&etdev->pdev->dev, - "Speed set manually to : %d \n", et131x_speed_set); + "Speed set manually to : %d\n", et131x_speed_set); etdev->SpeedDuplex = et131x_speed_set; etdev->RegistryJumboPacket = 1514; /* 1514-9216 */ @@ -820,7 +826,7 @@ static int __init et131x_init_module(void) if (et131x_speed_set < PARM_SPEED_DUPLEX_MIN || et131x_speed_set > PARM_SPEED_DUPLEX_MAX) { printk(KERN_WARNING "et131x: invalid speed setting ignored.\n"); - et131x_speed_set = 0; + et131x_speed_set = 0; } return pci_register_driver(&et131x_driver); } diff --git a/drivers/staging/et131x/et131x_isr.c b/drivers/staging/et131x/et131x_isr.c index cb7f6775ce0a..36f68fe3e8c9 100644 --- a/drivers/staging/et131x/et131x_isr.c +++ b/drivers/staging/et131x/et131x_isr.c @@ -253,14 +253,12 @@ void et131x_isr_handler(struct work_struct *work) * exit. */ /* Handle all the completed Transmit interrupts */ - if (status & ET_INTR_TXDMA_ISR) { + if (status & ET_INTR_TXDMA_ISR) et131x_handle_send_interrupt(etdev); - } /* Handle all the completed Receives interrupts */ - if (status & ET_INTR_RXDMA_XFR_DONE) { + if (status & ET_INTR_RXDMA_XFR_DONE) et131x_handle_recv_interrupt(etdev); - } status &= 0xffffffd7; diff --git a/drivers/staging/et131x/et131x_netdev.c b/drivers/staging/et131x/et131x_netdev.c index abc82c3dad21..106d548982c4 100644 --- a/drivers/staging/et131x/et131x_netdev.c +++ b/drivers/staging/et131x/et131x_netdev.c @@ -426,26 +426,22 @@ void et131x_multicast(struct net_device *netdev) * accordingly */ - if (netdev->flags & IFF_PROMISC) { + if (netdev->flags & IFF_PROMISC) adapter->PacketFilter |= ET131X_PACKET_TYPE_PROMISCUOUS; - } else { + else adapter->PacketFilter &= ~ET131X_PACKET_TYPE_PROMISCUOUS; - } - if (netdev->flags & IFF_ALLMULTI) { + if (netdev->flags & IFF_ALLMULTI) adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST; - } - if (netdev_mc_count(netdev) > NIC_MAX_MCAST_LIST) { + if (netdev_mc_count(netdev) > NIC_MAX_MCAST_LIST) adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST; - } if (netdev_mc_count(netdev) < 1) { adapter->PacketFilter &= ~ET131X_PACKET_TYPE_ALL_MULTICAST; adapter->PacketFilter &= ~ET131X_PACKET_TYPE_MULTICAST; - } else { + } else adapter->PacketFilter |= ET131X_PACKET_TYPE_MULTICAST; - } /* Set values in the private adapter struct */ i = 0; diff --git a/drivers/staging/frontier/alphatrack.c b/drivers/staging/frontier/alphatrack.c index a50a21518a8e..4e52105e6070 100644 --- a/drivers/staging/frontier/alphatrack.c +++ b/drivers/staging/frontier/alphatrack.c @@ -134,7 +134,7 @@ MODULE_PARM_DESC(min_interrupt_out_interval, /* Structure to hold all of our device specific stuff */ struct usb_alphatrack { - struct semaphore sem; /* locks this structure */ + struct mutex mtx; /* locks this structure */ struct usb_interface *intf; /* save off the usb interface pointer */ int open_count; /* number of times this port has been opened */ @@ -238,7 +238,7 @@ static void usb_alphatrack_interrupt_in_callback(struct urb *urb) if (urb->actual_length != INPUT_CMD_SIZE) { dev_warn(&dev->intf->dev, "Urb length was %d bytes!!" - "Do something intelligent \n", urb->actual_length); + "Do something intelligent\n", urb->actual_length); } else { alphatrack_ocmd_info(&dev->intf->dev, &(*dev->ring_buffer)[dev->ring_tail].cmd, @@ -347,7 +347,7 @@ static int usb_alphatrack_open(struct inode *inode, struct file *file) } /* lock this device */ - if (down_interruptible(&dev->sem)) { + if (mutex_lock_interruptible(&dev->mtx)) { retval = -ERESTARTSYS; goto unlock_disconnect_exit; } @@ -390,7 +390,7 @@ static int usb_alphatrack_open(struct inode *inode, struct file *file) file->private_data = dev; unlock_exit: - up(&dev->sem); + mutex_unlock(&dev->mtx); unlock_disconnect_exit: mutex_unlock(&disconnect_mutex); @@ -413,7 +413,7 @@ static int usb_alphatrack_release(struct inode *inode, struct file *file) goto exit; } - if (down_interruptible(&dev->sem)) { + if (mutex_lock_interruptible(&dev->mtx)) { retval = -ERESTARTSYS; goto exit; } @@ -425,7 +425,7 @@ static int usb_alphatrack_release(struct inode *inode, struct file *file) if (dev->intf == NULL) { /* the device was unplugged before the file was released */ - up(&dev->sem); + mutex_unlock(&dev->mtx); /* unlock here as usb_alphatrack_delete frees dev */ usb_alphatrack_delete(dev); retval = -ENODEV; @@ -441,7 +441,7 @@ static int usb_alphatrack_release(struct inode *inode, struct file *file) dev->open_count = 0; unlock_exit: - up(&dev->sem); + mutex_unlock(&dev->mtx); exit: return retval; @@ -486,7 +486,7 @@ static ssize_t usb_alphatrack_read(struct file *file, char __user *buffer, goto exit; /* lock this object */ - if (down_interruptible(&dev->sem)) { + if (mutex_lock_interruptible(&dev->mtx)) { retval = -ERESTARTSYS; goto exit; } @@ -532,7 +532,7 @@ static ssize_t usb_alphatrack_read(struct file *file, char __user *buffer, unlock_exit: /* unlock the device */ - up(&dev->sem); + mutex_unlock(&dev->mtx); exit: return retval; @@ -556,7 +556,7 @@ static ssize_t usb_alphatrack_write(struct file *file, goto exit; /* lock this object */ - if (down_interruptible(&dev->sem)) { + if (mutex_lock_interruptible(&dev->mtx)) { retval = -ERESTARTSYS; goto exit; } @@ -599,7 +599,7 @@ static ssize_t usb_alphatrack_write(struct file *file, } if (dev->interrupt_out_endpoint == NULL) { - err("Endpoint should not be be null! \n"); + err("Endpoint should not be be null!\n"); goto unlock_exit; } @@ -627,7 +627,7 @@ static ssize_t usb_alphatrack_write(struct file *file, unlock_exit: /* unlock the device */ - up(&dev->sem); + mutex_unlock(&dev->mtx); exit: return retval; @@ -678,7 +678,7 @@ static int usb_alphatrack_probe(struct usb_interface *intf, dev_err(&intf->dev, "Out of memory\n"); goto exit; } - init_MUTEX(&dev->sem); + mutex_init(&dev->mtx); dev->intf = intf; init_waitqueue_head(&dev->read_wait); init_waitqueue_head(&dev->write_wait); @@ -771,7 +771,7 @@ static int usb_alphatrack_probe(struct usb_interface *intf, kmalloc(sizeof(struct alphatrack_ocmd) * true_size, GFP_KERNEL); if (!dev->write_buffer) { - dev_err(&intf->dev, "Couldn't allocate write_buffer \n"); + dev_err(&intf->dev, "Couldn't allocate write_buffer\n"); goto error; } @@ -835,7 +835,7 @@ static void usb_alphatrack_disconnect(struct usb_interface *intf) dev = usb_get_intfdata(intf); usb_set_intfdata(intf, NULL); - down(&dev->sem); + mutex_lock(&dev->mtx); minor = intf->minor; @@ -844,11 +844,11 @@ static void usb_alphatrack_disconnect(struct usb_interface *intf) /* if the device is not opened, then we clean up right now */ if (!dev->open_count) { - up(&dev->sem); + mutex_unlock(&dev->mtx); usb_alphatrack_delete(dev); } else { dev->intf = NULL; - up(&dev->sem); + mutex_unlock(&dev->mtx); } atomic_set(&dev->writes_pending, 0); diff --git a/drivers/staging/frontier/tranzport.c b/drivers/staging/frontier/tranzport.c index 2f03f43f3a2e..eed74f0fe0b6 100644 --- a/drivers/staging/frontier/tranzport.c +++ b/drivers/staging/frontier/tranzport.c @@ -123,7 +123,7 @@ struct tranzport_cmd { /* Structure to hold all of our device specific stuff */ struct usb_tranzport { - struct semaphore sem; /* locks this structure */ + struct mutex mtx; /* locks this structure */ struct usb_interface *intf; /* save off the usb interface pointer */ int open_count; /* number of times this port opened */ struct tranzport_cmd (*ring_buffer)[RING_BUFFER_SIZE]; @@ -198,7 +198,9 @@ static void usb_tranzport_abort_transfers(struct usb_tranzport *dev) { \ struct usb_interface *intf = to_usb_interface(dev); \ struct usb_tranzport *t = usb_get_intfdata(intf); \ - int temp = simple_strtoul(buf, NULL, 10); \ + unsigned long temp; \ + if (strict_strtoul(buf, 10, &temp)) \ + return -EINVAL; \ t->value = temp; \ return count; \ } \ @@ -255,7 +257,7 @@ static void usb_tranzport_interrupt_in_callback(struct urb *urb) if (urb->actual_length != 8) { dev_warn(&dev->intf->dev, "Urb length was %d bytes!!" - "Do something intelligent \n", + "Do something intelligent\n", urb->actual_length); } else { dbg_info(&dev->intf->dev, @@ -365,7 +367,7 @@ static int usb_tranzport_open(struct inode *inode, struct file *file) } /* lock this device */ - if (down_interruptible(&dev->sem)) { + if (mutex_lock_interruptible(&dev->mtx)) { retval = -ERESTARTSYS; goto unlock_disconnect_exit; } @@ -409,7 +411,7 @@ static int usb_tranzport_open(struct inode *inode, struct file *file) file->private_data = dev; unlock_exit: - up(&dev->sem); + mutex_unlock(&dev->mtx); unlock_disconnect_exit: mutex_unlock(&disconnect_mutex); @@ -432,7 +434,7 @@ static int usb_tranzport_release(struct inode *inode, struct file *file) goto exit; } - if (down_interruptible(&dev->sem)) { + if (mutex_lock_interruptible(&dev->mtx)) { retval = -ERESTARTSYS; goto exit; } @@ -444,7 +446,7 @@ static int usb_tranzport_release(struct inode *inode, struct file *file) if (dev->intf == NULL) { /* the device was unplugged before the file was released */ - up(&dev->sem); + mutex_unlock(&dev->mtx); /* unlock here as usb_tranzport_delete frees dev */ usb_tranzport_delete(dev); retval = -ENODEV; @@ -460,7 +462,7 @@ static int usb_tranzport_release(struct inode *inode, struct file *file) dev->open_count = 0; unlock_exit: - up(&dev->sem); + mutex_unlock(&dev->mtx); exit: return retval; @@ -510,7 +512,7 @@ static ssize_t usb_tranzport_read(struct file *file, char __user *buffer, goto exit; /* lock this object */ - if (down_interruptible(&dev->sem)) { + if (mutex_lock_interruptible(&dev->mtx)) { retval = -ERESTARTSYS; goto exit; } @@ -658,7 +660,7 @@ retval = 8; unlock_exit: /* unlock the device */ -up(&dev->sem); +mutex_unlock(&dev->mtx); exit: return retval; @@ -682,7 +684,7 @@ static ssize_t usb_tranzport_write(struct file *file, goto exit; /* lock this object */ - if (down_interruptible(&dev->sem)) { + if (mutex_lock_interruptible(&dev->mtx)) { retval = -ERESTARTSYS; goto exit; } @@ -724,7 +726,7 @@ static ssize_t usb_tranzport_write(struct file *file, } if (dev->interrupt_out_endpoint == NULL) { - err("Endpoint should not be be null! \n"); + err("Endpoint should not be be null!\n"); goto unlock_exit; } @@ -751,7 +753,7 @@ static ssize_t usb_tranzport_write(struct file *file, unlock_exit: /* unlock the device */ - up(&dev->sem); + mutex_unlock(&dev->mtx); exit: return retval; @@ -800,7 +802,7 @@ static int usb_tranzport_probe(struct usb_interface *intf, dev_err(&intf->dev, "Out of memory\n"); goto exit; } - init_MUTEX(&dev->sem); + mutex_init(&dev->mtx); dev->intf = intf; init_waitqueue_head(&dev->read_wait); init_waitqueue_head(&dev->write_wait); @@ -940,18 +942,18 @@ static void usb_tranzport_disconnect(struct usb_interface *intf) mutex_lock(&disconnect_mutex); dev = usb_get_intfdata(intf); usb_set_intfdata(intf, NULL); - down(&dev->sem); + mutex_lock(&dev->mtx); minor = intf->minor; /* give back our minor */ usb_deregister_dev(intf, &usb_tranzport_class); /* if the device is not opened, then we clean up right now */ if (!dev->open_count) { - up(&dev->sem); + mutex_unlock(&dev->mtx); usb_tranzport_delete(dev); } else { dev->intf = NULL; - up(&dev->sem); + mutex_unlock(&dev->mtx); } mutex_unlock(&disconnect_mutex); diff --git a/drivers/staging/hv/Channel.c b/drivers/staging/hv/Channel.c index e69e9ee704ac..328d3a0d0bd8 100644 --- a/drivers/staging/hv/Channel.c +++ b/drivers/staging/hv/Channel.c @@ -65,8 +65,9 @@ static void DumpMonitorPage(struct hv_monitor_page *MonitorPage) } #endif -/** - * VmbusChannelSetEvent - Trigger an event notification on the specified channel. +/* + * VmbusChannelSetEvent - Trigger an event notification on the specified + * channel. */ static void VmbusChannelSetEvent(struct vmbus_channel *Channel) { @@ -120,7 +121,7 @@ static void VmbusChannelClearEvent(struct vmbus_channel *channel) } #endif -/** +/* * VmbusChannelGetDebugInfo -Retrieve various channel debug info */ void VmbusChannelGetDebugInfo(struct vmbus_channel *Channel, @@ -165,7 +166,7 @@ void VmbusChannelGetDebugInfo(struct vmbus_channel *Channel, RingBufferGetDebugInfo(&Channel->Outbound, &DebugInfo->Outbound); } -/** +/* * VmbusChannelOpen - Open the specified channel. */ int VmbusChannelOpen(struct vmbus_channel *NewChannel, u32 SendRingBufferSize, @@ -283,8 +284,9 @@ Cleanup: return 0; } -/** - * DumpGpadlBody - Dump the gpadl body message to the console for debugging purposes. +/* + * DumpGpadlBody - Dump the gpadl body message to the console for + * debugging purposes. */ static void DumpGpadlBody(struct vmbus_channel_gpadl_body *Gpadl, u32 Len) { @@ -300,8 +302,9 @@ static void DumpGpadlBody(struct vmbus_channel_gpadl_body *Gpadl, u32 Len) i, Gpadl->Pfn[i]); } -/** - * DumpGpadlHeader - Dump the gpadl header message to the console for debugging purposes. +/* + * DumpGpadlHeader - Dump the gpadl header message to the console for + * debugging purposes. */ static void DumpGpadlHeader(struct vmbus_channel_gpadl_header *Gpadl) { @@ -325,7 +328,7 @@ static void DumpGpadlHeader(struct vmbus_channel_gpadl_header *Gpadl) } } -/** +/* * VmbusChannelCreateGpadlHeader - Creates a gpadl for the specified buffer */ static int VmbusChannelCreateGpadlHeader(void *Kbuffer, u32 Size, @@ -441,7 +444,7 @@ static int VmbusChannelCreateGpadlHeader(void *Kbuffer, u32 Size, return 0; } -/** +/* * VmbusChannelEstablishGpadl - Estabish a GPADL for the specified buffer * * @Channel: a channel @@ -545,7 +548,7 @@ Cleanup: return ret; } -/** +/* * VmbusChannelTeardownGpadl -Teardown the specified GPADL handle */ int VmbusChannelTeardownGpadl(struct vmbus_channel *Channel, u32 GpadlHandle) @@ -598,7 +601,7 @@ int VmbusChannelTeardownGpadl(struct vmbus_channel *Channel, u32 GpadlHandle) return ret; } -/** +/* * VmbusChannelClose - Close the specified channel */ void VmbusChannelClose(struct vmbus_channel *Channel) @@ -663,7 +666,7 @@ void VmbusChannelClose(struct vmbus_channel *Channel) DPRINT_EXIT(VMBUS); } -/** +/* * VmbusChannelSendPacket - Send the specified buffer on the given channel */ int VmbusChannelSendPacket(struct vmbus_channel *Channel, const void *Buffer, @@ -709,8 +712,9 @@ int VmbusChannelSendPacket(struct vmbus_channel *Channel, const void *Buffer, return ret; } -/** - * VmbusChannelSendPacketPageBuffer - Send a range of single-page buffer packets using a GPADL Direct packet type. +/* + * VmbusChannelSendPacketPageBuffer - Send a range of single-page buffer + * packets using a GPADL Direct packet type. */ int VmbusChannelSendPacketPageBuffer(struct vmbus_channel *Channel, struct hv_page_buffer PageBuffers[], @@ -774,8 +778,9 @@ int VmbusChannelSendPacketPageBuffer(struct vmbus_channel *Channel, return ret; } -/** - * VmbusChannelSendPacketMultiPageBuffer - Send a multi-page buffer packet using a GPADL Direct packet type. +/* + * VmbusChannelSendPacketMultiPageBuffer - Send a multi-page buffer packet + * using a GPADL Direct packet type. */ int VmbusChannelSendPacketMultiPageBuffer(struct vmbus_channel *Channel, struct hv_multipage_buffer *MultiPageBuffer, @@ -843,7 +848,7 @@ int VmbusChannelSendPacketMultiPageBuffer(struct vmbus_channel *Channel, return ret; } -/** +/* * VmbusChannelRecvPacket - Retrieve the user packet on the specified channel */ /* TODO: Do we ever receive a gpa direct packet other than the ones we send ? */ @@ -909,7 +914,7 @@ int VmbusChannelRecvPacket(struct vmbus_channel *Channel, void *Buffer, return 0; } -/** +/* * VmbusChannelRecvPacketRaw - Retrieve the raw packet on the specified channel */ int VmbusChannelRecvPacketRaw(struct vmbus_channel *Channel, void *Buffer, @@ -972,7 +977,7 @@ int VmbusChannelRecvPacketRaw(struct vmbus_channel *Channel, void *Buffer, return 0; } -/** +/* * VmbusChannelOnChannelEvent - Channel event callback */ void VmbusChannelOnChannelEvent(struct vmbus_channel *Channel) @@ -985,7 +990,7 @@ void VmbusChannelOnChannelEvent(struct vmbus_channel *Channel) mod_timer(&Channel->poll_timer, jiffies + usecs_to_jiffies(100)); } -/** +/* * VmbusChannelOnTimer - Timer event callback */ void VmbusChannelOnTimer(unsigned long data) @@ -996,7 +1001,7 @@ void VmbusChannelOnTimer(unsigned long data) channel->OnChannelCallback(channel->ChannelCallbackContext); } -/** +/* * DumpVmbusChannel - Dump vmbus channel info to the console */ static void DumpVmbusChannel(struct vmbus_channel *Channel) diff --git a/drivers/staging/hv/ChannelMgmt.c b/drivers/staging/hv/ChannelMgmt.c index 5f92c2102ab4..43f28f23c317 100644 --- a/drivers/staging/hv/ChannelMgmt.c +++ b/drivers/staging/hv/ChannelMgmt.c @@ -71,7 +71,7 @@ static const struct hv_guid }, }; -/** +/* * AllocVmbusChannel - Allocate and initialize a vmbus channel object */ struct vmbus_channel *AllocVmbusChannel(void) @@ -97,7 +97,7 @@ struct vmbus_channel *AllocVmbusChannel(void) return channel; } -/** +/* * ReleaseVmbusChannel - Release the vmbus channel object itself */ static inline void ReleaseVmbusChannel(void *context) @@ -115,7 +115,7 @@ static inline void ReleaseVmbusChannel(void *context) DPRINT_EXIT(VMBUS); } -/** +/* * FreeVmbusChannel - Release the resources used by the vmbus channel object */ void FreeVmbusChannel(struct vmbus_channel *Channel) @@ -131,7 +131,7 @@ void FreeVmbusChannel(struct vmbus_channel *Channel) Channel); } -/** +/* * VmbusChannelProcessOffer - Process the offer by creating a channel/device associated with this offer */ static void VmbusChannelProcessOffer(void *context) @@ -213,7 +213,7 @@ static void VmbusChannelProcessOffer(void *context) DPRINT_EXIT(VMBUS); } -/** +/* * VmbusChannelProcessRescindOffer - Rescind the offer by initiating a device removal */ static void VmbusChannelProcessRescindOffer(void *context) @@ -225,7 +225,7 @@ static void VmbusChannelProcessRescindOffer(void *context) DPRINT_EXIT(VMBUS); } -/** +/* * VmbusChannelOnOffer - Handler for channel offers from vmbus in parent partition. * * We ignore all offers except network and storage offers. For each network and @@ -308,7 +308,7 @@ static void VmbusChannelOnOffer(struct vmbus_channel_message_header *hdr) DPRINT_EXIT(VMBUS); } -/** +/* * VmbusChannelOnOfferRescind - Rescind offer handler. * * We queue a work item to process this offer synchronously @@ -335,7 +335,7 @@ static void VmbusChannelOnOfferRescind(struct vmbus_channel_message_header *hdr) DPRINT_EXIT(VMBUS); } -/** +/* * VmbusChannelOnOffersDelivered - This is invoked when all offers have been delivered. * * Nothing to do here. @@ -347,7 +347,7 @@ static void VmbusChannelOnOffersDelivered( DPRINT_EXIT(VMBUS); } -/** +/* * VmbusChannelOnOpenResult - Open result handler. * * This is invoked when we received a response to our channel open request. @@ -395,7 +395,7 @@ static void VmbusChannelOnOpenResult(struct vmbus_channel_message_header *hdr) DPRINT_EXIT(VMBUS); } -/** +/* * VmbusChannelOnGpadlCreated - GPADL created handler. * * This is invoked when we received a response to our gpadl create request. @@ -447,7 +447,7 @@ static void VmbusChannelOnGpadlCreated(struct vmbus_channel_message_header *hdr) DPRINT_EXIT(VMBUS); } -/** +/* * VmbusChannelOnGpadlTorndown - GPADL torndown handler. * * This is invoked when we received a response to our gpadl teardown request. @@ -495,7 +495,7 @@ static void VmbusChannelOnGpadlTorndown( DPRINT_EXIT(VMBUS); } -/** +/* * VmbusChannelOnVersionResponse - Version response handler * * This is invoked when we received a response to our initiate contact request. @@ -558,7 +558,7 @@ static struct vmbus_channel_message_table_entry {ChannelMessageUnload, NULL}, }; -/** +/* * VmbusOnChannelMessage - Handler for channel protocol messages. * * This is invoked in the vmbus worker thread context. @@ -597,7 +597,7 @@ void VmbusOnChannelMessage(void *Context) DPRINT_EXIT(VMBUS); } -/** +/* * VmbusChannelRequestOffers - Send a request to get all our pending offers. */ int VmbusChannelRequestOffers(void) @@ -651,8 +651,9 @@ Cleanup: return ret; } -/** - * VmbusChannelReleaseUnattachedChannels - Release channels that are unattached/unconnected ie (no drivers associated) +/* + * VmbusChannelReleaseUnattachedChannels - Release channels that are + * unattached/unconnected ie (no drivers associated) */ void VmbusChannelReleaseUnattachedChannels(void) { diff --git a/drivers/staging/hv/Connection.c b/drivers/staging/hv/Connection.c index e0ea9cf90f03..dbf00560e0ac 100644 --- a/drivers/staging/hv/Connection.c +++ b/drivers/staging/hv/Connection.c @@ -34,7 +34,7 @@ struct VMBUS_CONNECTION gVmbusConnection = { .NextGpadlHandle = ATOMIC_INIT(0xE1E10), }; -/** +/* * VmbusConnect - Sends a connect request on the partition service connection */ int VmbusConnect(void) @@ -180,7 +180,7 @@ Cleanup: return ret; } -/** +/* * VmbusDisconnect - Sends a disconnect request on the partition service connection */ int VmbusDisconnect(void) @@ -218,7 +218,7 @@ Cleanup: return ret; } -/** +/* * GetChannelFromRelId - Get the channel object given its child relative id (ie channel id) */ struct vmbus_channel *GetChannelFromRelId(u32 relId) @@ -239,7 +239,7 @@ struct vmbus_channel *GetChannelFromRelId(u32 relId) return foundChannel; } -/** +/* * VmbusProcessChannelEvent - Process a channel event notification */ static void VmbusProcessChannelEvent(void *context) @@ -259,15 +259,15 @@ static void VmbusProcessChannelEvent(void *context) VmbusChannelOnChannelEvent(channel); /* * WorkQueueQueueWorkItem(channel->dataWorkQueue, - * VmbusChannelOnChannelEvent, - * (void*)channel); + * VmbusChannelOnChannelEvent, + * (void*)channel); */ } else { DPRINT_ERR(VMBUS, "channel not found for relid - %d.", relId); } } -/** +/* * VmbusOnEvents - Handler for events */ void VmbusOnEvents(void) @@ -308,7 +308,7 @@ void VmbusOnEvents(void) return; } -/** +/* * VmbusPostMessage - Send a msg on the vmbus's message connection */ int VmbusPostMessage(void *buffer, size_t bufferLen) @@ -320,7 +320,7 @@ int VmbusPostMessage(void *buffer, size_t bufferLen) return HvPostMessage(connId, 1, buffer, bufferLen); } -/** +/* * VmbusSetEvent - Send an event notification to the parent */ int VmbusSetEvent(u32 childRelId) diff --git a/drivers/staging/hv/Hv.c b/drivers/staging/hv/Hv.c index 3a1112d29aeb..62debf867aa4 100644 --- a/drivers/staging/hv/Hv.c +++ b/drivers/staging/hv/Hv.c @@ -35,7 +35,7 @@ struct hv_context gHvContext = { .SignalEventBuffer = NULL, }; -/** +/* * HvQueryHypervisorPresence - Query the cpuid for presense of windows hypervisor */ static int HvQueryHypervisorPresence(void) @@ -56,7 +56,7 @@ static int HvQueryHypervisorPresence(void) return ecx & HV_PRESENT_BIT; } -/** +/* * HvQueryHypervisorInfo - Get version info of the windows hypervisor */ static int HvQueryHypervisorInfo(void) @@ -125,7 +125,7 @@ static int HvQueryHypervisorInfo(void) return maxLeaf; } -/** +/* * HvDoHypercall - Invoke the specified hypercall */ static u64 HvDoHypercall(u64 Control, void *Input, void *Output) @@ -180,7 +180,7 @@ static u64 HvDoHypercall(u64 Control, void *Input, void *Output) #endif /* !x86_64 */ } -/** +/* * HvInit - Main initialization routine. * * This routine must be called before any other routines in here are called @@ -294,7 +294,7 @@ Cleanup: return ret; } -/** +/* * HvCleanup - Cleanup routine. * * This routine is called normally during driver unloading or exiting. @@ -321,7 +321,7 @@ void HvCleanup(void) DPRINT_EXIT(VMBUS); } -/** +/* * HvPostMessage - Post a message using the hypervisor message IPC. * * This involves a hypercall. @@ -362,7 +362,7 @@ u16 HvPostMessage(union hv_connection_id connectionId, } -/** +/* * HvSignalEvent - Signal an event on the specified connection using the hypervisor event IPC. * * This involves a hypercall. @@ -376,7 +376,7 @@ u16 HvSignalEvent(void) return status; } -/** +/* * HvSynicInit - Initialize the Synthethic Interrupt Controller. * * If it is already initialized by another entity (ie x2v shim), we need to @@ -482,7 +482,7 @@ Cleanup: return; } -/** +/* * HvSynicCleanup - Cleanup routine for HvSynicInit(). */ void HvSynicCleanup(void *arg) diff --git a/drivers/staging/hv/NetVsc.c b/drivers/staging/hv/NetVsc.c index e4bf82297504..27516d40b6ed 100644 --- a/drivers/staging/hv/NetVsc.c +++ b/drivers/staging/hv/NetVsc.c @@ -167,7 +167,7 @@ static struct netvsc_device *ReleaseInboundNetDevice(struct hv_device *Device) return netDevice; } -/** +/* * NetVscInitialize - Main entry point */ int NetVscInitialize(struct hv_driver *drv) @@ -705,7 +705,7 @@ static void NetVscDisconnectFromVsp(struct netvsc_device *NetDevice) DPRINT_EXIT(NETVSC); } -/** +/* * NetVscOnDeviceAdd - Callback when the device belonging to this driver is added */ static int NetVscOnDeviceAdd(struct hv_device *Device, void *AdditionalInfo) @@ -807,7 +807,7 @@ Cleanup: return ret; } -/** +/* * NetVscOnDeviceRemove - Callback when the root bus device is removed */ static int NetVscOnDeviceRemove(struct hv_device *Device) @@ -864,7 +864,7 @@ static int NetVscOnDeviceRemove(struct hv_device *Device) return 0; } -/** +/* * NetVscOnCleanup - Perform any cleanup when the driver is removed */ static void NetVscOnCleanup(struct hv_driver *drv) @@ -1087,7 +1087,7 @@ static void NetVscOnReceive(struct hv_device *Device, } /* Remove the 1st packet to represent the xfer page packet itself */ - xferpagePacket = (struct xferpage_packet*)listHead.next; + xferpagePacket = (struct xferpage_packet *)listHead.next; list_del(&xferpagePacket->ListEntry); /* This is how much we can satisfy */ @@ -1103,7 +1103,7 @@ static void NetVscOnReceive(struct hv_device *Device, /* Each range represents 1 RNDIS pkt that contains 1 ethernet frame */ for (i = 0; i < (count - 1); i++) { - netvscPacket = (struct hv_netvsc_packet*)listHead.next; + netvscPacket = (struct hv_netvsc_packet *)listHead.next; list_del(&netvscPacket->ListEntry); /* Initialize the netvsc packet */ @@ -1286,30 +1286,35 @@ static void NetVscOnReceiveCompletion(void *Context) DPRINT_EXIT(NETVSC); } -void NetVscOnChannelCallback(void *Context) +static void NetVscOnChannelCallback(void *Context) { - const int netPacketSize = 2048; int ret; struct hv_device *device = Context; struct netvsc_device *netDevice; u32 bytesRecvd; u64 requestId; - unsigned char packet[netPacketSize]; + unsigned char *packet; struct vmpacket_descriptor *desc; - unsigned char *buffer = packet; - int bufferlen = netPacketSize; + unsigned char *buffer; + int bufferlen = NETVSC_PACKET_SIZE; DPRINT_ENTER(NETVSC); ASSERT(device); + packet = kzalloc(NETVSC_PACKET_SIZE * sizeof(unsigned char), + GFP_KERNEL); + if (!packet) + return; + buffer = packet; + netDevice = GetInboundNetDevice(device); if (!netDevice) { DPRINT_ERR(NETVSC, "net device (%p) shutting down..." "ignoring inbound packets", netDevice); DPRINT_EXIT(NETVSC); - return; + goto out; } do { @@ -1341,17 +1346,17 @@ void NetVscOnChannelCallback(void *Context) } /* reset */ - if (bufferlen > netPacketSize) { + if (bufferlen > NETVSC_PACKET_SIZE) { kfree(buffer); buffer = packet; - bufferlen = netPacketSize; + bufferlen = NETVSC_PACKET_SIZE; } } else { /* reset */ - if (bufferlen > netPacketSize) { + if (bufferlen > NETVSC_PACKET_SIZE) { kfree(buffer); buffer = packet; - bufferlen = netPacketSize; + bufferlen = NETVSC_PACKET_SIZE; } break; @@ -1375,5 +1380,7 @@ void NetVscOnChannelCallback(void *Context) PutNetDevice(device); DPRINT_EXIT(NETVSC); +out: + kfree(buffer); return; } diff --git a/drivers/staging/hv/NetVsc.h b/drivers/staging/hv/NetVsc.h index 6e0e03494126..a6264db8388a 100644 --- a/drivers/staging/hv/NetVsc.h +++ b/drivers/staging/hv/NetVsc.h @@ -289,6 +289,7 @@ struct nvsp_message { /* Preallocated receive packets */ #define NETVSC_RECEIVE_PACKETLIST_COUNT 256 +#define NETVSC_PACKET_SIZE 2048 /* Per netvsc channel-specific */ struct netvsc_device { diff --git a/drivers/staging/hv/RingBuffer.c b/drivers/staging/hv/RingBuffer.c index 80b8a2c7784f..08b3c5567e9c 100644 --- a/drivers/staging/hv/RingBuffer.c +++ b/drivers/staging/hv/RingBuffer.c @@ -32,7 +32,7 @@ /* Amount of space to write to */ -#define BYTES_AVAIL_TO_WRITE(r, w, z) ((w) >= (r))?((z) - ((w) - (r))):((r) - (w)) +#define BYTES_AVAIL_TO_WRITE(r, w, z) ((w) >= (r)) ? ((z) - ((w) - (r))) : ((r) - (w)) /*++ diff --git a/drivers/staging/hv/StorVsc.c b/drivers/staging/hv/StorVsc.c index e426a23ca537..7372317fe836 100644 --- a/drivers/staging/hv/StorVsc.c +++ b/drivers/staging/hv/StorVsc.c @@ -533,7 +533,7 @@ static int StorVscConnectToVsp(struct hv_device *Device) return ret; } -/** +/* * StorVscOnDeviceAdd - Callback when the device belonging to this driver is added */ static int StorVscOnDeviceAdd(struct hv_device *Device, void *AdditionalInfo) @@ -554,7 +554,7 @@ static int StorVscOnDeviceAdd(struct hv_device *Device, void *AdditionalInfo) /* Save the channel properties to our storvsc channel */ /* props = (struct vmstorage_channel_properties *) - * channel->offerMsg.Offer.u.Standard.UserDefined; */ + * channel->offerMsg.Offer.u.Standard.UserDefined; */ /* FIXME: */ /* @@ -585,7 +585,7 @@ Cleanup: return ret; } -/** +/* * StorVscOnDeviceRemove - Callback when the our device is being removed */ static int StorVscOnDeviceRemove(struct hv_device *Device) @@ -683,7 +683,7 @@ Cleanup: return ret; } -/** +/* * StorVscOnIORequest - Callback to initiate an I/O request */ static int StorVscOnIORequest(struct hv_device *Device, @@ -717,7 +717,7 @@ static int StorVscOnIORequest(struct hv_device *Device, } /* print_hex_dump_bytes("", DUMP_PREFIX_NONE, Request->Cdb, - * Request->CdbLen); */ + * Request->CdbLen); */ requestExtension->Request = Request; requestExtension->Device = Device; @@ -783,7 +783,7 @@ static int StorVscOnIORequest(struct hv_device *Device, return ret; } -/** +/* * StorVscOnCleanup - Perform any cleanup when the driver is removed */ static void StorVscOnCleanup(struct hv_driver *Driver) @@ -792,7 +792,7 @@ static void StorVscOnCleanup(struct hv_driver *Driver) DPRINT_EXIT(STORVSC); } -/** +/* * StorVscInitialize - Main entry point */ int StorVscInitialize(struct hv_driver *Driver) diff --git a/drivers/staging/hv/TODO b/drivers/staging/hv/TODO index dbfbde937a66..66a89c809dd3 100644 --- a/drivers/staging/hv/TODO +++ b/drivers/staging/hv/TODO @@ -1,7 +1,5 @@ TODO: - fix remaining checkpatch warnings and errors - - use of /** when it is not a kerneldoc header - - remove RingBuffer.c to us in-kernel ringbuffer functions instead. - audit the vmbus to verify it is working properly with the driver model - convert vmbus driver interface function pointer tables @@ -9,7 +7,6 @@ TODO: - see if the vmbus can be merged with the other virtual busses in the kernel - audit the network driver - - use existing net_device_stats struct in network device - checking for carrier inside open is wrong, network device API confusion?? - audit the block driver diff --git a/drivers/staging/hv/VersionInfo.h b/drivers/staging/hv/VersionInfo.h index 10d7b19a485f..82e74b1ab150 100644 --- a/drivers/staging/hv/VersionInfo.h +++ b/drivers/staging/hv/VersionInfo.h @@ -29,11 +29,11 @@ * * Definition of versioning is as follows; * - * Major Number Changes for these scenarios; + * Major Number Changes for these scenarios; * 1. When a new version of Windows Hyper-V * is released. * 2. A Major change has occurred in the - * Linux IC's. + * Linux IC's. * (For example the merge for the first time * into the kernel) Every time the Major Number * changes, the Revision number is reset to 0. diff --git a/drivers/staging/hv/Vmbus.c b/drivers/staging/hv/Vmbus.c index 2f84bf7c0a9f..90b14beec3aa 100644 --- a/drivers/staging/hv/Vmbus.c +++ b/drivers/staging/hv/Vmbus.c @@ -52,7 +52,7 @@ static const struct hv_guid gVmbusDeviceId = { static struct hv_driver *gDriver; /* vmbus driver object */ static struct hv_device *gDevice; /* vmbus root device */ -/** +/* * VmbusGetChannelOffers - Retrieve the channel offers from the parent partition */ static void VmbusGetChannelOffers(void) @@ -62,7 +62,7 @@ static void VmbusGetChannelOffers(void) DPRINT_EXIT(VMBUS); } -/** +/* * VmbusGetChannelInterface - Get the channel interface */ static void VmbusGetChannelInterface(struct vmbus_channel_interface *Interface) @@ -70,7 +70,7 @@ static void VmbusGetChannelInterface(struct vmbus_channel_interface *Interface) GetChannelInterface(Interface); } -/** +/* * VmbusGetChannelInfo - Get the device info for the specified device object */ static void VmbusGetChannelInfo(struct hv_device *DeviceObject, @@ -79,7 +79,7 @@ static void VmbusGetChannelInfo(struct hv_device *DeviceObject, GetChannelInfo(DeviceObject, DeviceInfo); } -/** +/* * VmbusCreateChildDevice - Creates the child device on the bus that represents the channel offer */ struct hv_device *VmbusChildDeviceCreate(struct hv_guid *DeviceType, @@ -92,7 +92,7 @@ struct hv_device *VmbusChildDeviceCreate(struct hv_guid *DeviceType, Context); } -/** +/* * VmbusChildDeviceAdd - Registers the child device with the vmbus */ int VmbusChildDeviceAdd(struct hv_device *ChildDevice) @@ -102,7 +102,7 @@ int VmbusChildDeviceAdd(struct hv_device *ChildDevice) return vmbusDriver->OnChildDeviceAdd(gDevice, ChildDevice); } -/** +/* * VmbusChildDeviceRemove Unregisters the child device from the vmbus */ void VmbusChildDeviceRemove(struct hv_device *ChildDevice) @@ -112,7 +112,7 @@ void VmbusChildDeviceRemove(struct hv_device *ChildDevice) vmbusDriver->OnChildDeviceRemove(ChildDevice); } -/** +/* * VmbusOnDeviceAdd - Callback when the root bus device is added */ static int VmbusOnDeviceAdd(struct hv_device *dev, void *AdditionalInfo) @@ -141,7 +141,7 @@ static int VmbusOnDeviceAdd(struct hv_device *dev, void *AdditionalInfo) return ret; } -/** +/* * VmbusOnDeviceRemove - Callback when the root bus device is removed */ static int VmbusOnDeviceRemove(struct hv_device *dev) @@ -157,7 +157,7 @@ static int VmbusOnDeviceRemove(struct hv_device *dev) return ret; } -/** +/* * VmbusOnCleanup - Perform any cleanup when the driver is removed */ static void VmbusOnCleanup(struct hv_driver *drv) @@ -169,7 +169,7 @@ static void VmbusOnCleanup(struct hv_driver *drv) DPRINT_EXIT(VMBUS); } -/** +/* * VmbusOnMsgDPC - DPC routine to handle messages from the hypervisior */ static void VmbusOnMsgDPC(struct hv_driver *drv) @@ -217,7 +217,7 @@ static void VmbusOnMsgDPC(struct hv_driver *drv) } } -/** +/* * VmbusOnEventDPC - DPC routine to handle events from the hypervisior */ static void VmbusOnEventDPC(struct hv_driver *drv) @@ -226,7 +226,7 @@ static void VmbusOnEventDPC(struct hv_driver *drv) VmbusOnEvents(); } -/** +/* * VmbusOnISR - ISR routine */ static int VmbusOnISR(struct hv_driver *drv) @@ -264,7 +264,7 @@ static int VmbusOnISR(struct hv_driver *drv) return ret; } -/** +/* * VmbusInitialize - Main entry point */ int VmbusInitialize(struct hv_driver *drv) diff --git a/drivers/staging/hv/VmbusApi.h b/drivers/staging/hv/VmbusApi.h index d089bb193e7d..4275be3292ce 100644 --- a/drivers/staging/hv/VmbusApi.h +++ b/drivers/staging/hv/VmbusApi.h @@ -84,6 +84,24 @@ struct hv_device_info { struct hv_dev_port_info Outbound; }; +/** + * struct vmbus_channel_interface - Contains member functions for vmbus channel + * @Open: Open the channel + * @Close: Close the channel + * @SendPacket: Send a packet over the channel + * @SendPacketPageBuffer: Send a single page buffer over the channel + * @SendPacketMultiPageBuffer: Send a multiple page buffers + * @RecvPacket: Receive packet + * @RecvPacketRaw: Receive Raw packet + * @EstablishGpadl: Set up GPADL for ringbuffer + * @TeardownGpadl: Teardown GPADL for ringbuffer + * @GetInfo: Get info about the channel + * + * This structure contains function pointer to control vmbus channel + * behavior. None of these functions is externally callable, but they + * are used for normal vmbus channel internal behavior. + * Only used by Hyper-V drivers. + */ struct vmbus_channel_interface { int (*Open)(struct hv_device *Device, u32 SendBufferSize, u32 RecvRingBufferSize, void *UserData, u32 UserDataLen, diff --git a/drivers/staging/hv/blkvsc_drv.c b/drivers/staging/hv/blkvsc_drv.c index 8f1fda3256ad..8f8637e51d9e 100644 --- a/drivers/staging/hv/blkvsc_drv.c +++ b/drivers/staging/hv/blkvsc_drv.c @@ -165,7 +165,7 @@ static struct block_device_operations block_ops = { .ioctl = blkvsc_ioctl, }; -/** +/* * blkvsc_drv_init - BlkVsc driver initialization. */ static int blkvsc_drv_init(int (*drv_init)(struct hv_driver *drv)) @@ -245,7 +245,7 @@ static void blkvsc_drv_exit(void) return; } -/** +/* * blkvsc_probe - Add a new device for this driver */ static int blkvsc_probe(struct device *device) @@ -555,7 +555,7 @@ static int blkvsc_do_inquiry(struct block_device_context *blkdev) blkdev->device_type = UNKNOWN_DEV_TYPE; } - DPRINT_DBG(BLKVSC_DRV, "device type %d \n", device_type); + DPRINT_DBG(BLKVSC_DRV, "device type %d\n", device_type); blkdev->device_id_len = buf[7]; if (blkdev->device_id_len > 64) @@ -733,7 +733,7 @@ static int blkvsc_do_read_capacity16(struct block_device_context *blkdev) return 0; } -/** +/* * blkvsc_remove() - Callback when our device is removed */ static int blkvsc_remove(struct device *device) @@ -940,7 +940,7 @@ static int blkvsc_do_request(struct block_device_context *blkdev, int pending = 0; struct blkvsc_request_group *group = NULL; - DPRINT_DBG(BLKVSC_DRV, "blkdev %p req %p sect %lu \n", blkdev, req, + DPRINT_DBG(BLKVSC_DRV, "blkdev %p req %p sect %lu\n", blkdev, req, (unsigned long)blk_rq_pos(req)); /* Create a group to tie req to list of blkvsc_reqs */ @@ -1144,7 +1144,7 @@ static void blkvsc_request_completion(struct hv_storvsc_request *request) &blkvsc_req->group->blkvsc_req_list, req_entry) { DPRINT_DBG(BLKVSC_DRV, "completing blkvsc_req %p " - "sect_start %lu sect_count %ld \n", + "sect_start %lu sect_count %ld\n", comp_req, (unsigned long)comp_req->sector_start, comp_req->sector_count); @@ -1198,7 +1198,7 @@ static int blkvsc_cancel_pending_reqs(struct block_device_context *blkdev) &pend_req->group->blkvsc_req_list, req_entry) { DPRINT_DBG(BLKVSC_DRV, "completing blkvsc_req %p " - "sect_start %lu sect_count %ld \n", + "sect_start %lu sect_count %ld\n", comp_req, (unsigned long) comp_req->sector_start, comp_req->sector_count); @@ -1276,7 +1276,7 @@ static void blkvsc_request(struct request_queue *queue) struct request *req; int ret = 0; - DPRINT_DBG(BLKVSC_DRV, "- enter \n"); + DPRINT_DBG(BLKVSC_DRV, "- enter\n"); while ((req = blk_peek_request(queue)) != NULL) { DPRINT_DBG(BLKVSC_DRV, "- req %p\n", req); diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c index ab27d9a4446d..bb3edeae93bb 100644 --- a/drivers/staging/hv/netvsc_drv.c +++ b/drivers/staging/hv/netvsc_drv.c @@ -43,7 +43,6 @@ struct net_device_context { /* point back to our device context */ struct vm_device *device_ctx; - struct net_device_stats stats; }; struct netvsc_driver_context { @@ -58,13 +57,6 @@ static int netvsc_ringbuffer_size = NETVSC_DEVICE_RING_BUFFER_SIZE; /* The one and only one */ static struct netvsc_driver_context g_netvsc_drv; -static struct net_device_stats *netvsc_get_stats(struct net_device *net) -{ - struct net_device_context *net_device_ctx = netdev_priv(net); - - return &net_device_ctx->stats; -} - static void netvsc_set_multicast_list(struct net_device *net) { } @@ -78,9 +70,6 @@ static int netvsc_open(struct net_device *net) DPRINT_ENTER(NETVSC_DRV); if (netif_carrier_ok(net)) { - memset(&net_device_ctx->stats, 0, - sizeof(struct net_device_stats)); - /* Open up the device */ ret = RndisFilterOnOpen(device_obj); if (ret != 0) { @@ -224,8 +213,8 @@ retry_send: if (ret == 0) { ret = NETDEV_TX_OK; - net_device_ctx->stats.tx_bytes += skb->len; - net_device_ctx->stats.tx_packets++; + net->stats.tx_bytes += skb->len; + net->stats.tx_packets++; } else { retries++; if (retries < 4) { @@ -241,7 +230,7 @@ retry_send: DPRINT_INFO(NETVSC_DRV, "net device (%p) stopping", net); ret = NETDEV_TX_BUSY; - net_device_ctx->stats.tx_dropped++; + net->stats.tx_dropped++; netif_stop_queue(net); @@ -259,14 +248,14 @@ retry_send: } DPRINT_DBG(NETVSC_DRV, "# of xmits %lu total size %lu", - net_device_ctx->stats.tx_packets, - net_device_ctx->stats.tx_bytes); + net->stats.tx_packets, + net->stats.tx_bytes); DPRINT_EXIT(NETVSC_DRV); return ret; } -/** +/* * netvsc_linkstatus_callback - Link up/down notification */ static void netvsc_linkstatus_callback(struct hv_device *device_obj, @@ -293,8 +282,9 @@ static void netvsc_linkstatus_callback(struct hv_device *device_obj, DPRINT_EXIT(NETVSC_DRV); } -/** - * netvsc_recv_callback - Callback when we receive a packet from the "wire" on the specified device. +/* + * netvsc_recv_callback - Callback when we receive a packet from the + * "wire" on the specified device. */ static int netvsc_recv_callback(struct hv_device *device_obj, struct hv_netvsc_packet *packet) @@ -304,7 +294,6 @@ static int netvsc_recv_callback(struct hv_device *device_obj, struct net_device_context *net_device_ctx; struct sk_buff *skb; void *data; - int ret; int i; unsigned long flags; @@ -318,12 +307,12 @@ static int netvsc_recv_callback(struct hv_device *device_obj, net_device_ctx = netdev_priv(net); - /* Allocate a skb - TODO preallocate this */ - /* Pad 2-bytes to align IP header to 16 bytes */ - skb = dev_alloc_skb(packet->TotalDataBufferLength + 2); - ASSERT(skb); - skb_reserve(skb, 2); - skb->dev = net; + /* Allocate a skb - TODO direct I/O to pages? */ + skb = netdev_alloc_skb_ip_align(net, packet->TotalDataBufferLength); + if (unlikely(!skb)) { + ++net->stats.rx_dropped; + return 0; + } /* for kmap_atomic */ local_irq_save(flags); @@ -348,28 +337,20 @@ static int netvsc_recv_callback(struct hv_device *device_obj, local_irq_restore(flags); skb->protocol = eth_type_trans(skb, net); - skb->ip_summed = CHECKSUM_NONE; + net->stats.rx_packets++; + net->stats.rx_bytes += skb->len; + /* * Pass the skb back up. Network stack will deallocate the skb when it - * is done + * is done. + * TODO - use NAPI? */ - ret = netif_rx(skb); - - switch (ret) { - case NET_RX_DROP: - net_device_ctx->stats.rx_dropped++; - break; - default: - net_device_ctx->stats.rx_packets++; - net_device_ctx->stats.rx_bytes += skb->len; - break; + netif_rx(skb); - } DPRINT_DBG(NETVSC_DRV, "# of recvs %lu total size %lu", - net_device_ctx->stats.rx_packets, - net_device_ctx->stats.rx_bytes); + net->stats.rx_packets, net->stats.rx_bytes); DPRINT_EXIT(NETVSC_DRV); @@ -380,7 +361,6 @@ static const struct net_device_ops device_ops = { .ndo_open = netvsc_open, .ndo_stop = netvsc_close, .ndo_start_xmit = netvsc_start_xmit, - .ndo_get_stats = netvsc_get_stats, .ndo_set_multicast_list = netvsc_set_multicast_list, }; diff --git a/drivers/staging/hv/osd.c b/drivers/staging/hv/osd.c index 9aea31067295..8c3eb278a81f 100644 --- a/drivers/staging/hv/osd.c +++ b/drivers/staging/hv/osd.c @@ -59,6 +59,15 @@ void *osd_VirtualAllocExec(unsigned int size) #endif } +/** + * osd_PageAlloc() - Allocate pages + * @count: Total number of Kernel pages you want to allocate + * + * Tries to allocate @count number of consecutive free kernel pages. + * And if successful, it will set the pages to 0 before returning. + * If successfull it will return pointer to the @count pages. + * Mainly used by Hyper-V drivers. + */ void *osd_PageAlloc(unsigned int count) { void *p; @@ -78,6 +87,14 @@ void *osd_PageAlloc(unsigned int count) } EXPORT_SYMBOL_GPL(osd_PageAlloc); +/** + * osd_PageFree() - Free pages + * @page: Pointer to the first page to be freed + * @count: Total number of Kernel pages you free + * + * Frees the pages allocated by osd_PageAlloc() + * Mainly used by Hyper-V drivers. + */ void osd_PageFree(void *page, unsigned int count) { free_pages((unsigned long)page, get_order(count * PAGE_SIZE)); @@ -86,6 +103,17 @@ void osd_PageFree(void *page, unsigned int count) } EXPORT_SYMBOL_GPL(osd_PageFree); +/** + * osd_WaitEventCreate() - Create the event queue + * + * Allocates memory for a &struct osd_waitevent. And then calls + * init_waitqueue_head to set up the wait queue for the event. + * This structure is usually part of a another structure that contains + * the actual Hyper-V device driver structure. + * + * Returns pointer to &struct osd_waitevent + * Mainly used by Hyper-V drivers. + */ struct osd_waitevent *osd_WaitEventCreate(void) { struct osd_waitevent *wait = kmalloc(sizeof(struct osd_waitevent), @@ -99,6 +127,19 @@ struct osd_waitevent *osd_WaitEventCreate(void) } EXPORT_SYMBOL_GPL(osd_WaitEventCreate); + +/** + * osd_WaitEventSet() - Wake up the process + * @waitEvent: Structure to event to be woken up + * + * @waitevent is of type &struct osd_waitevent + * + * Wake up the sleeping process so it can do some work. + * And set condition indicator in &struct osd_waitevent to indicate + * the process is in a woken state. + * + * Only used by Network and Storage Hyper-V drivers. + */ void osd_WaitEventSet(struct osd_waitevent *waitEvent) { waitEvent->condition = 1; @@ -106,6 +147,20 @@ void osd_WaitEventSet(struct osd_waitevent *waitEvent) } EXPORT_SYMBOL_GPL(osd_WaitEventSet); +/** + * osd_WaitEventWait() - Wait for event till condition is true + * @waitEvent: Structure to event to be put to sleep + * + * @waitevent is of type &struct osd_waitevent + * + * Set up the process to sleep until waitEvent->condition get true. + * And set condition indicator in &struct osd_waitevent to indicate + * the process is in a sleeping state. + * + * Returns the status of 'wait_event_interruptible()' system call + * + * Mainly used by Hyper-V drivers. + */ int osd_WaitEventWait(struct osd_waitevent *waitEvent) { int ret = 0; @@ -117,6 +172,21 @@ int osd_WaitEventWait(struct osd_waitevent *waitEvent) } EXPORT_SYMBOL_GPL(osd_WaitEventWait); +/** + * osd_WaitEventWaitEx() - Wait for event or timeout for process wakeup + * @waitEvent: Structure to event to be put to sleep + * @TimeoutInMs: Total number of Milliseconds to wait before waking up + * + * @waitevent is of type &struct osd_waitevent + * Set up the process to sleep until @waitEvent->condition get true or + * @TimeoutInMs (Time out in Milliseconds) has been reached. + * And set condition indicator in &struct osd_waitevent to indicate + * the process is in a sleeping state. + * + * Returns the status of 'wait_event_interruptible_timeout()' system call + * + * Mainly used by Hyper-V drivers. + */ int osd_WaitEventWaitEx(struct osd_waitevent *waitEvent, u32 TimeoutInMs) { int ret = 0; diff --git a/drivers/staging/hv/rndis.h b/drivers/staging/hv/rndis.h index 7c73277c1f9a..723e1f15b90d 100644 --- a/drivers/staging/hv/rndis.h +++ b/drivers/staging/hv/rndis.h @@ -622,7 +622,7 @@ struct rndis_message { /* get the size of an RNDIS message. Pass in the message type, */ /* struct rndis_set_request, struct rndis_packet for example */ #define RNDIS_MESSAGE_SIZE(Message) \ - (sizeof(Message) + (sizeof(struct rndis_message) - \ + (sizeof(Message) + (sizeof(struct rndis_message) - \ sizeof(union rndis_message_container))) /* get pointer to info buffer with message pointer */ diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c index 8a58272b8039..5e28e4c36434 100644 --- a/drivers/staging/hv/storvsc_drv.c +++ b/drivers/staging/hv/storvsc_drv.c @@ -112,7 +112,7 @@ static struct scsi_host_template scsi_driver = { .slave_configure = storvsc_device_configure, .cmd_per_lun = 1, /* 64 max_queue * 1 target */ - .can_queue = STORVSC_MAX_IO_REQUESTS*STORVSC_MAX_TARGETS, + .can_queue = STORVSC_MAX_IO_REQUESTS*STORVSC_MAX_TARGETS, .this_id = -1, /* no use setting to 0 since ll_blk_rw reset it to 1 */ /* currently 32 */ @@ -130,7 +130,7 @@ static struct scsi_host_template scsi_driver = { }; -/** +/* * storvsc_drv_init - StorVsc driver initialization. */ static int storvsc_drv_init(int (*drv_init)(struct hv_driver *drv)) @@ -223,7 +223,7 @@ static void storvsc_drv_exit(void) return; } -/** +/* * storvsc_probe - Add a new device for this driver */ static int storvsc_probe(struct device *device) @@ -319,7 +319,7 @@ static int storvsc_probe(struct device *device) return ret; } -/** +/* * storvsc_remove - Callback when our device is removed */ static int storvsc_remove(struct device *device) @@ -372,7 +372,7 @@ static int storvsc_remove(struct device *device) return ret; } -/** +/* * storvsc_commmand_completion - Command completion processing */ static void storvsc_commmand_completion(struct hv_storvsc_request *request) @@ -623,7 +623,7 @@ static unsigned int copy_from_bounce_buffer(struct scatterlist *orig_sgl, return total_copied; } -/** +/* * storvsc_queuecommand - Initiate command processing */ static int storvsc_queuecommand(struct scsi_cmnd *scmnd, @@ -767,7 +767,7 @@ static int storvsc_queuecommand(struct scsi_cmnd *scmnd, request->DataBuffer.Offset = sgl[0].offset; for (i = 0; i < scsi_sg_count(scmnd); i++) { - DPRINT_DBG(STORVSC_DRV, "sgl[%d] len %d offset %d \n", + DPRINT_DBG(STORVSC_DRV, "sgl[%d] len %d offset %d\n", i, sgl[i].length, sgl[i].offset); request->DataBuffer.PfnArray[i] = page_to_pfn(sg_page((&sgl[i]))); @@ -824,7 +824,7 @@ static int storvsc_merge_bvec(struct request_queue *q, return bvec->bv_len; } -/** +/* * storvsc_device_configure - Configure the specified scsi device */ static int storvsc_device_alloc(struct scsi_device *sdevice) @@ -863,7 +863,7 @@ static int storvsc_device_configure(struct scsi_device *sdevice) return 0; } -/** +/* * storvsc_host_reset_handler - Reset the scsi HBA */ static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd) diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 3397ef08e0aa..d2a82aa3bbd8 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c @@ -129,7 +129,7 @@ static struct vmbus_driver_context g_vmbus_drv = { .bus.dev_attrs = vmbus_device_attrs, }; -/** +/* * vmbus_show_device_attr - Show the device attribute in sysfs. * * This is invoked when user does a @@ -233,17 +233,17 @@ static ssize_t vmbus_show_device_attr(struct device *dev, } } -/** +/* * vmbus_bus_init -Main vmbus driver initialization routine. * * Here, we - * - initialize the vmbus driver context - * - setup various driver entry points - * - invoke the vmbus hv main init routine - * - get the irq resource - * - invoke the vmbus to add the vmbus root device - * - setup the vmbus root device - * - retrieve the channel offers + * - initialize the vmbus driver context + * - setup various driver entry points + * - invoke the vmbus hv main init routine + * - get the irq resource + * - invoke the vmbus to add the vmbus root device + * - setup the vmbus root device + * - retrieve the channel offers */ static int vmbus_bus_init(int (*drv_init)(struct hv_driver *drv)) { @@ -362,7 +362,7 @@ cleanup: return ret; } -/** +/* * vmbus_bus_exit - Terminate the vmbus driver. * * This routine is opposite of vmbus_bus_init() @@ -398,8 +398,18 @@ static void vmbus_bus_exit(void) return; } + /** - * vmbus_child_driver_register - Register a vmbus's child driver + * vmbus_child_driver_register() - Register a vmbus's child driver + * @driver_ctx: Pointer to driver structure you want to register + * + * @driver_ctx is of type &struct driver_context + * + * Registers the given driver with Linux through the 'driver_register()' call + * And sets up the hyper-v vmbus handling for this driver. + * It will return the state of the 'driver_register()' call. + * + * Mainly used by Hyper-V drivers. */ int vmbus_child_driver_register(struct driver_context *driver_ctx) { @@ -425,7 +435,15 @@ int vmbus_child_driver_register(struct driver_context *driver_ctx) EXPORT_SYMBOL(vmbus_child_driver_register); /** - * vmbus_child_driver_unregister Unregister a vmbus's child driver + * vmbus_child_driver_unregister() - Unregister a vmbus's child driver + * @driver_ctx: Pointer to driver structure you want to un-register + * + * @driver_ctx is of type &struct driver_context + * + * Un-register the given driver with Linux through the 'driver_unregister()' + * call. And ungegisters the driver from the Hyper-V vmbus handler. + * + * Mainly used by Hyper-V drivers. */ void vmbus_child_driver_unregister(struct driver_context *driver_ctx) { @@ -443,9 +461,15 @@ void vmbus_child_driver_unregister(struct driver_context *driver_ctx) EXPORT_SYMBOL(vmbus_child_driver_unregister); /** - * vmbus_get_interface - Get the vmbus channel interface. + * vmbus_get_interface() - Get the vmbus channel interface. + * @interface: Pointer to channel interface structure + * + * Get the Hyper-V channel used for the driver. + * + * @interface is of type &struct vmbus_channel_interface + * This is invoked by child/client driver that sits above vmbus. * - * This is invoked by child/client driver that sits above vmbus + * Mainly used by Hyper-V drivers. */ void vmbus_get_interface(struct vmbus_channel_interface *interface) { @@ -455,7 +479,7 @@ void vmbus_get_interface(struct vmbus_channel_interface *interface) } EXPORT_SYMBOL(vmbus_get_interface); -/** +/* * vmbus_child_device_get_info - Get the vmbus child device info. * * This is invoked to display various device attributes in sysfs. @@ -468,8 +492,9 @@ static void vmbus_child_device_get_info(struct hv_device *device_obj, vmbus_drv_obj->GetChannelInfo(device_obj, device_info); } -/** - * vmbus_child_device_create - Creates and registers a new child device on the vmbus. +/* + * vmbus_child_device_create - Creates and registers a new child device + * on the vmbus. */ static struct hv_device *vmbus_child_device_create(struct hv_guid *type, struct hv_guid *instance, @@ -523,7 +548,7 @@ static struct hv_device *vmbus_child_device_create(struct hv_guid *type, return child_device_obj; } -/** +/* * vmbus_child_device_register - Register the child device on the specified bus */ static int vmbus_child_device_register(struct hv_device *root_device_obj, @@ -571,8 +596,9 @@ static int vmbus_child_device_register(struct hv_device *root_device_obj, return ret; } -/** - * vmbus_child_device_unregister - Remove the specified child device from the vmbus. +/* + * vmbus_child_device_unregister - Remove the specified child device + * from the vmbus. */ static void vmbus_child_device_unregister(struct hv_device *device_obj) { @@ -595,7 +621,7 @@ static void vmbus_child_device_unregister(struct hv_device *device_obj) DPRINT_EXIT(VMBUS_DRV); } -/** +/* * vmbus_child_device_destroy - Destroy the specified child device on the vmbus. */ static void vmbus_child_device_destroy(struct hv_device *device_obj) @@ -605,7 +631,7 @@ static void vmbus_child_device_destroy(struct hv_device *device_obj) DPRINT_EXIT(VMBUS_DRV); } -/** +/* * vmbus_uevent - add uevent for our device * * This routine is invoked when a device is added or removed on the vmbus to @@ -684,7 +710,7 @@ static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env) return 0; } -/** +/* * vmbus_match - Attempt to match the specified device to the specified driver */ static int vmbus_match(struct device *device, struct device_driver *driver) @@ -719,7 +745,7 @@ static int vmbus_match(struct device *device, struct device_driver *driver) return match; } -/** +/* * vmbus_probe_failed_cb - Callback when a driver probe failed in vmbus_probe() * * We need a callback because we cannot invoked device_unregister() inside @@ -742,7 +768,7 @@ static void vmbus_probe_failed_cb(struct work_struct *context) DPRINT_EXIT(VMBUS_DRV); } -/** +/* * vmbus_probe - Add the new vmbus's child device */ static int vmbus_probe(struct device *child_device) @@ -778,7 +804,7 @@ static int vmbus_probe(struct device *child_device) return ret; } -/** +/* * vmbus_remove - Remove a vmbus device */ static int vmbus_remove(struct device *child_device) @@ -820,7 +846,7 @@ static int vmbus_remove(struct device *child_device) return 0; } -/** +/* * vmbus_shutdown - Shutdown a vmbus device */ static void vmbus_shutdown(struct device *child_device) @@ -856,7 +882,7 @@ static void vmbus_shutdown(struct device *child_device) return; } -/** +/* * vmbus_bus_release - Final callback release of the vmbus root device */ static void vmbus_bus_release(struct device *device) @@ -870,7 +896,7 @@ static void vmbus_bus_release(struct device *device) DPRINT_EXIT(VMBUS_DRV); } -/** +/* * vmbus_device_release - Final callback release of the vmbus child device */ static void vmbus_device_release(struct device *device) @@ -888,7 +914,7 @@ static void vmbus_device_release(struct device *device) return; } -/** +/* * vmbus_msg_dpc - Tasklet routine to handle hypervisor messages */ static void vmbus_msg_dpc(unsigned long data) @@ -905,7 +931,7 @@ static void vmbus_msg_dpc(unsigned long data) DPRINT_EXIT(VMBUS_DRV); } -/** +/* * vmbus_msg_dpc - Tasklet routine to handle hypervisor events */ static void vmbus_event_dpc(unsigned long data) diff --git a/drivers/staging/hv/vstorage.h b/drivers/staging/hv/vstorage.h index 6d160a53914e..4ea597d7a7d7 100644 --- a/drivers/staging/hv/vstorage.h +++ b/drivers/staging/hv/vstorage.h @@ -28,7 +28,7 @@ #define REVISION_STRING(REVISION_) #REVISION_ #define FILL_VMSTOR_REVISION(RESULT_LVALUE_) \ { \ - char *revisionString = REVISION_STRING($Revision: 6 $) + 11; \ + char *revisionString = REVISION_STRING($Revision : 6 $) + 11; \ RESULT_LVALUE_ = 0; \ while (*revisionString >= '0' && *revisionString <= '9') { \ RESULT_LVALUE_ *= 10; \ diff --git a/drivers/staging/iio/industrialio-ring.c b/drivers/staging/iio/industrialio-ring.c index e53e214bfeb0..5f48632e4258 100644 --- a/drivers/staging/iio/industrialio-ring.c +++ b/drivers/staging/iio/industrialio-ring.c @@ -266,6 +266,8 @@ void iio_ring_buffer_init(struct iio_ring_buffer *ring, ring->indio_dev = dev_info; ring->ev_int.private = ring; ring->access_handler.private = ring; + ring->shared_ev_pointer.ev_p = 0; + spin_lock_init(&ring->shared_ev_pointer.lock); } EXPORT_SYMBOL(iio_ring_buffer_init); diff --git a/drivers/staging/iio/ring_generic.h b/drivers/staging/iio/ring_generic.h index 09044adf7327..75e0fc078d68 100644 --- a/drivers/staging/iio/ring_generic.h +++ b/drivers/staging/iio/ring_generic.h @@ -134,19 +134,17 @@ void iio_ring_buffer_init(struct iio_ring_buffer *ring, struct iio_dev *dev_info); /** - * __iio_init_ring_buffer() - initialize common elements of ring buffers + * __iio_update_ring_buffer() - update common elements of ring buffers * @ring: ring buffer that is the event source * @bytes_per_datum: size of individual datum including timestamp * @length: number of datums in ring **/ -static inline void __iio_init_ring_buffer(struct iio_ring_buffer *ring, - int bytes_per_datum, int length) +static inline void __iio_update_ring_buffer(struct iio_ring_buffer *ring, + int bytes_per_datum, int length) { ring->bpd = bytes_per_datum; ring->length = length; ring->loopcount = 0; - ring->shared_ev_pointer.ev_p = 0; - spin_lock_init(&ring->shared_ev_pointer.lock); } /** diff --git a/drivers/staging/iio/ring_sw.c b/drivers/staging/iio/ring_sw.c index cf22c091668c..e95b6a4df161 100644 --- a/drivers/staging/iio/ring_sw.c +++ b/drivers/staging/iio/ring_sw.c @@ -14,14 +14,12 @@ #include <linux/workqueue.h> #include "ring_sw.h" -static inline int __iio_init_sw_ring_buffer(struct iio_sw_ring_buffer *ring, - int bytes_per_datum, int length) +static inline int __iio_allocate_sw_ring_buffer(struct iio_sw_ring_buffer *ring, + int bytes_per_datum, int length) { if ((length == 0) || (bytes_per_datum == 0)) return -EINVAL; - - __iio_init_ring_buffer(&ring->buf, bytes_per_datum, length); - spin_lock_init(&ring->use_lock); + __iio_update_ring_buffer(&ring->buf, bytes_per_datum, length); ring->data = kmalloc(length*ring->buf.bpd, GFP_KERNEL); ring->read_p = 0; ring->write_p = 0; @@ -30,6 +28,11 @@ static inline int __iio_init_sw_ring_buffer(struct iio_sw_ring_buffer *ring, return ring->data ? 0 : -ENOMEM; } +static inline void __iio_init_sw_ring_buffer(struct iio_sw_ring_buffer *ring) +{ + spin_lock_init(&ring->use_lock); +} + static inline void __iio_free_sw_ring_buffer(struct iio_sw_ring_buffer *ring) { kfree(ring->data); @@ -320,7 +323,8 @@ int iio_request_update_sw_rb(struct iio_ring_buffer *r) goto error_ret; } __iio_free_sw_ring_buffer(ring); - ret = __iio_init_sw_ring_buffer(ring, ring->buf.bpd, ring->buf.length); + ret = __iio_allocate_sw_ring_buffer(ring, ring->buf.bpd, + ring->buf.length); error_ret: spin_unlock(&ring->use_lock); return ret; @@ -411,8 +415,8 @@ struct iio_ring_buffer *iio_sw_rb_allocate(struct iio_dev *indio_dev) if (!ring) return 0; buf = &ring->buf; - iio_ring_buffer_init(buf, indio_dev); + __iio_init_sw_ring_buffer(ring); buf->dev.type = &iio_sw_ring_type; device_initialize(&buf->dev); buf->dev.parent = &indio_dev->dev; diff --git a/drivers/staging/memrar/Kconfig b/drivers/staging/memrar/Kconfig new file mode 100644 index 000000000000..a5598a86f668 --- /dev/null +++ b/drivers/staging/memrar/Kconfig @@ -0,0 +1,15 @@ +config MRST_RAR_HANDLER + tristate "RAR handler driver for Intel Moorestown platform" + select RAR_REGISTER + ---help--- + This driver provides a memory management interface to + restricted access regions (RAR) available on the Intel + Moorestown platform. + + Once locked down, restricted access regions are only + accessible by specific hardware on the platform. The x86 + CPU is typically not one of those platforms. As such this + driver does not access RAR, and only provides a buffer + allocation/bookkeeping mechanism. + + If unsure, say N. diff --git a/drivers/staging/memrar/Makefile b/drivers/staging/memrar/Makefile new file mode 100644 index 000000000000..a3336c00cc5f --- /dev/null +++ b/drivers/staging/memrar/Makefile @@ -0,0 +1,2 @@ +obj-$(CONFIG_MRST_RAR_HANDLER) += memrar.o +memrar-y := memrar_allocator.o memrar_handler.o diff --git a/drivers/staging/memrar/TODO b/drivers/staging/memrar/TODO new file mode 100644 index 000000000000..0087447d5034 --- /dev/null +++ b/drivers/staging/memrar/TODO @@ -0,0 +1,43 @@ +RAR Handler (memrar) Driver TODO Items +====================================== + +Maintainer: Ossama Othman <ossama.othman@intel.com> + +memrar.h +-------- +1. This header exposes the driver's user space and kernel space + interfaces. It should be moved to <linux/rar/memrar.h>, or + something along those lines, when this memrar driver is moved out + of `staging'. + a. It would be ideal if staging/rar_register/rar_register.h was + moved to the same directory. + +memrar_allocator.[ch] +--------------------- +1. Address potential fragmentation issues with the memrar_allocator. + +2. Hide struct memrar_allocator details/fields. They need not be + exposed to the user. + a. Forward declare struct memrar_allocator. + b. Move all three struct definitions to `memrar_allocator.c' + source file. + c. Add a memrar_allocator_largest_free_area() function, or + something like that to get access to the value of the struct + memrar_allocator "largest_free_area" field. This allows the + struct memrar_allocator fields to be completely hidden from + the user. The memrar_handler code really only needs this for + statistic gathering on-demand. + d. Do the same for the "capacity" field as the + "largest_free_area" field. + +3. Move memrar_allocator.* to kernel `lib' directory since it is HW + neutral. + a. Alternatively, use lib/genalloc.c instead. + b. A kernel port of Doug Lea's malloc() implementation may also + be an option. + +memrar_handler.c +---------------- +1. Split user space interface (ioctl code) from core/kernel code, + e.g.: + memrar_handler.c -> memrar_core.c, memrar_user.c diff --git a/drivers/staging/memrar/memrar.h b/drivers/staging/memrar/memrar.h new file mode 100644 index 000000000000..0b735b827c09 --- /dev/null +++ b/drivers/staging/memrar/memrar.h @@ -0,0 +1,155 @@ +/* + * RAR Handler (/dev/memrar) internal driver API. + * Copyright (C) 2010 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General + * Public License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be + * useful, but WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more details. + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + * The full GNU General Public License is included in this + * distribution in the file called COPYING. + */ + + +#ifndef _MEMRAR_H +#define _MEMRAR_H + +#include <linux/ioctl.h> +#include <linux/types.h> + + +/** + * struct RAR_stat - RAR statistics structure + * @type: Type of RAR memory (e.g., audio vs. video) + * @capacity: Total size of RAR memory region. + * @largest_block_size: Size of the largest reservable block. + * + * This structure is used for RAR_HANDLER_STAT ioctl and for the + * RAR_get_stat() user space wrapper function. + */ +struct RAR_stat { + __u32 type; + __u32 capacity; + __u32 largest_block_size; +}; + + +/** + * struct RAR_block_info - user space struct that describes RAR buffer + * @type: Type of RAR memory (e.g., audio vs. video) + * @size: Requested size of a block to be reserved in RAR. + * @handle: Handle that can be used to refer to reserved block. + * + * This is the basic structure exposed to the user space that + * describes a given RAR buffer. The buffer's underlying bus address + * is not exposed to the user. User space code refers to the buffer + * entirely by "handle". + */ +struct RAR_block_info { + __u32 type; + __u32 size; + __u32 handle; +}; + + +#define RAR_IOCTL_BASE 0xE0 + +/* Reserve RAR block. */ +#define RAR_HANDLER_RESERVE _IOWR(RAR_IOCTL_BASE, 0x00, struct RAR_block_info) + +/* Release previously reserved RAR block. */ +#define RAR_HANDLER_RELEASE _IOW(RAR_IOCTL_BASE, 0x01, __u32) + +/* Get RAR stats. */ +#define RAR_HANDLER_STAT _IOWR(RAR_IOCTL_BASE, 0x02, struct RAR_stat) + + +#ifdef __KERNEL__ + +/* -------------------------------------------------------------- */ +/* Kernel Side RAR Handler Interface */ +/* -------------------------------------------------------------- */ + +/** + * struct RAR_buffer - kernel space struct that describes RAR buffer + * @info: structure containing base RAR buffer information + * @bus_address: buffer bus address + * + * Structure that contains all information related to a given block of + * memory in RAR. It is generally only used when retrieving RAR + * related bus addresses. + * + * Note: This structure is used only by RAR-enabled drivers, and is + * not intended to be exposed to the user space. + */ +struct RAR_buffer { + struct RAR_block_info info; + dma_addr_t bus_address; +}; + +/** + * rar_reserve() - reserve RAR buffers + * @buffers: array of RAR_buffers where type and size of buffers to + * reserve are passed in, handle and bus address are + * passed out + * @count: number of RAR_buffers in the "buffers" array + * + * This function will reserve buffers in the restricted access regions + * of given types. + * + * It returns the number of successfully reserved buffers. Successful + * buffer reservations will have the corresponding bus_address field + * set to a non-zero value in the given buffers vector. + */ +extern size_t rar_reserve(struct RAR_buffer *buffers, + size_t count); + +/** + * rar_release() - release RAR buffers + * @buffers: array of RAR_buffers where handles to buffers to be + * released are passed in + * @count: number of RAR_buffers in the "buffers" array + * + * This function will release RAR buffers that were retrieved through + * a call to rar_reserve() or rar_handle_to_bus() by decrementing the + * reference count. The RAR buffer will be reclaimed when the + * reference count drops to zero. + * + * It returns the number of successfully released buffers. Successful + * releases will have their handle field set to zero in the given + * buffers vector. + */ +extern size_t rar_release(struct RAR_buffer *buffers, + size_t count); + +/** + * rar_handle_to_bus() - convert a vector of RAR handles to bus addresses + * @buffers: array of RAR_buffers containing handles to be + * converted to bus_addresses + * @count: number of RAR_buffers in the "buffers" array + + * This function will retrieve the RAR buffer bus addresses, type and + * size corresponding to the RAR handles provided in the buffers + * vector. + * + * It returns the number of successfully converted buffers. The bus + * address will be set to 0 for unrecognized handles. + * + * The reference count for each corresponding buffer in RAR will be + * incremented. Call rar_release() when done with the buffers. + */ +extern size_t rar_handle_to_bus(struct RAR_buffer *buffers, + size_t count); + + +#endif /* __KERNEL__ */ + +#endif /* _MEMRAR_H */ diff --git a/drivers/staging/memrar/memrar_allocator.c b/drivers/staging/memrar/memrar_allocator.c new file mode 100644 index 000000000000..a4f8c5846a00 --- /dev/null +++ b/drivers/staging/memrar/memrar_allocator.c @@ -0,0 +1,432 @@ +/* + * memrar_allocator 1.0: An allocator for Intel RAR. + * + * Copyright (C) 2010 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General + * Public License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be + * useful, but WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more details. + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + * The full GNU General Public License is included in this + * distribution in the file called COPYING. + * + * + * ------------------------------------------------------------------ + * + * This simple allocator implementation provides a + * malloc()/free()-like interface for reserving space within a + * previously reserved block of memory. It is not specific to + * any hardware, nor is it coupled with the lower level paging + * mechanism. + * + * The primary goal of this implementation is to provide a means + * to partition an arbitrary block of memory without actually + * accessing the memory or incurring any hardware side-effects + * (e.g. paging). It is, in effect, a bookkeeping mechanism for + * buffers. + */ + + +#include "memrar_allocator.h" +#include <linux/slab.h> +#include <linux/bug.h> +#include <linux/kernel.h> + + +struct memrar_allocator *memrar_create_allocator(unsigned long base, + size_t capacity, + size_t block_size) +{ + struct memrar_allocator *allocator = NULL; + struct memrar_address_ranges *first_node = NULL; + + /* + * Make sure the base address is aligned on a block_size + * boundary. + * + * @todo Is this necessary? + */ + /* base = ALIGN(base, block_size); */ + + /* Validate parameters. + * + * Make sure we can allocate the entire memory space. Zero + * capacity or block size are obviously invalid. + */ + if (base == 0 + || capacity == 0 + || block_size == 0 + || ULONG_MAX - capacity < base + || capacity < block_size) + return allocator; + + /* + * There isn't much point in creating a memory allocator that + * is only capable of holding one block but we'll allow it, + * and issue a diagnostic. + */ + WARN(capacity < block_size * 2, + "memrar: Only one block available to allocator.\n"); + + allocator = kmalloc(sizeof(*allocator), GFP_KERNEL); + + if (allocator == NULL) + return allocator; + + mutex_init(&allocator->lock); + allocator->base = base; + + /* Round the capacity down to a multiple of block_size. */ + allocator->capacity = (capacity / block_size) * block_size; + + allocator->block_size = block_size; + + allocator->largest_free_area = allocator->capacity; + + /* Initialize the handle and free lists. */ + INIT_LIST_HEAD(&allocator->allocated_list.list); + INIT_LIST_HEAD(&allocator->free_list.list); + + first_node = kmalloc(sizeof(*first_node), GFP_KERNEL); + if (first_node == NULL) { + kfree(allocator); + allocator = NULL; + } else { + /* Full range of blocks is available. */ + first_node->range.begin = base; + first_node->range.end = base + allocator->capacity; + list_add(&first_node->list, + &allocator->free_list.list); + } + + return allocator; +} + +void memrar_destroy_allocator(struct memrar_allocator *allocator) +{ + /* + * Assume that the memory allocator lock isn't held at this + * point in time. Caller must ensure that. + */ + + struct memrar_address_ranges *pos = NULL; + struct memrar_address_ranges *n = NULL; + + if (allocator == NULL) + return; + + mutex_lock(&allocator->lock); + + /* Reclaim free list resources. */ + list_for_each_entry_safe(pos, + n, + &allocator->free_list.list, + list) { + list_del(&pos->list); + kfree(pos); + } + + mutex_unlock(&allocator->lock); + + kfree(allocator); +} + +unsigned long memrar_allocator_alloc(struct memrar_allocator *allocator, + size_t size) +{ + struct memrar_address_ranges *pos = NULL; + + size_t num_blocks; + unsigned long reserved_bytes; + + /* + * Address of allocated buffer. We assume that zero is not a + * valid address. + */ + unsigned long addr = 0; + + if (allocator == NULL || size == 0) + return addr; + + /* Reserve enough blocks to hold the amount of bytes requested. */ + num_blocks = DIV_ROUND_UP(size, allocator->block_size); + + reserved_bytes = num_blocks * allocator->block_size; + + mutex_lock(&allocator->lock); + + if (reserved_bytes > allocator->largest_free_area) { + mutex_unlock(&allocator->lock); + return addr; + } + + /* + * Iterate through the free list to find a suitably sized + * range of free contiguous memory blocks. + * + * We also take the opportunity to reset the size of the + * largest free area size statistic. + */ + list_for_each_entry(pos, &allocator->free_list.list, list) { + struct memrar_address_range * const fr = &pos->range; + size_t const curr_size = fr->end - fr->begin; + + if (curr_size >= reserved_bytes && addr == 0) { + struct memrar_address_range *range = NULL; + struct memrar_address_ranges * const new_node = + kmalloc(sizeof(*new_node), GFP_KERNEL); + + if (new_node == NULL) + break; + + list_add(&new_node->list, + &allocator->allocated_list.list); + + /* + * Carve out area of memory from end of free + * range. + */ + range = &new_node->range; + range->end = fr->end; + fr->end -= reserved_bytes; + range->begin = fr->end; + addr = range->begin; + + /* + * Check if largest area has decreased in + * size. We'll need to continue scanning for + * the next largest area if it has. + */ + if (curr_size == allocator->largest_free_area) + allocator->largest_free_area -= + reserved_bytes; + else + break; + } + + /* + * Reset largest free area size statistic as needed, + * but only if we've actually allocated memory. + */ + if (addr != 0 + && curr_size > allocator->largest_free_area) { + allocator->largest_free_area = curr_size; + break; + } + } + + mutex_unlock(&allocator->lock); + + return addr; +} + +long memrar_allocator_free(struct memrar_allocator *allocator, + unsigned long addr) +{ + struct list_head *pos = NULL; + struct list_head *tmp = NULL; + struct list_head *dst = NULL; + + struct memrar_address_ranges *allocated = NULL; + struct memrar_address_range const *handle = NULL; + + unsigned long old_end = 0; + unsigned long new_chunk_size = 0; + + if (allocator == NULL) + return -EINVAL; + + if (addr == 0) + return 0; /* Ignore "free(0)". */ + + mutex_lock(&allocator->lock); + + /* Find the corresponding handle. */ + list_for_each_entry(allocated, + &allocator->allocated_list.list, + list) { + if (allocated->range.begin == addr) { + handle = &allocated->range; + break; + } + } + + /* No such buffer created by this allocator. */ + if (handle == NULL) { + mutex_unlock(&allocator->lock); + return -EFAULT; + } + + /* + * Coalesce adjacent chunks of memory if possible. + * + * @note This isn't full blown coalescing since we're only + * coalescing at most three chunks of memory. + */ + list_for_each_safe(pos, tmp, &allocator->free_list.list) { + /* @todo O(n) performance. Optimize. */ + + struct memrar_address_range * const chunk = + &list_entry(pos, + struct memrar_address_ranges, + list)->range; + + /* Extend size of existing free adjacent chunk. */ + if (chunk->end == handle->begin) { + /* + * Chunk "less than" than the one we're + * freeing is adjacent. + * + * Before: + * + * +-----+------+ + * |chunk|handle| + * +-----+------+ + * + * After: + * + * +------------+ + * | chunk | + * +------------+ + */ + + struct memrar_address_ranges const * const next = + list_entry(pos->next, + struct memrar_address_ranges, + list); + + chunk->end = handle->end; + + /* + * Now check if next free chunk is adjacent to + * the current extended free chunk. + * + * Before: + * + * +------------+----+ + * | chunk |next| + * +------------+----+ + * + * After: + * + * +-----------------+ + * | chunk | + * +-----------------+ + */ + if (!list_is_singular(pos) + && chunk->end == next->range.begin) { + chunk->end = next->range.end; + list_del(pos->next); + kfree(next); + } + + list_del(&allocated->list); + + new_chunk_size = chunk->end - chunk->begin; + + goto exit_memrar_free; + + } else if (handle->end == chunk->begin) { + /* + * Chunk "greater than" than the one we're + * freeing is adjacent. + * + * +------+-----+ + * |handle|chunk| + * +------+-----+ + * + * After: + * + * +------------+ + * | chunk | + * +------------+ + */ + + struct memrar_address_ranges const * const prev = + list_entry(pos->prev, + struct memrar_address_ranges, + list); + + chunk->begin = handle->begin; + + /* + * Now check if previous free chunk is + * adjacent to the current extended free + * chunk. + * + * + * Before: + * + * +----+------------+ + * |prev| chunk | + * +----+------------+ + * + * After: + * + * +-----------------+ + * | chunk | + * +-----------------+ + */ + if (!list_is_singular(pos) + && prev->range.end == chunk->begin) { + chunk->begin = prev->range.begin; + list_del(pos->prev); + kfree(prev); + } + + list_del(&allocated->list); + + new_chunk_size = chunk->end - chunk->begin; + + goto exit_memrar_free; + + } else if (chunk->end < handle->begin + && chunk->end > old_end) { + /* Keep track of where the entry could be + * potentially moved from the "allocated" list + * to the "free" list if coalescing doesn't + * occur, making sure the "free" list remains + * sorted. + */ + old_end = chunk->end; + dst = pos; + } + } + + /* + * Nothing to coalesce. + * + * Move the entry from the "allocated" list to the "free" + * list. + */ + list_move(&allocated->list, dst); + new_chunk_size = handle->end - handle->begin; + allocated = NULL; + +exit_memrar_free: + + if (new_chunk_size > allocator->largest_free_area) + allocator->largest_free_area = new_chunk_size; + + mutex_unlock(&allocator->lock); + + kfree(allocated); + + return 0; +} + + + +/* + Local Variables: + c-file-style: "linux" + End: +*/ diff --git a/drivers/staging/memrar/memrar_allocator.h b/drivers/staging/memrar/memrar_allocator.h new file mode 100644 index 000000000000..0b80dead710f --- /dev/null +++ b/drivers/staging/memrar/memrar_allocator.h @@ -0,0 +1,149 @@ +/* + * Copyright (C) 2010 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General + * Public License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be + * useful, but WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more details. + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + * The full GNU General Public License is included in this + * distribution in the file called COPYING. + */ + +#ifndef MEMRAR_ALLOCATOR_H +#define MEMRAR_ALLOCATOR_H + + +#include <linux/mutex.h> +#include <linux/list.h> +#include <linux/types.h> +#include <linux/kernel.h> + + +/** + * struct memrar_address_range - struct that describes a memory range + * @begin: Beginning of available address range. + * @end: End of available address range, one past the end, + * i.e. [begin, end). + */ +struct memrar_address_range { +/* private: internal use only */ + unsigned long begin; + unsigned long end; +}; + +/** + * struct memrar_address_ranges - list of areas of memory. + * @list: Linked list of address ranges. + * @range: Memory address range corresponding to given list node. + */ +struct memrar_address_ranges { +/* private: internal use only */ + struct list_head list; + struct memrar_address_range range; +}; + +/** + * struct memrar_allocator - encapsulation of the memory allocator state + * @lock: Lock used to synchronize access to the memory + * allocator state. + * @base: Base (start) address of the allocator memory + * space. + * @capacity: Size of the allocator memory space in bytes. + * @block_size: The size in bytes of individual blocks within + * the allocator memory space. + * @largest_free_area: Largest free area of memory in the allocator + * in bytes. + * @allocated_list: List of allocated memory block address + * ranges. + * @free_list: List of free address ranges. + * + * This structure contains all memory allocator state, including the + * base address, capacity, free list, lock, etc. + */ +struct memrar_allocator { +/* private: internal use only */ + struct mutex lock; + unsigned long base; + size_t capacity; + size_t block_size; + size_t largest_free_area; + struct memrar_address_ranges allocated_list; + struct memrar_address_ranges free_list; +}; + +/** + * memrar_create_allocator() - create a memory allocator + * @base: Address at which the memory allocator begins. + * @capacity: Desired size of the memory allocator. This value must + * be larger than the block_size, ideally more than twice + * as large since there wouldn't be much point in using a + * memory allocator otherwise. + * @block_size: The size of individual blocks within the memory + * allocator. This value must smaller than the + * capacity. + * + * Create a memory allocator with the given capacity and block size. + * The capacity will be reduced to be a multiple of the block size, if + * necessary. + * + * Returns an instance of the memory allocator, if creation succeeds, + * otherwise zero if creation fails. Failure may occur if not enough + * kernel memory exists to create the memrar_allocator instance + * itself, or if the capacity and block_size arguments are not + * compatible or make sense. + */ +struct memrar_allocator *memrar_create_allocator(unsigned long base, + size_t capacity, + size_t block_size); + +/** + * memrar_destroy_allocator() - destroy allocator + * @allocator: The allocator being destroyed. + * + * Reclaim resources held by the memory allocator. The caller must + * explicitly free all memory reserved by memrar_allocator_alloc() + * prior to calling this function. Otherwise leaks will occur. + */ +void memrar_destroy_allocator(struct memrar_allocator *allocator); + +/** + * memrar_allocator_alloc() - reserve an area of memory of given size + * @allocator: The allocator instance being used to reserve buffer. + * @size: The size in bytes of the buffer to allocate. + * + * This functions reserves an area of memory managed by the given + * allocator. It returns zero if allocation was not possible. + * Failure may occur if the allocator no longer has space available. + */ +unsigned long memrar_allocator_alloc(struct memrar_allocator *allocator, + size_t size); + +/** + * memrar_allocator_free() - release buffer starting at given address + * @allocator: The allocator instance being used to release the buffer. + * @address: The address of the buffer being released. + * + * Release an area of memory starting at the given address. Failure + * could occur if the given address is not in the address space + * managed by the allocator. Returns zero on success or an errno + * (negative value) on failure. + */ +long memrar_allocator_free(struct memrar_allocator *allocator, + unsigned long address); + +#endif /* MEMRAR_ALLOCATOR_H */ + + +/* + Local Variables: + c-file-style: "linux" + End: +*/ diff --git a/drivers/staging/memrar/memrar_handler.c b/drivers/staging/memrar/memrar_handler.c new file mode 100644 index 000000000000..4bbf66f4223d --- /dev/null +++ b/drivers/staging/memrar/memrar_handler.c @@ -0,0 +1,937 @@ +/* + * memrar_handler 1.0: An Intel restricted access region handler device + * + * Copyright (C) 2010 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of version 2 of the GNU General + * Public License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be + * useful, but WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more details. + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + * The full GNU General Public License is included in this + * distribution in the file called COPYING. + * + * ------------------------------------------------------------------- + * + * Moorestown restricted access regions (RAR) provide isolated + * areas of main memory that are only acceessible by authorized + * devices. + * + * The Intel Moorestown RAR handler module exposes a kernel space + * RAR memory management mechanism. It is essentially a + * RAR-specific allocator. + * + * Besides providing RAR buffer management, the RAR handler also + * behaves in many ways like an OS virtual memory manager. For + * example, the RAR "handles" created by the RAR handler are + * analogous to user space virtual addresses. + * + * RAR memory itself is never accessed directly by the RAR + * handler. + */ + +#include <linux/miscdevice.h> +#include <linux/fs.h> +#include <linux/slab.h> +#include <linux/kref.h> +#include <linux/mutex.h> +#include <linux/kernel.h> +#include <linux/uaccess.h> +#include <linux/mm.h> +#include <linux/ioport.h> +#include <linux/io.h> + +#include "../rar_register/rar_register.h" + +#include "memrar.h" +#include "memrar_allocator.h" + + +#define MEMRAR_VER "1.0" + +/* + * Moorestown supports three restricted access regions. + * + * We only care about the first two, video and audio. The third, + * reserved for Chaabi and the P-unit, will be handled by their + * respective drivers. + */ +#define MRST_NUM_RAR 2 + +/* ---------------- -------------------- ------------------- */ + +/** + * struct memrar_buffer_info - struct that keeps track of all RAR buffers + * @list: Linked list of memrar_buffer_info objects. + * @buffer: Core RAR buffer information. + * @refcount: Reference count. + * @owner: File handle corresponding to process that reserved the + * block of memory in RAR. This will be zero for buffers + * allocated by other drivers instead of by a user space + * process. + * + * This structure encapsulates a link list of RAR buffers, as well as + * other characteristics specific to a given list node, such as the + * reference count on the corresponding RAR buffer. + */ +struct memrar_buffer_info { + struct list_head list; + struct RAR_buffer buffer; + struct kref refcount; + struct file *owner; +}; + +/** + * struct memrar_rar_info - characteristics of a given RAR + * @base: Base bus address of the RAR. + * @length: Length of the RAR. + * @iobase: Virtual address of RAR mapped into kernel. + * @allocator: Allocator associated with the RAR. Note the allocator + * "capacity" may be smaller than the RAR length if the + * length is not a multiple of the configured allocator + * block size. + * @buffers: Table that keeps track of all reserved RAR buffers. + * @lock: Lock used to synchronize access to RAR-specific data + * structures. + * + * Each RAR has an associated memrar_rar_info structure that describes + * where in memory the RAR is located, how large it is, and a list of + * reserved RAR buffers inside that RAR. Each RAR also has a mutex + * associated with it to reduce lock contention when operations on + * multiple RARs are performed in parallel. + */ +struct memrar_rar_info { + dma_addr_t base; + unsigned long length; + void __iomem *iobase; + struct memrar_allocator *allocator; + struct memrar_buffer_info buffers; + struct mutex lock; +}; + +/* + * Array of RAR characteristics. + */ +static struct memrar_rar_info memrars[MRST_NUM_RAR]; + +/* ---------------- -------------------- ------------------- */ + +/* Validate RAR type. */ +static inline int memrar_is_valid_rar_type(u32 type) +{ + return type == RAR_TYPE_VIDEO || type == RAR_TYPE_AUDIO; +} + +/* Check if an address/handle falls with the given RAR memory range. */ +static inline int memrar_handle_in_range(struct memrar_rar_info *rar, + u32 vaddr) +{ + unsigned long const iobase = (unsigned long) (rar->iobase); + return (vaddr >= iobase && vaddr < iobase + rar->length); +} + +/* Retrieve RAR information associated with the given handle. */ +static struct memrar_rar_info *memrar_get_rar_info(u32 vaddr) +{ + int i; + for (i = 0; i < MRST_NUM_RAR; ++i) { + struct memrar_rar_info * const rar = &memrars[i]; + if (memrar_handle_in_range(rar, vaddr)) + return rar; + } + + return NULL; +} + +/* + * Retrieve bus address from given handle. + * + * Returns address corresponding to given handle. Zero if handle is + * invalid. + */ +static dma_addr_t memrar_get_bus_address( + struct memrar_rar_info *rar, + u32 vaddr) +{ + unsigned long const iobase = (unsigned long) (rar->iobase); + + if (!memrar_handle_in_range(rar, vaddr)) + return 0; + + /* + * An assumption is made that the virtual address offset is + * the same as the bus address offset, at least based on the + * way this driver is implemented. For example, vaddr + 2 == + * baddr + 2. + * + * @todo Is that a valid assumption? + */ + return rar->base + (vaddr - iobase); +} + +/* + * Retrieve physical address from given handle. + * + * Returns address corresponding to given handle. Zero if handle is + * invalid. + */ +static dma_addr_t memrar_get_physical_address( + struct memrar_rar_info *rar, + u32 vaddr) +{ + /* + * @todo This assumes that the bus address and physical + * address are the same. That is true for Moorestown + * but not necessarily on other platforms. This + * deficiency should be addressed at some point. + */ + return memrar_get_bus_address(rar, vaddr); +} + +/* + * Core block release code. + * + * Note: This code removes the node from a list. Make sure any list + * iteration is performed using list_for_each_safe(). + */ +static void memrar_release_block_i(struct kref *ref) +{ + /* + * Last reference is being released. Remove from the table, + * and reclaim resources. + */ + + struct memrar_buffer_info * const node = + container_of(ref, struct memrar_buffer_info, refcount); + + struct RAR_block_info * const user_info = + &node->buffer.info; + + struct memrar_allocator * const allocator = + memrars[user_info->type].allocator; + + list_del(&node->list); + + memrar_allocator_free(allocator, user_info->handle); + + kfree(node); +} + +/* + * Initialize RAR parameters, such as bus addresses, etc. + */ +static int memrar_init_rar_resources(char const *devname) +{ + /* ---- Sanity Checks ---- + * 1. RAR bus addresses in both Lincroft and Langwell RAR + * registers should be the same. + * a. There's no way we can do this through IA. + * + * 2. Secure device ID in Langwell RAR registers should be set + * appropriately, e.g. only LPE DMA for the audio RAR, and + * security for the other Langwell based RAR registers. + * a. There's no way we can do this through IA. + * + * 3. Audio and video RAR registers and RAR access should be + * locked down. If not, enable RAR access control. Except + * for debugging purposes, there is no reason for them to + * be unlocked. + * a. We can only do this for the Lincroft (IA) side. + * + * @todo Should the RAR handler driver even be aware of audio + * and video RAR settings? + */ + + /* + * RAR buffer block size. + * + * We choose it to be the size of a page to simplify the + * /dev/memrar mmap() implementation and usage. Otherwise + * paging is not involved once an RAR is locked down. + */ + static size_t const RAR_BLOCK_SIZE = PAGE_SIZE; + + int z; + int found_rar = 0; + + BUG_ON(MRST_NUM_RAR != ARRAY_SIZE(memrars)); + + for (z = 0; z != MRST_NUM_RAR; ++z) { + dma_addr_t low, high; + struct memrar_rar_info * const rar = &memrars[z]; + + BUG_ON(!memrar_is_valid_rar_type(z)); + + mutex_init(&rar->lock); + + /* + * Initialize the process table before we reach any + * code that exit on failure since the finalization + * code requires an initialized list. + */ + INIT_LIST_HEAD(&rar->buffers.list); + + if (rar_get_address(z, &low, &high) != 0) { + /* No RAR is available. */ + break; + } else if (low == 0 || high == 0) { + /* + * We don't immediately break out of the loop + * since the next type of RAR may be enabled. + */ + rar->base = 0; + rar->length = 0; + rar->iobase = NULL; + rar->allocator = NULL; + continue; + } + + /* + * @todo Verify that LNC and LNW RAR register contents + * addresses, security, etc are compatible and + * consistent). + */ + + rar->length = high - low + 1; + + /* Claim RAR memory as our own. */ + if (request_mem_region(low, rar->length, devname) == NULL) { + rar->length = 0; + + pr_err("%s: Unable to claim RAR[%d] memory.\n", + devname, + z); + pr_err("%s: RAR[%d] disabled.\n", devname, z); + + /* + * Rather than break out of the loop by + * returning -EBUSY, for example, we may be + * able to claim memory of the next RAR region + * as our own. + */ + continue; + } + + rar->base = low; + + /* + * Now map it into the kernel address space. + * + * Note that the RAR memory may only be accessed by IA + * when debugging. Otherwise attempts to access the + * RAR memory when it is locked down will result in + * behavior similar to writing to /dev/null and + * reading from /dev/zero. This behavior is enforced + * by the hardware. Even if we don't access the + * memory, mapping it into the kernel provides us with + * a convenient RAR handle to bus address mapping. + */ + rar->iobase = ioremap_nocache(rar->base, rar->length); + if (rar->iobase == NULL) { + pr_err("%s: Unable to map RAR memory.\n", + devname); + return -ENOMEM; + } + + /* Initialize corresponding memory allocator. */ + rar->allocator = memrar_create_allocator( + (unsigned long) rar->iobase, + rar->length, + RAR_BLOCK_SIZE); + if (rar->allocator == NULL) + return -1; + + /* + * ------------------------------------------------- + * Make sure all RARs handled by us are locked down. + * ------------------------------------------------- + */ + + /* Enable RAR protection on the Lincroft side. */ + if (0) { + /* + * This is mostly a sanity check since the + * vendor should have locked down RAR in the + * SMIP header RAR configuration. + */ + rar_lock(z); + } else { + pr_warning("%s: LNC RAR[%d] no lock sanity check.\n", + devname, + z); + } + + /* ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ */ + /* |||||||||||||||||||||||||||||||||||||||||||||||||| */ + + /* + * It would be nice if we could verify that RAR + * protection on the Langwell side is enabled, but + * there is no way to do that from here. The + * necessary Langwell RAR registers are not accessible + * from the Lincroft (IA) side. + * + * Hopefully the ODM did the right thing and enabled + * Langwell side RAR protection in the integrated + * firmware SMIP header. + */ + + pr_info("%s: BRAR[%d] bus address range = " + "[0x%lx, 0x%lx]\n", + devname, + z, + (unsigned long) low, + (unsigned long) high); + + pr_info("%s: BRAR[%d] size = %u KiB\n", + devname, + z, + rar->allocator->capacity / 1024); + + found_rar = 1; + } + + if (!found_rar) { + /* + * No RAR support. Don't bother continuing. + * + * Note that this is not a failure. + */ + pr_info("%s: No Moorestown RAR support available.\n", + devname); + return -ENODEV; + } + + return 0; +} + +/* + * Finalize RAR resources. + */ +static void memrar_fini_rar_resources(void) +{ + int z; + struct memrar_buffer_info *pos; + struct memrar_buffer_info *tmp; + + /* + * @todo Do we need to hold a lock at this point in time? + * (module initialization failure or exit?) + */ + + for (z = MRST_NUM_RAR; z-- != 0; ) { + struct memrar_rar_info * const rar = &memrars[z]; + + /* Clean up remaining resources. */ + + list_for_each_entry_safe(pos, + tmp, + &rar->buffers.list, + list) { + kref_put(&pos->refcount, memrar_release_block_i); + } + + memrar_destroy_allocator(rar->allocator); + rar->allocator = NULL; + + iounmap(rar->iobase); + rar->iobase = NULL; + + release_mem_region(rar->base, rar->length); + rar->base = 0; + + rar->length = 0; + } +} + +static long memrar_reserve_block(struct RAR_buffer *request, + struct file *filp) +{ + struct RAR_block_info * const rinfo = &request->info; + struct RAR_buffer *buffer; + struct memrar_buffer_info *buffer_info; + u32 handle; + struct memrar_rar_info *rar = NULL; + + /* Prevent array overflow. */ + if (!memrar_is_valid_rar_type(rinfo->type)) + return -EINVAL; + + rar = &memrars[rinfo->type]; + + /* Reserve memory in RAR. */ + handle = memrar_allocator_alloc(rar->allocator, rinfo->size); + if (handle == 0) + return -ENOMEM; + + buffer_info = kmalloc(sizeof(*buffer_info), GFP_KERNEL); + + if (buffer_info == NULL) { + memrar_allocator_free(rar->allocator, handle); + return -ENOMEM; + } + + buffer = &buffer_info->buffer; + buffer->info.type = rinfo->type; + buffer->info.size = rinfo->size; + + /* Memory handle corresponding to the bus address. */ + buffer->info.handle = handle; + buffer->bus_address = memrar_get_bus_address(rar, handle); + + /* + * Keep track of owner so that we can later cleanup if + * necessary. + */ + buffer_info->owner = filp; + + kref_init(&buffer_info->refcount); + + mutex_lock(&rar->lock); + list_add(&buffer_info->list, &rar->buffers.list); + mutex_unlock(&rar->lock); + + rinfo->handle = buffer->info.handle; + request->bus_address = buffer->bus_address; + + return 0; +} + +static long memrar_release_block(u32 addr) +{ + struct memrar_buffer_info *pos; + struct memrar_buffer_info *tmp; + struct memrar_rar_info * const rar = memrar_get_rar_info(addr); + long result = -EINVAL; + + if (rar == NULL) + return -EFAULT; + + mutex_lock(&rar->lock); + + /* + * Iterate through the buffer list to find the corresponding + * buffer to be released. + */ + list_for_each_entry_safe(pos, + tmp, + &rar->buffers.list, + list) { + struct RAR_block_info * const info = + &pos->buffer.info; + + /* + * Take into account handle offsets that may have been + * added to the base handle, such as in the following + * scenario: + * + * u32 handle = base + offset; + * rar_handle_to_bus(handle); + * rar_release(handle); + */ + if (addr >= info->handle + && addr < (info->handle + info->size) + && memrar_is_valid_rar_type(info->type)) { + kref_put(&pos->refcount, memrar_release_block_i); + result = 0; + break; + } + } + + mutex_unlock(&rar->lock); + + return result; +} + +static long memrar_get_stat(struct RAR_stat *r) +{ + long result = -EINVAL; + + if (likely(r != NULL) && memrar_is_valid_rar_type(r->type)) { + struct memrar_allocator * const allocator = + memrars[r->type].allocator; + + BUG_ON(allocator == NULL); + + /* + * Allocator capacity doesn't change over time. No + * need to synchronize. + */ + r->capacity = allocator->capacity; + + mutex_lock(&allocator->lock); + + r->largest_block_size = allocator->largest_free_area; + + mutex_unlock(&allocator->lock); + + result = 0; + } + + return result; +} + +static long memrar_ioctl(struct file *filp, + unsigned int cmd, + unsigned long arg) +{ + void __user *argp = (void __user *)arg; + long result = 0; + + struct RAR_buffer buffer; + struct RAR_block_info * const request = &buffer.info; + struct RAR_stat rar_info; + u32 rar_handle; + + switch (cmd) { + case RAR_HANDLER_RESERVE: + if (copy_from_user(request, + argp, + sizeof(*request))) + return -EFAULT; + + result = memrar_reserve_block(&buffer, filp); + if (result != 0) + return result; + + return copy_to_user(argp, request, sizeof(*request)); + + case RAR_HANDLER_RELEASE: + if (copy_from_user(&rar_handle, + argp, + sizeof(rar_handle))) + return -EFAULT; + + return memrar_release_block(rar_handle); + + case RAR_HANDLER_STAT: + if (copy_from_user(&rar_info, + argp, + sizeof(rar_info))) + return -EFAULT; + + /* + * Populate the RAR_stat structure based on the RAR + * type given by the user + */ + if (memrar_get_stat(&rar_info) != 0) + return -EINVAL; + + /* + * @todo Do we need to verify destination pointer + * "argp" is non-zero? Is that already done by + * copy_to_user()? + */ + return copy_to_user(argp, + &rar_info, + sizeof(rar_info)) ? -EFAULT : 0; + + default: + return -ENOTTY; + } + + return 0; +} + +static int memrar_mmap(struct file *filp, struct vm_area_struct *vma) +{ + /* + * This mmap() implementation is predominantly useful for + * debugging since the CPU will be prevented from accessing + * RAR memory by the hardware when RAR is properly locked + * down. + * + * In order for this implementation to be useful RAR memory + * must be not be locked down. However, we only want to do + * that when debugging. DO NOT leave RAR memory unlocked in a + * deployed device that utilizes RAR. + */ + + size_t const size = vma->vm_end - vma->vm_start; + + /* Users pass the RAR handle as the mmap() offset parameter. */ + unsigned long const handle = vma->vm_pgoff << PAGE_SHIFT; + + struct memrar_rar_info * const rar = memrar_get_rar_info(handle); + + unsigned long pfn; + + /* Invalid RAR handle or size passed to mmap(). */ + if (rar == NULL + || handle == 0 + || size > (handle - (unsigned long) rar->iobase)) + return -EINVAL; + + /* + * Retrieve physical address corresponding to the RAR handle, + * and convert it to a page frame. + */ + pfn = memrar_get_physical_address(rar, handle) >> PAGE_SHIFT; + + + pr_debug("memrar: mapping RAR range [0x%lx, 0x%lx) into user space.\n", + handle, + handle + size); + + /* + * Map RAR memory into user space. This is really only useful + * for debugging purposes since the memory won't be + * accessible, i.e. reads return zero and writes are ignored, + * when RAR access control is enabled. + */ + if (remap_pfn_range(vma, + vma->vm_start, + pfn, + size, + vma->vm_page_prot)) + return -EAGAIN; + + /* vma->vm_ops = &memrar_mem_ops; */ + + return 0; +} + +static int memrar_open(struct inode *inode, struct file *filp) +{ + /* Nothing to do yet. */ + + return 0; +} + +static int memrar_release(struct inode *inode, struct file *filp) +{ + /* Free all regions associated with the given file handle. */ + + struct memrar_buffer_info *pos; + struct memrar_buffer_info *tmp; + int z; + + for (z = 0; z != MRST_NUM_RAR; ++z) { + struct memrar_rar_info * const rar = &memrars[z]; + + mutex_lock(&rar->lock); + + list_for_each_entry_safe(pos, + tmp, + &rar->buffers.list, + list) { + if (filp == pos->owner) + kref_put(&pos->refcount, + memrar_release_block_i); + } + + mutex_unlock(&rar->lock); + } + + return 0; +} + +/* + * This function is part of the kernel space memrar driver API. + */ +size_t rar_reserve(struct RAR_buffer *buffers, size_t count) +{ + struct RAR_buffer * const end = + (buffers == NULL ? buffers : buffers + count); + struct RAR_buffer *i; + + size_t reserve_count = 0; + + for (i = buffers; i != end; ++i) { + if (memrar_reserve_block(i, NULL) == 0) + ++reserve_count; + else + i->bus_address = 0; + } + + return reserve_count; +} +EXPORT_SYMBOL(rar_reserve); + +/* + * This function is part of the kernel space memrar driver API. + */ +size_t rar_release(struct RAR_buffer *buffers, size_t count) +{ + struct RAR_buffer * const end = + (buffers == NULL ? buffers : buffers + count); + struct RAR_buffer *i; + + size_t release_count = 0; + + for (i = buffers; i != end; ++i) { + u32 * const handle = &i->info.handle; + if (memrar_release_block(*handle) == 0) { + /* + * @todo We assume we should do this each time + * the ref count is decremented. Should + * we instead only do this when the ref + * count has dropped to zero, and the + * buffer has been completely + * released/unmapped? + */ + *handle = 0; + ++release_count; + } + } + + return release_count; +} +EXPORT_SYMBOL(rar_release); + +/* + * This function is part of the kernel space driver API. + */ +size_t rar_handle_to_bus(struct RAR_buffer *buffers, size_t count) +{ + struct RAR_buffer * const end = + (buffers == NULL ? buffers : buffers + count); + struct RAR_buffer *i; + struct memrar_buffer_info *pos; + + size_t conversion_count = 0; + + /* + * Find all bus addresses corresponding to the given handles. + * + * @todo Not liking this nested loop. Optimize. + */ + for (i = buffers; i != end; ++i) { + struct memrar_rar_info * const rar = + memrar_get_rar_info(i->info.handle); + + /* + * Check if we have a bogus handle, and then continue + * with remaining buffers. + */ + if (rar == NULL) { + i->bus_address = 0; + continue; + } + + mutex_lock(&rar->lock); + + list_for_each_entry(pos, &rar->buffers.list, list) { + struct RAR_block_info * const user_info = + &pos->buffer.info; + + /* + * Take into account handle offsets that may + * have been added to the base handle, such as + * in the following scenario: + * + * u32 handle = base + offset; + * rar_handle_to_bus(handle); + */ + + if (i->info.handle >= user_info->handle + && i->info.handle < (user_info->handle + + user_info->size)) { + u32 const offset = + i->info.handle - user_info->handle; + + i->info.type = user_info->type; + i->info.size = user_info->size - offset; + i->bus_address = + pos->buffer.bus_address + + offset; + + /* Increment the reference count. */ + kref_get(&pos->refcount); + + ++conversion_count; + break; + } else { + i->bus_address = 0; + } + } + + mutex_unlock(&rar->lock); + } + + return conversion_count; +} +EXPORT_SYMBOL(rar_handle_to_bus); + +static const struct file_operations memrar_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = memrar_ioctl, + .mmap = memrar_mmap, + .open = memrar_open, + .release = memrar_release, +}; + +static struct miscdevice memrar_miscdev = { + .minor = MISC_DYNAMIC_MINOR, /* dynamic allocation */ + .name = "memrar", /* /dev/memrar */ + .fops = &memrar_fops +}; + +static char const banner[] __initdata = + KERN_INFO + "Intel RAR Handler: " MEMRAR_VER " initialized.\n"; + +static int memrar_registration_callback(void *ctx) +{ + /* + * We initialize the RAR parameters early on so that we can + * discontinue memrar device initialization and registration + * if suitably configured RARs are not available. + */ + int result = memrar_init_rar_resources(memrar_miscdev.name); + + if (result != 0) + return result; + + result = misc_register(&memrar_miscdev); + + if (result != 0) { + pr_err("%s: misc_register() failed.\n", + memrar_miscdev.name); + + /* Clean up resources previously reserved. */ + memrar_fini_rar_resources(); + } + + return result; +} + +static int __init memrar_init(void) +{ + printk(banner); + + return register_rar(&memrar_registration_callback, 0); +} + +static void __exit memrar_exit(void) +{ + memrar_fini_rar_resources(); + + misc_deregister(&memrar_miscdev); +} + + +module_init(memrar_init); +module_exit(memrar_exit); + + +MODULE_AUTHOR("Ossama Othman <ossama.othman@intel.com>"); +MODULE_DESCRIPTION("Intel Restricted Access Region Handler"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS_MISCDEV(MISC_DYNAMIC_MINOR); +MODULE_VERSION(MEMRAR_VER); + + + +/* + Local Variables: + c-file-style: "linux" + End: +*/ diff --git a/drivers/staging/netwave/netwave_cs.c b/drivers/staging/netwave/netwave_cs.c index f1ee2cbc8407..d770fb1ebf11 100644 --- a/drivers/staging/netwave/netwave_cs.c +++ b/drivers/staging/netwave/netwave_cs.c @@ -1,5 +1,5 @@ /********************************************************************* - * + * * Filename: netwave_cs.c * Version: 0.4.1 * Description: Netwave AirSurfer Wireless LAN PC Card driver @@ -10,27 +10,27 @@ * Created at: A long time ago! * Modified at: Mon Nov 10 11:54:37 1997 * Modified by: Dag Brattli <dagb@cs.uit.no> - * + * * Copyright (c) 1997 University of Tromsø, Norway * * Revision History: * * 08-Nov-97 15:14:47 John Markus Bjørndalen <johnm@cs.uit.no> - * - Fixed some bugs in netwave_rx and cleaned it up a bit. + * - Fixed some bugs in netwave_rx and cleaned it up a bit. * (One of the bugs would have destroyed packets when receiving - * multiple packets per interrupt). - * - Cleaned up parts of newave_hw_xmit. - * - A few general cleanups. + * multiple packets per interrupt). + * - Cleaned up parts of newave_hw_xmit. + * - A few general cleanups. * 24-Oct-97 13:17:36 Dag Brattli <dagb@cs.uit.no> * - Fixed netwave_rx receive function (got updated docs) * Others: - * - Changed name from xircnw to netwave, take a look at + * - Changed name from xircnw to netwave, take a look at * http://www.netwave-wireless.com * - Some reorganizing of the code * - Removed possible race condition between interrupt handler and transmit * function * - Started to add wireless extensions, but still needs some coding - * - Added watchdog for better handling of transmission timeouts + * - Added watchdog for better handling of transmission timeouts * (hopefully this works better) ********************************************************************/ @@ -100,7 +100,7 @@ /* * Commands used in the extended command buffer - * NETWAVE_EREG_CB (0x100-0x10F) + * NETWAVE_EREG_CB (0x100-0x10F) */ #define NETWAVE_CMD_NOP 0x00 #define NETWAVE_CMD_SRC 0x01 @@ -132,7 +132,7 @@ static const unsigned int corConfIENA = 0x01; /* Interrupt enable */ static const unsigned int corConfLVLREQ = 0x40; /* Keep high */ static const unsigned int rxConfRxEna = 0x80; /* Receive Enable */ -static const unsigned int rxConfMAC = 0x20; /* MAC host receive mode*/ +static const unsigned int rxConfMAC = 0x20; /* MAC host receive mode*/ static const unsigned int rxConfPro = 0x10; /* Promiscuous */ static const unsigned int rxConfAMP = 0x08; /* Accept Multicast Packets */ static const unsigned int rxConfBcast = 0x04; /* Accept Broadcast Packets */ @@ -151,15 +151,15 @@ static const unsigned int txConfLoop = 0x01; /* Loopback mode */ /* Choose the domain, default is 0x100 */ static u_int domain = 0x100; -/* Scramble key, range from 0x0 to 0xffff. - * 0x0 is no scrambling. +/* Scramble key, range from 0x0 to 0xffff. + * 0x0 is no scrambling. */ static u_int scramble_key = 0x0; -/* Shared memory speed, in ns. The documentation states that - * the card should not be read faster than every 400ns. - * This timing should be provided by the HBA. If it becomes a - * problem, try setting mem_speed to 400. +/* Shared memory speed, in ns. The documentation states that + * the card should not be read faster than every 400ns. + * This timing should be provided by the HBA. If it becomes a + * problem, try setting mem_speed to 400. */ static int mem_speed; @@ -228,7 +228,7 @@ struct site_survey { u_short length; u_char struct_revision; u_char roaming_state; - + u_char sp_existsFlag; u_char sp_link_quality; u_char sp_max_link_quality; @@ -238,12 +238,12 @@ struct site_survey { u_char sp_goodness; u_char sp_hotheadcount; u_char roaming_condition; - + net_addr sp; u_char numAPs; net_addr nearByAccessPoints[MAX_ESA]; -}; - +}; + typedef struct netwave_private { struct pcmcia_device *p_dev; spinlock_t spinlock; /* Serialize access to the hardware (SMP) */ @@ -260,7 +260,7 @@ typedef struct netwave_private { * The Netwave card is little-endian, so won't work for big endian * systems. */ -static inline unsigned short get_uint16(u_char __iomem *staddr) +static inline unsigned short get_uint16(u_char __iomem *staddr) { return readw(staddr); /* Return only 16 bits */ } @@ -270,38 +270,38 @@ static inline short get_int16(u_char __iomem * staddr) return readw(staddr); } -/* - * Wait until the WOC (Write Operation Complete) bit in the - * ASR (Adapter Status Register) is asserted. - * This should have aborted if it takes too long time. +/* + * Wait until the WOC (Write Operation Complete) bit in the + * ASR (Adapter Status Register) is asserted. + * This should have aborted if it takes too long time. */ static inline void wait_WOC(unsigned int iobase) { /* Spin lock */ - while ((inb(iobase + NETWAVE_REG_ASR) & 0x8) != 0x8) ; + while ((inb(iobase + NETWAVE_REG_ASR) & 0x8) != 0x8) ; } -static void netwave_snapshot(netwave_private *priv, u_char __iomem *ramBase, +static void netwave_snapshot(netwave_private *priv, u_char __iomem *ramBase, unsigned int iobase) { u_short resultBuffer; - /* if time since last snapshot is > 1 sec. (100 jiffies?) then take - * new snapshot, else return cached data. This is the recommended rate. + /* if time since last snapshot is > 1 sec. (100 jiffies?) then take + * new snapshot, else return cached data. This is the recommended rate. */ - if ( jiffies - priv->lastExec > 100) { - /* Take site survey snapshot */ + if ( jiffies - priv->lastExec > 100) { + /* Take site survey snapshot */ /*printk( KERN_DEBUG "Taking new snapshot. %ld\n", jiffies - priv->lastExec); */ - wait_WOC(iobase); - writeb(NETWAVE_CMD_SSS, ramBase + NETWAVE_EREG_CB + 0); - writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1); - wait_WOC(iobase); - - /* Get result and copy to cach */ - resultBuffer = readw(ramBase + NETWAVE_EREG_CRBP); - copy_from_pc( &priv->nss, ramBase+resultBuffer, - sizeof(struct site_survey)); - } + wait_WOC(iobase); + writeb(NETWAVE_CMD_SSS, ramBase + NETWAVE_EREG_CB + 0); + writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1); + wait_WOC(iobase); + + /* Get result and copy to cach */ + resultBuffer = readw(ramBase + NETWAVE_EREG_CRBP); + copy_from_pc( &priv->nss, ramBase+resultBuffer, + sizeof(struct site_survey)); + } } /* @@ -311,21 +311,21 @@ static void netwave_snapshot(netwave_private *priv, u_char __iomem *ramBase, * */ static struct iw_statistics *netwave_get_wireless_stats(struct net_device *dev) -{ +{ unsigned long flags; unsigned int iobase = dev->base_addr; netwave_private *priv = netdev_priv(dev); u_char __iomem *ramBase = priv->ramBase; struct iw_statistics* wstats; - + wstats = &priv->iw_stats; spin_lock_irqsave(&priv->spinlock, flags); - + netwave_snapshot( priv, ramBase, iobase); wstats->status = priv->nss.roaming_state; - wstats->qual.qual = readb( ramBase + NETWAVE_EREG_SPCQ); + wstats->qual.qual = readb( ramBase + NETWAVE_EREG_SPCQ); wstats->qual.level = readb( ramBase + NETWAVE_EREG_ISPLQ); wstats->qual.noise = readb( ramBase + NETWAVE_EREG_SPU) & 0x3f; wstats->discard.nwid = 0L; @@ -333,7 +333,7 @@ static struct iw_statistics *netwave_get_wireless_stats(struct net_device *dev) wstats->discard.misc = 0L; spin_unlock_irqrestore(&priv->spinlock, flags); - + return &priv->iw_stats; } @@ -351,8 +351,8 @@ static const struct net_device_ops netwave_netdev_ops = { /* * Function netwave_attach (void) * - * Creates an "instance" of the driver, allocating local data - * structures for one device. The device is registered with Card + * Creates an "instance" of the driver, allocating local data + * structures for one device. The device is registered with Card * Services. * * The dev_link structure is initialized, but we don't actually @@ -377,10 +377,10 @@ static int netwave_probe(struct pcmcia_device *link) /* The io structure describes IO port mapping */ link->io.NumPorts1 = 16; link->io.Attributes1 = IO_DATA_PATH_WIDTH_16; - /* link->io.NumPorts2 = 16; + /* link->io.NumPorts2 = 16; link->io.Attributes2 = IO_DATA_PATH_WIDTH_16; */ link->io.IOAddrLines = 5; - + /* General socket configuration */ link->conf.Attributes = CONF_ENABLE_IRQ; link->conf.IntType = INT_MEMORY_AND_IO; @@ -452,7 +452,7 @@ static int netwave_set_nwid(struct net_device *dev, if(!wrqu->nwid.disabled) { domain = wrqu->nwid.value; - printk( KERN_DEBUG "Setting domain to 0x%x%02x\n", + printk( KERN_DEBUG "Setting domain to 0x%x%02x\n", (domain >> 8) & 0x01, domain & 0xff); wait_WOC(iobase); writeb(NETWAVE_CMD_SMD, ramBase + NETWAVE_EREG_CB + 0); @@ -463,7 +463,7 @@ static int netwave_set_nwid(struct net_device *dev, /* ReEnable interrupts & restore flags */ spin_unlock_irqrestore(&priv->spinlock, flags); - + return 0; } @@ -506,7 +506,7 @@ static int netwave_set_scramble(struct net_device *dev, /* ReEnable interrupts & restore flags */ spin_unlock_irqrestore(&priv->spinlock, flags); - + return 0; } @@ -561,19 +561,19 @@ static int netwave_get_range(struct net_device *dev, /* Set the Wireless Extension versions */ range->we_version_compiled = WIRELESS_EXT; range->we_version_source = 9; /* Nothing for us in v10 and v11 */ - + /* Set information in the range struct */ range->throughput = 450 * 1000; /* don't argue on this ! */ range->min_nwid = 0x0000; range->max_nwid = 0x01FF; range->num_channels = range->num_frequency = 0; - + range->sensitivity = 0x3F; range->max_qual.qual = 255; range->max_qual.level = 255; range->max_qual.noise = 0; - + range->num_bitrates = 1; range->bitrate[0] = 1000000; /* 1 Mb/s */ @@ -609,7 +609,7 @@ static int netwave_get_snap(struct net_device *dev, /* ReEnable interrupts & restore flags */ spin_unlock_irqrestore(&priv->spinlock, flags); - + return(0); } @@ -620,8 +620,8 @@ static int netwave_get_snap(struct net_device *dev, static const struct iw_priv_args netwave_private_args[] = { /*{ cmd, set_args, get_args, name } */ - { SIOCGIPSNAP, 0, - IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | sizeof(struct site_survey), + { SIOCGIPSNAP, 0, + IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | sizeof(struct site_survey), "getsitesurvey" }, }; @@ -693,9 +693,9 @@ static const struct iw_handler_def netwave_handler_def = /* * Function netwave_pcmcia_config (link) * - * netwave_pcmcia_config() is scheduled to run after a CARD_INSERTION + * netwave_pcmcia_config() is scheduled to run after a CARD_INSERTION * event is received, to configure the PCMCIA socket, and to make the - * device available to the system. + * device available to the system. * */ @@ -753,7 +753,7 @@ static int netwave_pcmcia_config(struct pcmcia_device *link) { ret = pcmcia_request_window(link, &req, &link->win); if (ret) goto failed; - mem.CardOffset = 0x20000; mem.Page = 0; + mem.CardOffset = 0x20000; mem.Page = 0; ret = pcmcia_map_mem_page(link, link->win, &mem); if (ret) goto failed; @@ -778,7 +778,7 @@ static int netwave_pcmcia_config(struct pcmcia_device *link) { netwave_doreset(dev->base_addr, ramBase); /* Read the ethernet address and fill in the Netwave registers. */ - for (i = 0; i < 6; i++) + for (i = 0; i < 6; i++) dev->dev_addr[i] = readb(ramBase + NETWAVE_EREG_PA + i); printk(KERN_INFO "%s: Netwave: port %#3lx, irq %d, mem %lx, " @@ -790,7 +790,7 @@ static int netwave_pcmcia_config(struct pcmcia_device *link) { dev->dev_addr); /* get revision words */ - printk(KERN_DEBUG "Netwave_reset: revision %04x %04x\n", + printk(KERN_DEBUG "Netwave_reset: revision %04x %04x\n", get_uint16(ramBase + NETWAVE_EREG_ARW), get_uint16(ramBase + NETWAVE_EREG_ARW+2)); return 0; @@ -859,7 +859,7 @@ static void netwave_doreset(unsigned int ioBase, u_char __iomem *ramBase) /* * Function netwave_reset (dev) * - * Reset and restore all of the netwave registers + * Reset and restore all of the netwave registers */ static void netwave_reset(struct net_device *dev) { /* u_char state; */ @@ -874,24 +874,24 @@ static void netwave_reset(struct net_device *dev) { /* Reset card */ netwave_doreset(iobase, ramBase); printk(KERN_DEBUG "netwave_reset: Done with hardware reset\n"); - + /* Write a NOP to check the card */ wait_WOC(iobase); writeb(NETWAVE_CMD_NOP, ramBase + NETWAVE_EREG_CB + 0); writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1); - + /* Set receive conf */ wait_WOC(iobase); writeb(NETWAVE_CMD_SRC, ramBase + NETWAVE_EREG_CB + 0); writeb(rxConfRxEna + rxConfBcast, ramBase + NETWAVE_EREG_CB + 1); writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2); - + /* Set transmit conf */ wait_WOC(iobase); writeb(NETWAVE_CMD_STC, ramBase + NETWAVE_EREG_CB + 0); writeb(txConfTxEna, ramBase + NETWAVE_EREG_CB + 1); writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2); - + /* Now set the MU Domain */ printk(KERN_DEBUG "Setting domain to 0x%x%02x\n", (domain >> 8) & 0x01, domain & 0xff); wait_WOC(iobase); @@ -899,7 +899,7 @@ static void netwave_reset(struct net_device *dev) { writeb(domain & 0xff, ramBase + NETWAVE_EREG_CB + 1); writeb((domain>>8) & 0x01, ramBase + NETWAVE_EREG_CB + 2); writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3); - + /* Set scramble key */ printk(KERN_DEBUG "Setting scramble key to 0x%x\n", scramble_key); wait_WOC(iobase); @@ -909,8 +909,8 @@ static void netwave_reset(struct net_device *dev) { writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3); /* Enable interrupts, bit 4 high to keep unused - * source from interrupting us, bit 2 high to - * set interrupt enable, 567 to enable TxDN, + * source from interrupting us, bit 2 high to + * set interrupt enable, 567 to enable TxDN, * RxErr and RxRdy */ wait_WOC(iobase); @@ -921,29 +921,29 @@ static void netwave_reset(struct net_device *dev) { * skriv 80 til d000:3688 * sjekk om det ble 80 */ - + /* Enable Receiver */ wait_WOC(iobase); writeb(NETWAVE_CMD_ER, ramBase + NETWAVE_EREG_CB + 0); writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1); - + /* Set the IENA bit in COR */ wait_WOC(iobase); outb(corConfIENA + corConfLVLREQ, iobase + NETWAVE_REG_COR); } /* - * Function netwave_hw_xmit (data, len, dev) + * Function netwave_hw_xmit (data, len, dev) */ static int netwave_hw_xmit(unsigned char* data, int len, struct net_device* dev) { unsigned long flags; unsigned int TxFreeList, curBuff, - MaxData, + MaxData, DataOffset; - int tmpcount; - + int tmpcount; + netwave_private *priv = netdev_priv(dev); u_char __iomem * ramBase = priv->ramBase; unsigned int iobase = dev->base_addr; @@ -974,23 +974,23 @@ static int netwave_hw_xmit(unsigned char* data, int len, TxFreeList = get_uint16(ramBase + NETWAVE_EREG_TDP); MaxData = get_uint16(ramBase + NETWAVE_EREG_TDP+2); DataOffset = get_uint16(ramBase + NETWAVE_EREG_TDP+4); - + pr_debug("TxFreeList %x, MaxData %x, DataOffset %x\n", TxFreeList, MaxData, DataOffset); /* Copy packet to the adapter fragment buffers */ - curBuff = TxFreeList; - tmpcount = 0; + curBuff = TxFreeList; + tmpcount = 0; while (tmpcount < len) { - int tmplen = len - tmpcount; - copy_to_pc(ramBase + curBuff + DataOffset, data + tmpcount, + int tmplen = len - tmpcount; + copy_to_pc(ramBase + curBuff + DataOffset, data + tmpcount, (tmplen < MaxData) ? tmplen : MaxData); tmpcount += MaxData; - + /* Advance to next buffer */ curBuff = get_uint16(ramBase + curBuff); } - + /* Now issue transmit list */ wait_WOC(iobase); writeb(NETWAVE_CMD_TL, ramBase + NETWAVE_EREG_CB + 0); @@ -1015,7 +1015,7 @@ static netdev_tx_t netwave_start_xmit(struct sk_buff *skb, { short length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN; unsigned char* buf = skb->data; - + if (netwave_hw_xmit( buf, length, dev) == 1) { /* Some error, let's make them call us another time? */ netif_start_queue(dev); @@ -1023,7 +1023,7 @@ static netdev_tx_t netwave_start_xmit(struct sk_buff *skb, dev->trans_start = jiffies; } dev_kfree_skb(skb); - + return NETDEV_TX_OK; } /* netwave_start_xmit */ @@ -1031,7 +1031,7 @@ static netdev_tx_t netwave_start_xmit(struct sk_buff *skb, * Function netwave_interrupt (irq, dev_id) * * This function is the interrupt handler for the Netwave card. This - * routine will be called whenever: + * routine will be called whenever: * 1. A packet is received. * 2. A packet has successfully been transferred and the unit is * ready to transmit another packet. @@ -1045,29 +1045,29 @@ static irqreturn_t netwave_interrupt(int irq, void* dev_id) struct netwave_private *priv = netdev_priv(dev); struct pcmcia_device *link = priv->p_dev; int i; - + if (!netif_device_present(dev)) return IRQ_NONE; - + iobase = dev->base_addr; ramBase = priv->ramBase; - + /* Now find what caused the interrupt, check while interrupts ready */ for (i = 0; i < 10; i++) { u_char status; - - wait_WOC(iobase); + + wait_WOC(iobase); if (!(inb(iobase+NETWAVE_REG_CCSR) & 0x02)) break; /* None of the interrupt sources asserted (normal exit) */ - + status = inb(iobase + NETWAVE_REG_ASR); - + if (!pcmcia_dev_present(link)) { pr_debug("netwave_interrupt: Interrupt with status 0x%x " "from removed or suspended card!\n", status); break; } - + /* RxRdy */ if (status & 0x80) { netwave_rx(dev); @@ -1077,24 +1077,24 @@ static irqreturn_t netwave_interrupt(int irq, void* dev_id) /* RxErr */ if (status & 0x40) { u_char rser; - - rser = readb(ramBase + NETWAVE_EREG_RSER); - + + rser = readb(ramBase + NETWAVE_EREG_RSER); + if (rser & 0x04) { ++dev->stats.rx_dropped; ++dev->stats.rx_crc_errors; } if (rser & 0x02) ++dev->stats.rx_frame_errors; - + /* Clear the RxErr bit in RSER. RSER+4 is the - * write part. Also clear the RxCRC (0x04) and + * write part. Also clear the RxCRC (0x04) and * RxBig (0x02) bits if present */ wait_WOC(iobase); writeb(0x40 | (rser & 0x06), ramBase + NETWAVE_EREG_RSER + 4); /* Write bit 6 high to ASCC to clear RxErr in ASR, - * WOC must be set first! + * WOC must be set first! */ wait_WOC(iobase); writeb(0x40, ramBase + NETWAVE_EREG_ASCC); @@ -1109,31 +1109,31 @@ static irqreturn_t netwave_interrupt(int irq, void* dev_id) txStatus = readb(ramBase + NETWAVE_EREG_TSER); pr_debug("Transmit done. TSER = %x id %x\n", txStatus, readb(ramBase + NETWAVE_EREG_TSER + 1)); - + if (txStatus & 0x20) { /* Transmitting was okay, clear bits */ wait_WOC(iobase); writeb(0x2f, ramBase + NETWAVE_EREG_TSER + 4); ++dev->stats.tx_packets; } - + if (txStatus & 0xd0) { if (txStatus & 0x80) { ++dev->stats.collisions; /* Because of /proc/net/dev*/ /* ++dev->stats.tx_aborted_errors; */ /* printk("Collision. %ld\n", jiffies - dev->trans_start); */ } - if (txStatus & 0x40) + if (txStatus & 0x40) ++dev->stats.tx_carrier_errors; /* 0x80 TxGU Transmit giveup - nine times and no luck * 0x40 TxNOAP No access point. Discarded packet. - * 0x10 TxErr Transmit error. Always set when + * 0x10 TxErr Transmit error. Always set when * TxGU and TxNOAP is set. (Those are the only ones * to set TxErr). */ pr_debug("netwave_interrupt: TxDN with error status %x\n", txStatus); - + /* Clear out TxGU, TxNOAP, TxErr and TxTrys */ wait_WOC(iobase); writeb(0xdf & txStatus, ramBase+NETWAVE_EREG_TSER+4); @@ -1185,31 +1185,31 @@ static int netwave_rx(struct net_device *dev) int dataCount, dataOffset; int i; u_char *ptr; - + pr_debug("xinw_rx: Receiving ... \n"); /* Receive max 10 packets for now. */ for (i = 0; i < 10; i++) { /* Any packets? */ wait_WOC(iobase); - rxStatus = readb(ramBase + NETWAVE_EREG_RSER); + rxStatus = readb(ramBase + NETWAVE_EREG_RSER); if ( !( rxStatus & 0x80)) /* No more packets */ break; - + /* Check if multicast/broadcast or other */ /* multicast = (rxStatus & 0x20); */ - + /* The receive list pointer and length of the packet */ wait_WOC(iobase); rcvLen = get_int16( ramBase + NETWAVE_EREG_RDP); rcvList = get_uint16( ramBase + NETWAVE_EREG_RDP + 2); - + if (rcvLen < 0) { - printk(KERN_DEBUG "netwave_rx: Receive packet with len %d\n", + printk(KERN_DEBUG "netwave_rx: Receive packet with len %d\n", rcvLen); return 0; } - + skb = dev_alloc_skb(rcvLen+5); if (skb == NULL) { pr_debug("netwave_rx: Could not allocate an sk_buff of " @@ -1228,21 +1228,21 @@ static int netwave_rx(struct net_device *dev) /* Copy packet fragments to the skb data area */ ptr = (u_char*) skb->data; curBuffer = rcvList; - tmpcount = 0; + tmpcount = 0; while ( tmpcount < rcvLen) { /* Get length and offset of current buffer */ dataCount = get_uint16( ramBase+curBuffer+2); dataOffset = get_uint16( ramBase+curBuffer+4); - + copy_from_pc( ptr + tmpcount, ramBase+curBuffer+dataOffset, dataCount); tmpcount += dataCount; - + /* Point to next buffer */ curBuffer = get_uint16(ramBase + curBuffer); } - + skb->protocol = eth_type_trans(skb,dev); /* Queue packet for network layer */ netif_rx(skb); @@ -1264,7 +1264,7 @@ static int netwave_open(struct net_device *dev) { struct pcmcia_device *link = priv->p_dev; dev_dbg(&link->dev, "netwave_open: starting.\n"); - + if (!pcmcia_dev_present(link)) return -ENODEV; @@ -1272,7 +1272,7 @@ static int netwave_open(struct net_device *dev) { netif_start_queue(dev); netwave_reset(dev); - + return 0; } @@ -1331,7 +1331,7 @@ static void set_multicast_list(struct net_device *dev) netwave_private *priv = netdev_priv(dev); u_char __iomem * ramBase = priv->ramBase; u_char rcvMode = 0; - + #ifdef PCMCIA_DEBUG { xstatic int old; @@ -1342,7 +1342,7 @@ static void set_multicast_list(struct net_device *dev) } } #endif - + if (!netdev_mc_empty(dev) || (dev->flags & IFF_ALLMULTI)) { /* Multicast Mode */ rcvMode = rxConfRxEna + rxConfAMP + rxConfBcast; @@ -1353,7 +1353,7 @@ static void set_multicast_list(struct net_device *dev) /* Normal mode */ rcvMode = rxConfRxEna + rxConfBcast; } - + /* printk("netwave set_multicast_list: rcvMode to %x\n", rcvMode);*/ /* Now set receive mode */ wait_WOC(iobase); diff --git a/drivers/staging/otus/hal/hpani.h b/drivers/staging/otus/hal/hpani.h index 96e69af3c685..b89241371ab1 100644 --- a/drivers/staging/otus/hal/hpani.h +++ b/drivers/staging/otus/hal/hpani.h @@ -99,8 +99,8 @@ typedef enum { ZM_HAL_ANI_PHYERR_RESET, /* reset phy error stats */ } ZM_HAL_ANI_CMD; -#define AR_PHY_COUNTMAX (3 << 22) // Max counted before intr -#define ZM_HAL_PROCESS_ANI 0x00000001 /* ANI state setup */ +#define AR_PHY_COUNTMAX (3 << 22) /* Max counted before intr */ +#define ZM_HAL_PROCESS_ANI 0x00000001 /* ANI state setup */ #define ZM_RSSI_DUMMY_MARKER 0x127 /* PHY registers in ar5416, related base and register offsets @@ -353,7 +353,7 @@ typedef enum { #define AR_PHY_CCK_DETECT 0x1C6208 #define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK 0x0000003F #define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK_S 0 -#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME 0x00001FC0 // [12:6] settling time for antenna switch +#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME 0x00001FC0 /* [12:6] settling time for antenna switch */ #define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME_S 6 #define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV 0x2000 @@ -392,7 +392,6 @@ typedef enum { #define AR_PHY_TPCRG1_PD_GAIN_2_S 18 #define AR_PHY_TPCRG1_PD_GAIN_3 0x00300000 #define AR_PHY_TPCRG1_PD_GAIN_3_S 20 -// #define AR_PHY_ANALOG_SWAP 0xa268 #define AR_PHY_SWAP_ALT_CHAIN 0x00000040 diff --git a/drivers/staging/otus/hal/hpfw2.c b/drivers/staging/otus/hal/hpfw2.c index baceb0299765..17f405b5db17 100644 --- a/drivers/staging/otus/hal/hpfw2.c +++ b/drivers/staging/otus/hal/hpfw2.c @@ -1015,4 +1015,4 @@ const u32_t zcP2FwImage[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; -const u32_t zcP2FwImageSize=15964; +const u32_t zcP2FwImageSize = 15964; diff --git a/drivers/staging/otus/hal/hpfwu.c b/drivers/staging/otus/hal/hpfwu.c index 2b77cbacc6d6..68fabef180af 100644 --- a/drivers/staging/otus/hal/hpfwu.c +++ b/drivers/staging/otus/hal/hpfwu.c @@ -1014,4 +1014,4 @@ const u32_t zcFwImage[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; -const u32_t zcFwImageSize=15936; +const u32_t zcFwImageSize = 15936; diff --git a/drivers/staging/otus/hal/hpfwu_2k.c b/drivers/staging/otus/hal/hpfwu_2k.c index 94e2caca5369..b675d6d556b2 100644 --- a/drivers/staging/otus/hal/hpfwu_2k.c +++ b/drivers/staging/otus/hal/hpfwu_2k.c @@ -1013,4 +1013,4 @@ const u32_t zcFwImage[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; -const u32_t zcFwImageSize=15928; +const u32_t zcFwImageSize = 15928; diff --git a/drivers/staging/otus/hal/hpfwu_BA.c b/drivers/staging/otus/hal/hpfwu_BA.c index 0c741571f2b5..f89419b37431 100644 --- a/drivers/staging/otus/hal/hpfwu_BA.c +++ b/drivers/staging/otus/hal/hpfwu_BA.c @@ -871,4 +871,4 @@ const u32_t zcFwImage[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; -const u32_t zcFwImageSize=13656; +const u32_t zcFwImageSize = 13656; diff --git a/drivers/staging/otus/hal/hpfwu_OTUS_RC.c b/drivers/staging/otus/hal/hpfwu_OTUS_RC.c index 089d3e0ad853..accbec4369f7 100644 --- a/drivers/staging/otus/hal/hpfwu_OTUS_RC.c +++ b/drivers/staging/otus/hal/hpfwu_OTUS_RC.c @@ -712,4 +712,4 @@ const u32_t zcFwImage[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; -const u32_t zcFwImageSize=11104; +const u32_t zcFwImageSize = 11104; diff --git a/drivers/staging/otus/hal/hpfwuinit.c b/drivers/staging/otus/hal/hpfwuinit.c index ed80ffafaffc..5d0dccca080c 100644 --- a/drivers/staging/otus/hal/hpfwuinit.c +++ b/drivers/staging/otus/hal/hpfwuinit.c @@ -237,4 +237,4 @@ const u32_t zcFwImage[] = { 0x45485441, 0x38731652, 0x89ACFF91, 0xEE55D178, 0xEE000D0A, }; -const u32_t zcFwImageSize=3508; +const u32_t zcFwImageSize = 3508; diff --git a/drivers/staging/otus/hal/hpreg.c b/drivers/staging/otus/hal/hpreg.c index 178777c09dbd..da3b77433874 100644 --- a/drivers/staging/otus/hal/hpreg.c +++ b/drivers/staging/otus/hal/hpreg.c @@ -30,7 +30,7 @@ #include "hpusb.h" /* used throughout this file... */ -#define N(a) (sizeof (a) / sizeof (a[0])) +#define N(a) (sizeof(a) / sizeof(a[0])) #define HAL_MODE_11A_TURBO HAL_MODE_108A #define HAL_MODE_11G_TURBO HAL_MODE_108G @@ -78,7 +78,7 @@ enum { }; #define MKK5GHZ_FLAG1 (DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS) -#define MKK5GHZ_FLAG2 (DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC| LIMIT_FRAME_4MS) +#define MKK5GHZ_FLAG2 (DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS) typedef enum { DFS_UNINIT_DOMAIN = 0, /* Uninitialized dfs domain */ @@ -272,7 +272,7 @@ static REG_DMN_PAIR_MAPPING regDomainPairs[] = { /* MKK4 */ {MKK4_MKKB, MKK4, MKKA, MKK5GHZ_FLAG2, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN10 }, {MKK4_MKKA1, MKK4, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN28 }, - {MKK4_MKKA2, MKK4, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3 |PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN11 }, + {MKK4_MKKA2, MKK4, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN11 }, {MKK4_MKKC, MKK4, MKKC, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3, CTRY_JAPAN12 }, {MKK4_FCCA, MKK4, FCCA, MKK5GHZ_FLAG1, NEED_NFC, NO_PSCAN, CTRY_JAPAN29 }, {MKK4_MKKA, MKK4, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA, CTRY_JAPAN36 }, @@ -301,7 +301,7 @@ static REG_DMN_PAIR_MAPPING regDomainPairs[] = { {MKK8_MKKA2, MKK8, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN23 }, {MKK8_MKKC, MKK8, MKKC, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 , CTRY_JAPAN24 }, - /* MKK9 */ + /* MKK9 */ {MKK9_MKKA, MKK9, MKKA, MKK5GHZ_FLAG1, NEED_NFC, NO_PSCAN, CTRY_JAPAN34 }, {MKK9_FCCA, MKK9, FCCA, MKK5GHZ_FLAG1, NEED_NFC, NO_PSCAN, CTRY_JAPAN37 }, {MKK9_MKKA1, MKK9, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN38 }, @@ -359,7 +359,7 @@ static REG_DMN_PAIR_MAPPING regDomainPairs[] = { #define COUNTRY_CODE_MASK 0x03ff #define CF_INTERFERENCE (CHANNEL_CW_INT | CHANNEL_RADAR_INT) #define CHANNEL_14 (2484) /* 802.11g operation is not permitted on channel 14 */ -#define IS_11G_CH14(_ch,_cf) \ +#define IS_11G_CH14(_ch, _cf) \ (((_ch) == CHANNEL_14) && ((_cf) == CHANNEL_G)) #define YES TRUE @@ -373,183 +373,183 @@ enum { typedef struct { HAL_CTRY_CODE countryCode; HAL_REG_DOMAIN regDmnEnum; - const char* isoName; - const char* name; + const char *isoName; + const char *name; HAL_BOOL allow11g; HAL_BOOL allow11aTurbo; HAL_BOOL allow11gTurbo; - HAL_BOOL allow11na; /* HT-40 allowed in 5GHz? */ - HAL_BOOL allow11ng; /* HT-40 allowed in 2GHz? */ + HAL_BOOL allow11na; /* HT-40 allowed in 5GHz? */ + HAL_BOOL allow11ng; /* HT-40 allowed in 2GHz? */ u16_t outdoorChanStart; } COUNTRY_CODE_TO_ENUM_RD; static COUNTRY_CODE_TO_ENUM_RD allCountries[] = { - {CTRY_DEBUG, NO_ENUMRD, "DB", "DEBUG", YES, YES, YES, YES, YES, 7000 }, - {CTRY_DEFAULT, DEF_REGDMN, "NA", "NO_COUNTRY_SET", YES, YES, YES, YES, YES, 7000 }, - {CTRY_ALBANIA, NULL1_WORLD, "AL", "ALBANIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_ALGERIA, NULL1_WORLD, "DZ", "ALGERIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_ARGENTINA, APL3_WORLD, "AR", "ARGENTINA", YES, NO, NO, NO, NO, 7000 }, - {CTRY_ARMENIA, ETSI4_WORLD, "AM", "ARMENIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_AUSTRALIA, FCC6_WORLD, "AU", "AUSTRALIA", YES, YES, YES, YES, YES, 7000 }, - {CTRY_AUSTRIA, ETSI2_WORLD, "AT", "AUSTRIA", YES, NO, YES, YES, YES, 7000 }, - {CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ", "AZERBAIJAN", YES, YES, YES, YES, YES, 7000 }, - {CTRY_BAHRAIN, APL6_WORLD, "BH", "BAHRAIN", YES, NO, YES, NO, YES, 7000 }, - {CTRY_BELARUS, ETSI1_WORLD, "BY", "BELARUS", YES, NO, YES, YES, YES, 7000 }, - {CTRY_BELGIUM, ETSI1_WORLD, "BE", "BELGIUM", YES, NO, YES, YES, YES, 7000 }, - {CTRY_BELIZE, APL1_ETSIC, "BZ", "BELIZE", YES, YES, YES, YES, YES, 7000 }, - {CTRY_BOLIVIA, APL1_ETSIC, "BO", "BOLVIA", YES, YES, YES, YES, YES, 7000 }, - {CTRY_BRAZIL, FCC3_WORLD, "BR", "BRAZIL", NO, NO, NO, NO, NO, 7000 }, - {CTRY_BRUNEI_DARUSSALAM,APL1_WORLD,"BN", "BRUNEI DARUSSALAM", YES, YES, YES, YES, YES, 7000 }, - {CTRY_BULGARIA, ETSI6_WORLD, "BG", "BULGARIA", YES, NO, YES, YES, YES, 7000 }, - {CTRY_CANADA, FCC6_FCCA, "CA", "CANADA", YES, YES, YES, YES, YES, 7000 }, - {CTRY_CHILE, APL6_WORLD, "CL", "CHILE", YES, YES, YES, YES, YES, 7000 }, - {CTRY_CHINA, APL1_WORLD, "CN", "CHINA", YES, YES, YES, YES, YES, 7000 }, - {CTRY_COLOMBIA, FCC1_FCCA, "CO", "COLOMBIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_COSTA_RICA, FCC1_WORLD, "CR", "COSTA RICA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_CROATIA, ETSI3_WORLD, "HR", "CROATIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_CYPRUS, ETSI3_WORLD, "CY", "CYPRUS", YES, YES, YES, YES, YES, 7000 }, - {CTRY_CZECH, ETSI3_WORLD, "CZ", "CZECH REPUBLIC", YES, NO, YES, YES, YES, 7000 }, - {CTRY_DENMARK, ETSI1_WORLD, "DK", "DENMARK", YES, NO, YES, YES, YES, 7000 }, - {CTRY_DOMINICAN_REPUBLIC,FCC1_FCCA,"DO", "DOMINICAN REPUBLIC", YES, YES, YES, YES, YES, 7000 }, - {CTRY_ECUADOR, FCC1_WORLD, "EC", "ECUADOR", YES, NO, NO, NO, YES, 7000 }, - {CTRY_EGYPT, ETSI3_WORLD, "EG", "EGYPT", YES, NO, YES, NO, YES, 7000 }, - {CTRY_EL_SALVADOR, FCC1_WORLD, "SV", "EL SALVADOR", YES, NO, YES, NO, YES, 7000 }, - {CTRY_ESTONIA, ETSI1_WORLD, "EE", "ESTONIA", YES, NO, YES, YES, YES, 7000 }, - {CTRY_FINLAND, ETSI1_WORLD, "FI", "FINLAND", YES, NO, YES, YES, YES, 7000 }, - {CTRY_FRANCE, ETSI1_WORLD, "FR", "FRANCE", YES, NO, YES, YES, YES, 7000 }, - {CTRY_FRANCE2, ETSI3_WORLD, "F2", "FRANCE_RES", YES, NO, YES, YES, YES, 7000 }, - {CTRY_GEORGIA, ETSI4_WORLD, "GE", "GEORGIA", YES, YES, YES, YES, YES, 7000 }, - {CTRY_GERMANY, ETSI1_WORLD, "DE", "GERMANY", YES, NO, YES, YES, YES, 7000 }, - {CTRY_GREECE, ETSI1_WORLD, "GR", "GREECE", YES, NO, YES, YES, YES, 7000 }, - {CTRY_GUATEMALA, FCC1_FCCA, "GT", "GUATEMALA", YES, YES, YES, YES, YES, 7000 }, - {CTRY_HONDURAS, NULL1_WORLD, "HN", "HONDURAS", YES, NO, YES, NO, YES, 7000 }, - {CTRY_HONG_KONG, FCC2_WORLD, "HK", "HONG KONG", YES, YES, YES, YES, YES, 7000 }, - {CTRY_HUNGARY, ETSI4_WORLD, "HU", "HUNGARY", YES, NO, YES, YES, YES, 7000 }, - {CTRY_ICELAND, ETSI1_WORLD, "IS", "ICELAND", YES, NO, YES, YES, YES, 7000 }, - {CTRY_INDIA, APL6_WORLD, "IN", "INDIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_INDONESIA, APL1_WORLD, "ID", "INDONESIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_IRAN, APL1_WORLD, "IR", "IRAN", YES, YES, YES, YES, YES, 7000 }, - {CTRY_IRELAND, ETSI1_WORLD, "IE", "IRELAND", YES, NO, YES, YES, YES, 7000 }, - {CTRY_ISRAEL, ETSI3_WORLD, "IL", "ISRAEL", YES, NO, YES, NO, YES, 7000 }, - {CTRY_ISRAEL2, NULL1_ETSIB, "ISR","ISRAEL_RES", YES, NO, YES, NO, YES, 7000 }, - {CTRY_ITALY, ETSI1_WORLD, "IT", "ITALY", YES, NO, YES, YES, YES, 7000 }, - {CTRY_JAMAICA, ETSI1_WORLD, "JM", "JAMAICA", YES, NO, YES, YES, YES, 7000 }, - {CTRY_JAPAN, MKK1_MKKA, "JP", "JAPAN", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN1, MKK1_MKKB, "J1", "JAPAN1", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN2, MKK1_FCCA, "J2", "JAPAN2", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN3, MKK2_MKKA, "J3", "JAPAN3", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN4, MKK1_MKKA1, "J4", "JAPAN4", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN5, MKK1_MKKA2, "J5", "JAPAN5", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN6, MKK1_MKKC, "J6", "JAPAN6", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN7, MKK3_MKKB, "J7", "JAPAN7", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN8, MKK3_MKKA2, "J8", "JAPAN8", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN9, MKK3_MKKC, "J9", "JAPAN9", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN10, MKK4_MKKB, "J10", "JAPAN10", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN11, MKK4_MKKA2, "J11", "JAPAN11", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN12, MKK4_MKKC, "J12", "JAPAN12", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN13, MKK5_MKKB, "J13", "JAPAN13", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN14, MKK5_MKKA2, "J14", "JAPAN14", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN15, MKK5_MKKC, "J15", "JAPAN15", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN16, MKK6_MKKB, "J16", "JAPAN16", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN17, MKK6_MKKA2, "J17", "JAPAN17", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN18, MKK6_MKKC, "J18", "JAPAN18", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN19, MKK7_MKKB, "J19", "JAPAN19", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN20, MKK7_MKKA, "J20", "JAPAN20", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN21, MKK7_MKKC, "J21", "JAPAN21", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN22, MKK8_MKKB, "J22", "JAPAN22", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN23, MKK8_MKKA2, "J23", "JAPAN23", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN24, MKK8_MKKC, "J24", "JAPAN24", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN25, MKK3_MKKA, "J25", "JAPAN25", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN26, MKK3_MKKA1, "J26", "JAPAN26", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN27, MKK3_FCCA, "J27", "JAPAN27", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN28, MKK4_MKKA1, "J28", "JAPAN28", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN29, MKK4_FCCA, "J29", "JAPAN29", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN30, MKK6_MKKA1, "J30", "JAPAN30", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN31, MKK6_FCCA, "J31", "JAPAN31", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN32, MKK7_MKKA1, "J32", "JAPAN32", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN33, MKK7_FCCA, "J33", "JAPAN33", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN34, MKK9_MKKA, "J34", "JAPAN34", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN35, MKK10_MKKA, "J35", "JAPAN35", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN36, MKK4_MKKA, "J36", "JAPAN36", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN37, MKK9_FCCA, "J37", "JAPAN37", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN38, MKK9_MKKA1, "J38", "JAPAN38", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN39, MKK9_MKKC, "J39", "JAPAN39", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN40, MKK10_MKKA2, "J40", "JAPAN40", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN41, MKK10_FCCA, "J41", "JAPAN41", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN42, MKK10_MKKA1, "J42", "JAPAN42", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN43, MKK10_MKKC, "J43", "JAPAN43", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN44, MKK10_MKKA2, "J44", "JAPAN44", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN45, MKK11_MKKA, "J45", "JAPAN45", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN46, MKK11_FCCA, "J46", "JAPAN46", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN47, MKK11_MKKA1, "J47", "JAPAN47", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN48, MKK11_MKKC, "J48", "JAPAN48", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN49, MKK11_MKKA2, "J49", "JAPAN49", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN50, MKK12_MKKA, "J50", "JAPAN50", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN51, MKK12_FCCA, "J51", "JAPAN51", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN52, MKK12_MKKA1, "J52", "JAPAN52", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN53, MKK12_MKKC, "J53", "JAPAN53", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JAPAN54, MKK12_MKKA2, "J54", "JAPAN54", YES, NO, NO, NO, NO, 7000 }, - {CTRY_JORDAN, ETSI2_WORLD, "JO", "JORDAN", YES, NO, YES, NO, YES, 7000 }, - {CTRY_KAZAKHSTAN, NULL1_WORLD, "KZ", "KAZAKHSTAN", YES, NO, YES, NO, YES, 7000 }, - {CTRY_KOREA_NORTH, APL9_WORLD, "KP", "NORTH KOREA", YES, NO, NO, YES, YES, 7000 }, - {CTRY_KOREA_ROC, APL9_WORLD, "KR", "KOREA REPUBLIC", YES, NO, NO, NO, NO, 7000 }, - {CTRY_KOREA_ROC2, APL2_APLD, "K2", "KOREA REPUBLIC2",YES, NO, NO, NO, NO, 7000 }, - {CTRY_KOREA_ROC3, APL9_WORLD, "K3", "KOREA REPUBLIC3",YES, NO, NO, NO, NO, 7000 }, - {CTRY_KUWAIT, NULL1_WORLD, "KW", "KUWAIT", YES, NO, YES, NO, YES, 7000 }, - {CTRY_LATVIA, ETSI1_WORLD, "LV", "LATVIA", YES, NO, YES, YES, YES, 7000 }, - {CTRY_LEBANON, NULL1_WORLD, "LB", "LEBANON", YES, NO, YES, NO, YES, 7000 }, - {CTRY_LIECHTENSTEIN,ETSI1_WORLD, "LI", "LIECHTENSTEIN", YES, NO, YES, YES, YES, 7000 }, - {CTRY_LITHUANIA, ETSI1_WORLD, "LT", "LITHUANIA", YES, NO, YES, YES, YES, 7000 }, - {CTRY_LUXEMBOURG, ETSI1_WORLD, "LU", "LUXEMBOURG", YES, NO, YES, YES, YES, 7000 }, - {CTRY_MACAU, FCC2_WORLD, "MO", "MACAU", YES, YES, YES, YES, YES, 7000 }, - {CTRY_MACEDONIA, NULL1_WORLD, "MK", "MACEDONIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_MALAYSIA, APL8_WORLD, "MY", "MALAYSIA", NO, NO, NO, NO, NO, 7000 }, - {CTRY_MALTA, ETSI1_WORLD, "MT", "MALTA", YES, NO, YES, YES, YES, 7000 }, - {CTRY_MEXICO, FCC1_FCCA, "MX", "MEXICO", YES, YES, YES, YES, YES, 7000 }, - {CTRY_MONACO, ETSI4_WORLD, "MC", "MONACO", YES, YES, YES, YES, YES, 7000 }, - {CTRY_MOROCCO, NULL1_WORLD, "MA", "MOROCCO", YES, NO, YES, NO, YES, 7000 }, - {CTRY_NETHERLANDS, ETSI1_WORLD, "NL", "NETHERLANDS", YES, NO, YES, YES, YES, 7000 }, - {CTRY_NETHERLANDS_ANT, ETSI1_WORLD, "AN", "NETHERLANDS-ANTILLES", YES, NO, YES, YES, YES, 7000 }, - {CTRY_NEW_ZEALAND, FCC2_ETSIC, "NZ", "NEW ZEALAND", YES, NO, YES, NO, YES, 7000 }, - {CTRY_NORWAY, ETSI1_WORLD, "NO", "NORWAY", YES, NO, YES, YES, YES, 7000 }, - {CTRY_OMAN, APL6_WORLD, "OM", "OMAN", YES, NO, YES, NO, YES, 7000 }, - {CTRY_PAKISTAN, NULL1_WORLD, "PK", "PAKISTAN", YES, NO, YES, NO, YES, 7000 }, - {CTRY_PANAMA, FCC1_FCCA, "PA", "PANAMA", YES, YES, YES, YES, YES, 7000 }, - {CTRY_PERU, APL1_WORLD, "PE", "PERU", YES, NO, YES, NO, YES, 7000 }, - {CTRY_PHILIPPINES, APL1_WORLD, "PH", "PHILIPPINES", YES, YES, YES, YES, YES, 7000 }, - {CTRY_POLAND, ETSI1_WORLD, "PL", "POLAND", YES, NO, YES, YES, YES, 7000 }, - {CTRY_PORTUGAL, ETSI1_WORLD, "PT", "PORTUGAL", YES, NO, YES, YES, YES, 7000 }, - {CTRY_PUERTO_RICO, FCC1_FCCA, "PR", "PUERTO RICO", YES, YES, YES, YES, YES, 7000 }, - {CTRY_QATAR, NULL1_WORLD, "QA", "QATAR", YES, NO, YES, NO, YES, 7000 }, - {CTRY_ROMANIA, NULL1_WORLD, "RO", "ROMANIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_RUSSIA, NULL1_WORLD, "RU", "RUSSIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_SAUDI_ARABIA,NULL1_WORLD, "SA", "SAUDI ARABIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_SERBIA_MONT, ETSI1_WORLD, "CS", "SERBIA & MONTENEGRO", YES, NO, YES, YES, YES, 7000 }, - {CTRY_SINGAPORE, APL6_WORLD, "SG", "SINGAPORE", YES, YES, YES, YES, YES, 7000 }, - {CTRY_SLOVAKIA, ETSI1_WORLD, "SK", "SLOVAK REPUBLIC",YES, NO, YES, YES, YES, 7000 }, - {CTRY_SLOVENIA, ETSI1_WORLD, "SI", "SLOVENIA", YES, NO, YES, YES, YES, 7000 }, - {CTRY_SOUTH_AFRICA,FCC3_WORLD, "ZA", "SOUTH AFRICA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_SPAIN, ETSI1_WORLD, "ES", "SPAIN", YES, NO, YES, YES, YES, 7000 }, - {CTRY_SRILANKA, FCC3_WORLD, "LK", "SRI LANKA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_SWEDEN, ETSI1_WORLD, "SE", "SWEDEN", YES, NO, YES, YES, YES, 7000 }, - {CTRY_SWITZERLAND, ETSI1_WORLD, "CH", "SWITZERLAND", YES, NO, YES, YES, YES, 7000 }, - {CTRY_SYRIA, NULL1_WORLD, "SY", "SYRIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_TAIWAN, APL3_FCCA, "TW", "TAIWAN", YES, YES, YES, YES, YES, 7000 }, - {CTRY_THAILAND, NULL1_WORLD, "TH", "THAILAND", YES, NO, YES, NO, YES, 7000 }, - {CTRY_TRINIDAD_Y_TOBAGO,ETSI4_WORLD,"TT", "TRINIDAD & TOBAGO", YES, NO, YES, NO, YES, 7000 }, - {CTRY_TUNISIA, ETSI3_WORLD, "TN", "TUNISIA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_TURKEY, ETSI3_WORLD, "TR", "TURKEY", YES, NO, YES, NO, YES, 7000 }, - {CTRY_UKRAINE, NULL1_WORLD, "UA", "UKRAINE", YES, NO, YES, NO, YES, 7000 }, - {CTRY_UAE, NULL1_WORLD, "AE", "UNITED ARAB EMIRATES", YES, NO, YES, NO, YES, 7000 }, - {CTRY_UNITED_KINGDOM, ETSI1_WORLD,"GB", "UNITED KINGDOM", YES, NO, YES, NO, YES, 7000 }, - {CTRY_UNITED_STATES, FCC3_FCCA, "US", "UNITED STATES", YES, YES, YES, YES, YES, 5825 }, - {CTRY_UNITED_STATES_FCC49, FCC4_FCCA, "PS", "UNITED STATES (PUBLIC SAFETY)", YES, YES, YES, YES, YES, 7000 }, - {CTRY_URUGUAY, FCC1_WORLD, "UY", "URUGUAY", YES, NO, YES, NO, YES, 7000 }, - {CTRY_UZBEKISTAN, FCC3_FCCA, "UZ", "UZBEKISTAN", YES, YES, YES, YES, YES, 7000 }, - {CTRY_VENEZUELA, APL2_ETSIC, "VE", "VENEZUELA", YES, NO, YES, NO, YES, 7000 }, - {CTRY_VIET_NAM, NULL1_WORLD, "VN", "VIET NAM", YES, NO, YES, NO, YES, 7000 }, - {CTRY_YEMEN, NULL1_WORLD, "YE", "YEMEN", YES, NO, YES, NO, YES, 7000 }, - {CTRY_ZIMBABWE, NULL1_WORLD, "ZW", "ZIMBABWE", YES, NO, YES, NO, YES, 7000 } + {CTRY_DEBUG, NO_ENUMRD, "DB", "DEBUG", YES, YES, YES, YES, YES, 7000 }, + {CTRY_DEFAULT, DEF_REGDMN, "NA", "NO_COUNTRY_SET", YES, YES, YES, YES, YES, 7000 }, + {CTRY_ALBANIA, NULL1_WORLD, "AL", "ALBANIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_ALGERIA, NULL1_WORLD, "DZ", "ALGERIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_ARGENTINA, APL3_WORLD, "AR", "ARGENTINA", YES, NO, NO, NO, NO, 7000 }, + {CTRY_ARMENIA, ETSI4_WORLD, "AM", "ARMENIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_AUSTRALIA, FCC6_WORLD, "AU", "AUSTRALIA", YES, YES, YES, YES, YES, 7000 }, + {CTRY_AUSTRIA, ETSI2_WORLD, "AT", "AUSTRIA", YES, NO, YES, YES, YES, 7000 }, + {CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ", "AZERBAIJAN", YES, YES, YES, YES, YES, 7000 }, + {CTRY_BAHRAIN, APL6_WORLD, "BH", "BAHRAIN", YES, NO, YES, NO, YES, 7000 }, + {CTRY_BELARUS, ETSI1_WORLD, "BY", "BELARUS", YES, NO, YES, YES, YES, 7000 }, + {CTRY_BELGIUM, ETSI1_WORLD, "BE", "BELGIUM", YES, NO, YES, YES, YES, 7000 }, + {CTRY_BELIZE, APL1_ETSIC, "BZ", "BELIZE", YES, YES, YES, YES, YES, 7000 }, + {CTRY_BOLIVIA, APL1_ETSIC, "BO", "BOLVIA", YES, YES, YES, YES, YES, 7000 }, + {CTRY_BRAZIL, FCC3_WORLD, "BR", "BRAZIL", NO, NO, NO, NO, NO, 7000 }, + {CTRY_BRUNEI_DARUSSALAM, APL1_WORLD, "BN", "BRUNEI DARUSSALAM", YES, YES, YES, YES, YES, 7000 }, + {CTRY_BULGARIA, ETSI6_WORLD, "BG", "BULGARIA", YES, NO, YES, YES, YES, 7000 }, + {CTRY_CANADA, FCC6_FCCA, "CA", "CANADA", YES, YES, YES, YES, YES, 7000 }, + {CTRY_CHILE, APL6_WORLD, "CL", "CHILE", YES, YES, YES, YES, YES, 7000 }, + {CTRY_CHINA, APL1_WORLD, "CN", "CHINA", YES, YES, YES, YES, YES, 7000 }, + {CTRY_COLOMBIA, FCC1_FCCA, "CO", "COLOMBIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_COSTA_RICA, FCC1_WORLD, "CR", "COSTA RICA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_CROATIA, ETSI3_WORLD, "HR", "CROATIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_CYPRUS, ETSI3_WORLD, "CY", "CYPRUS", YES, YES, YES, YES, YES, 7000 }, + {CTRY_CZECH, ETSI3_WORLD, "CZ", "CZECH REPUBLIC", YES, NO, YES, YES, YES, 7000 }, + {CTRY_DENMARK, ETSI1_WORLD, "DK", "DENMARK", YES, NO, YES, YES, YES, 7000 }, + {CTRY_DOMINICAN_REPUBLIC, FCC1_FCCA, "DO", "DOMINICAN REPUBLIC", YES, YES, YES, YES, YES, 7000 }, + {CTRY_ECUADOR, FCC1_WORLD, "EC", "ECUADOR", YES, NO, NO, NO, YES, 7000 }, + {CTRY_EGYPT, ETSI3_WORLD, "EG", "EGYPT", YES, NO, YES, NO, YES, 7000 }, + {CTRY_EL_SALVADOR, FCC1_WORLD, "SV", "EL SALVADOR", YES, NO, YES, NO, YES, 7000 }, + {CTRY_ESTONIA, ETSI1_WORLD, "EE", "ESTONIA", YES, NO, YES, YES, YES, 7000 }, + {CTRY_FINLAND, ETSI1_WORLD, "FI", "FINLAND", YES, NO, YES, YES, YES, 7000 }, + {CTRY_FRANCE, ETSI1_WORLD, "FR", "FRANCE", YES, NO, YES, YES, YES, 7000 }, + {CTRY_FRANCE2, ETSI3_WORLD, "F2", "FRANCE_RES", YES, NO, YES, YES, YES, 7000 }, + {CTRY_GEORGIA, ETSI4_WORLD, "GE", "GEORGIA", YES, YES, YES, YES, YES, 7000 }, + {CTRY_GERMANY, ETSI1_WORLD, "DE", "GERMANY", YES, NO, YES, YES, YES, 7000 }, + {CTRY_GREECE, ETSI1_WORLD, "GR", "GREECE", YES, NO, YES, YES, YES, 7000 }, + {CTRY_GUATEMALA, FCC1_FCCA, "GT", "GUATEMALA", YES, YES, YES, YES, YES, 7000 }, + {CTRY_HONDURAS, NULL1_WORLD, "HN", "HONDURAS", YES, NO, YES, NO, YES, 7000 }, + {CTRY_HONG_KONG, FCC2_WORLD, "HK", "HONG KONG", YES, YES, YES, YES, YES, 7000 }, + {CTRY_HUNGARY, ETSI4_WORLD, "HU", "HUNGARY", YES, NO, YES, YES, YES, 7000 }, + {CTRY_ICELAND, ETSI1_WORLD, "IS", "ICELAND", YES, NO, YES, YES, YES, 7000 }, + {CTRY_INDIA, APL6_WORLD, "IN", "INDIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_INDONESIA, APL1_WORLD, "ID", "INDONESIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_IRAN, APL1_WORLD, "IR", "IRAN", YES, YES, YES, YES, YES, 7000 }, + {CTRY_IRELAND, ETSI1_WORLD, "IE", "IRELAND", YES, NO, YES, YES, YES, 7000 }, + {CTRY_ISRAEL, ETSI3_WORLD, "IL", "ISRAEL", YES, NO, YES, NO, YES, 7000 }, + {CTRY_ISRAEL2, NULL1_ETSIB, "ISR", "ISRAEL_RES", YES, NO, YES, NO, YES, 7000 }, + {CTRY_ITALY, ETSI1_WORLD, "IT", "ITALY", YES, NO, YES, YES, YES, 7000 }, + {CTRY_JAMAICA, ETSI1_WORLD, "JM", "JAMAICA", YES, NO, YES, YES, YES, 7000 }, + {CTRY_JAPAN, MKK1_MKKA, "JP", "JAPAN", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN1, MKK1_MKKB, "J1", "JAPAN1", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN2, MKK1_FCCA, "J2", "JAPAN2", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN3, MKK2_MKKA, "J3", "JAPAN3", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN4, MKK1_MKKA1, "J4", "JAPAN4", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN5, MKK1_MKKA2, "J5", "JAPAN5", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN6, MKK1_MKKC, "J6", "JAPAN6", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN7, MKK3_MKKB, "J7", "JAPAN7", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN8, MKK3_MKKA2, "J8", "JAPAN8", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN9, MKK3_MKKC, "J9", "JAPAN9", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN10, MKK4_MKKB, "J10", "JAPAN10", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN11, MKK4_MKKA2, "J11", "JAPAN11", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN12, MKK4_MKKC, "J12", "JAPAN12", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN13, MKK5_MKKB, "J13", "JAPAN13", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN14, MKK5_MKKA2, "J14", "JAPAN14", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN15, MKK5_MKKC, "J15", "JAPAN15", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN16, MKK6_MKKB, "J16", "JAPAN16", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN17, MKK6_MKKA2, "J17", "JAPAN17", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN18, MKK6_MKKC, "J18", "JAPAN18", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN19, MKK7_MKKB, "J19", "JAPAN19", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN20, MKK7_MKKA, "J20", "JAPAN20", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN21, MKK7_MKKC, "J21", "JAPAN21", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN22, MKK8_MKKB, "J22", "JAPAN22", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN23, MKK8_MKKA2, "J23", "JAPAN23", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN24, MKK8_MKKC, "J24", "JAPAN24", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN25, MKK3_MKKA, "J25", "JAPAN25", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN26, MKK3_MKKA1, "J26", "JAPAN26", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN27, MKK3_FCCA, "J27", "JAPAN27", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN28, MKK4_MKKA1, "J28", "JAPAN28", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN29, MKK4_FCCA, "J29", "JAPAN29", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN30, MKK6_MKKA1, "J30", "JAPAN30", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN31, MKK6_FCCA, "J31", "JAPAN31", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN32, MKK7_MKKA1, "J32", "JAPAN32", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN33, MKK7_FCCA, "J33", "JAPAN33", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN34, MKK9_MKKA, "J34", "JAPAN34", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN35, MKK10_MKKA, "J35", "JAPAN35", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN36, MKK4_MKKA, "J36", "JAPAN36", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN37, MKK9_FCCA, "J37", "JAPAN37", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN38, MKK9_MKKA1, "J38", "JAPAN38", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN39, MKK9_MKKC, "J39", "JAPAN39", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN40, MKK10_MKKA2, "J40", "JAPAN40", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN41, MKK10_FCCA, "J41", "JAPAN41", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN42, MKK10_MKKA1, "J42", "JAPAN42", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN43, MKK10_MKKC, "J43", "JAPAN43", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN44, MKK10_MKKA2, "J44", "JAPAN44", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN45, MKK11_MKKA, "J45", "JAPAN45", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN46, MKK11_FCCA, "J46", "JAPAN46", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN47, MKK11_MKKA1, "J47", "JAPAN47", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN48, MKK11_MKKC, "J48", "JAPAN48", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN49, MKK11_MKKA2, "J49", "JAPAN49", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN50, MKK12_MKKA, "J50", "JAPAN50", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN51, MKK12_FCCA, "J51", "JAPAN51", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN52, MKK12_MKKA1, "J52", "JAPAN52", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN53, MKK12_MKKC, "J53", "JAPAN53", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JAPAN54, MKK12_MKKA2, "J54", "JAPAN54", YES, NO, NO, NO, NO, 7000 }, + {CTRY_JORDAN, ETSI2_WORLD, "JO", "JORDAN", YES, NO, YES, NO, YES, 7000 }, + {CTRY_KAZAKHSTAN, NULL1_WORLD, "KZ", "KAZAKHSTAN", YES, NO, YES, NO, YES, 7000 }, + {CTRY_KOREA_NORTH, APL9_WORLD, "KP", "NORTH KOREA", YES, NO, NO, YES, YES, 7000 }, + {CTRY_KOREA_ROC, APL9_WORLD, "KR", "KOREA REPUBLIC", YES, NO, NO, NO, NO, 7000 }, + {CTRY_KOREA_ROC2, APL2_APLD, "K2", "KOREA REPUBLIC2", YES, NO, NO, NO, NO, 7000 }, + {CTRY_KOREA_ROC3, APL9_WORLD, "K3", "KOREA REPUBLIC3", YES, NO, NO, NO, NO, 7000 }, + {CTRY_KUWAIT, NULL1_WORLD, "KW", "KUWAIT", YES, NO, YES, NO, YES, 7000 }, + {CTRY_LATVIA, ETSI1_WORLD, "LV", "LATVIA", YES, NO, YES, YES, YES, 7000 }, + {CTRY_LEBANON, NULL1_WORLD, "LB", "LEBANON", YES, NO, YES, NO, YES, 7000 }, + {CTRY_LIECHTENSTEIN, ETSI1_WORLD, "LI", "LIECHTENSTEIN", YES, NO, YES, YES, YES, 7000 }, + {CTRY_LITHUANIA, ETSI1_WORLD, "LT", "LITHUANIA", YES, NO, YES, YES, YES, 7000 }, + {CTRY_LUXEMBOURG, ETSI1_WORLD, "LU", "LUXEMBOURG", YES, NO, YES, YES, YES, 7000 }, + {CTRY_MACAU, FCC2_WORLD, "MO", "MACAU", YES, YES, YES, YES, YES, 7000 }, + {CTRY_MACEDONIA, NULL1_WORLD, "MK", "MACEDONIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_MALAYSIA, APL8_WORLD, "MY", "MALAYSIA", NO, NO, NO, NO, NO, 7000 }, + {CTRY_MALTA, ETSI1_WORLD, "MT", "MALTA", YES, NO, YES, YES, YES, 7000 }, + {CTRY_MEXICO, FCC1_FCCA, "MX", "MEXICO", YES, YES, YES, YES, YES, 7000 }, + {CTRY_MONACO, ETSI4_WORLD, "MC", "MONACO", YES, YES, YES, YES, YES, 7000 }, + {CTRY_MOROCCO, NULL1_WORLD, "MA", "MOROCCO", YES, NO, YES, NO, YES, 7000 }, + {CTRY_NETHERLANDS, ETSI1_WORLD, "NL", "NETHERLANDS", YES, NO, YES, YES, YES, 7000 }, + {CTRY_NETHERLANDS_ANT, ETSI1_WORLD, "AN", "NETHERLANDS-ANTILLES", YES, NO, YES, YES, YES, 7000 }, + {CTRY_NEW_ZEALAND, FCC2_ETSIC, "NZ", "NEW ZEALAND", YES, NO, YES, NO, YES, 7000 }, + {CTRY_NORWAY, ETSI1_WORLD, "NO", "NORWAY", YES, NO, YES, YES, YES, 7000 }, + {CTRY_OMAN, APL6_WORLD, "OM", "OMAN", YES, NO, YES, NO, YES, 7000 }, + {CTRY_PAKISTAN, NULL1_WORLD, "PK", "PAKISTAN", YES, NO, YES, NO, YES, 7000 }, + {CTRY_PANAMA, FCC1_FCCA, "PA", "PANAMA", YES, YES, YES, YES, YES, 7000 }, + {CTRY_PERU, APL1_WORLD, "PE", "PERU", YES, NO, YES, NO, YES, 7000 }, + {CTRY_PHILIPPINES, APL1_WORLD, "PH", "PHILIPPINES", YES, YES, YES, YES, YES, 7000 }, + {CTRY_POLAND, ETSI1_WORLD, "PL", "POLAND", YES, NO, YES, YES, YES, 7000 }, + {CTRY_PORTUGAL, ETSI1_WORLD, "PT", "PORTUGAL", YES, NO, YES, YES, YES, 7000 }, + {CTRY_PUERTO_RICO, FCC1_FCCA, "PR", "PUERTO RICO", YES, YES, YES, YES, YES, 7000 }, + {CTRY_QATAR, NULL1_WORLD, "QA", "QATAR", YES, NO, YES, NO, YES, 7000 }, + {CTRY_ROMANIA, NULL1_WORLD, "RO", "ROMANIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_RUSSIA, NULL1_WORLD, "RU", "RUSSIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_SAUDI_ARABIA, NULL1_WORLD, "SA", "SAUDI ARABIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_SERBIA_MONT, ETSI1_WORLD, "CS", "SERBIA & MONTENEGRO", YES, NO, YES, YES, YES, 7000 }, + {CTRY_SINGAPORE, APL6_WORLD, "SG", "SINGAPORE", YES, YES, YES, YES, YES, 7000 }, + {CTRY_SLOVAKIA, ETSI1_WORLD, "SK", "SLOVAK REPUBLIC", YES, NO, YES, YES, YES, 7000 }, + {CTRY_SLOVENIA, ETSI1_WORLD, "SI", "SLOVENIA", YES, NO, YES, YES, YES, 7000 }, + {CTRY_SOUTH_AFRICA, FCC3_WORLD, "ZA", "SOUTH AFRICA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_SPAIN, ETSI1_WORLD, "ES", "SPAIN", YES, NO, YES, YES, YES, 7000 }, + {CTRY_SRILANKA, FCC3_WORLD, "LK", "SRI LANKA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_SWEDEN, ETSI1_WORLD, "SE", "SWEDEN", YES, NO, YES, YES, YES, 7000 }, + {CTRY_SWITZERLAND, ETSI1_WORLD, "CH", "SWITZERLAND", YES, NO, YES, YES, YES, 7000 }, + {CTRY_SYRIA, NULL1_WORLD, "SY", "SYRIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_TAIWAN, APL3_FCCA, "TW", "TAIWAN", YES, YES, YES, YES, YES, 7000 }, + {CTRY_THAILAND, NULL1_WORLD, "TH", "THAILAND", YES, NO, YES, NO, YES, 7000 }, + {CTRY_TRINIDAD_Y_TOBAGO, ETSI4_WORLD, "TT", "TRINIDAD & TOBAGO", YES, NO, YES, NO, YES, 7000 }, + {CTRY_TUNISIA, ETSI3_WORLD, "TN", "TUNISIA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_TURKEY, ETSI3_WORLD, "TR", "TURKEY", YES, NO, YES, NO, YES, 7000 }, + {CTRY_UKRAINE, NULL1_WORLD, "UA", "UKRAINE", YES, NO, YES, NO, YES, 7000 }, + {CTRY_UAE, NULL1_WORLD, "AE", "UNITED ARAB EMIRATES", YES, NO, YES, NO, YES, 7000 }, + {CTRY_UNITED_KINGDOM, ETSI1_WORLD, "GB", "UNITED KINGDOM", YES, NO, YES, NO, YES, 7000 }, + {CTRY_UNITED_STATES, FCC3_FCCA, "US", "UNITED STATES", YES, YES, YES, YES, YES, 5825 }, + {CTRY_UNITED_STATES_FCC49, FCC4_FCCA, "PS", "UNITED STATES (PUBLIC SAFETY)", YES, YES, YES, YES, YES, 7000 }, + {CTRY_URUGUAY, FCC1_WORLD, "UY", "URUGUAY", YES, NO, YES, NO, YES, 7000 }, + {CTRY_UZBEKISTAN, FCC3_FCCA, "UZ", "UZBEKISTAN", YES, YES, YES, YES, YES, 7000 }, + {CTRY_VENEZUELA, APL2_ETSIC, "VE", "VENEZUELA", YES, NO, YES, NO, YES, 7000 }, + {CTRY_VIET_NAM, NULL1_WORLD, "VN", "VIET NAM", YES, NO, YES, NO, YES, 7000 }, + {CTRY_YEMEN, NULL1_WORLD, "YE", "YEMEN", YES, NO, YES, NO, YES, 7000 }, + {CTRY_ZIMBABWE, NULL1_WORLD, "ZW", "ZIMBABWE", YES, NO, YES, NO, YES, 7000 } }; typedef struct RegDmnFreqBand { @@ -660,7 +660,7 @@ enum { W1_5745_5825, W1_5500_5700, W2_5260_5320, - W2_5180_5240, + W2_5180_5240, W2_5825_5825, }; @@ -1332,8 +1332,8 @@ static REG_DOMAIN regDomains[] = { BMZERO, BMZERO, BMZERO, - BM(F2_2312_2372,F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), - BM(G2_2312_2372,G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(F2_2312_2372, F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(G2_2312_2372, G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO, BMZERO}, @@ -1342,9 +1342,9 @@ static REG_DOMAIN regDomains[] = { BMZERO, BMZERO, BMZERO, - BM(F1_2457_2472,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), - BM(G1_2457_2472,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), - BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(F1_2457_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(G1_2457_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO}, @@ -1352,9 +1352,9 @@ static REG_DOMAIN regDomains[] = { BMZERO, BMZERO, BMZERO, - BM(F1_2432_2442,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), - BM(G1_2432_2442,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), - BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(F1_2432_2442, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(G1_2432_2442, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO}, @@ -1362,9 +1362,9 @@ static REG_DOMAIN regDomains[] = { BMZERO, BMZERO, BMZERO, - BM(F3_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), - BM(G3_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), - BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(F3_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(G3_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO}, @@ -1372,10 +1372,10 @@ static REG_DOMAIN regDomains[] = { BMZERO, BMZERO, BMZERO, - BM(F1_2412_2462,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), - BM(G1_2412_2462,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), - BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), - BM(NG2_2422_2452,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(F1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(G1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(NG2_2422_2452, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO}, {MKKA, MKK, NO_DFS, PSCAN_MKKA | PSCAN_MKKA_G | PSCAN_MKKA1 | PSCAN_MKKA1_G | PSCAN_MKKA2 | PSCAN_MKKA2_G, DISALLOW_ADHOC_11A_TURB, @@ -1384,36 +1384,36 @@ static REG_DOMAIN regDomains[] = { BMZERO, BM(F2_2412_2462, F1_2467_2472, F2_2484_2484, -1, -1, -1, -1, -1, -1, -1, -1, -1), BM(G2_2412_2462, G1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), - BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), - BM(NG1_2422_2452,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(NG1_2422_2452, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO}, {MKKC, MKK, NO_DFS, NO_PSCAN, NO_REQ, BMZERO, BMZERO, BMZERO, - BM(F2_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), - BM(G2_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), - BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), - BM(NG1_2422_2452,-1,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(NG1_2422_2452, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO}, {WORLD, ETSI, NO_DFS, NO_PSCAN, NO_REQ, BMZERO, BMZERO, BMZERO, - BM(F2_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), - BM(G2_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), - BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), - BM(NG1_2422_2452,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), + BM(NG1_2422_2452, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO}, {WOR0_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D, BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, - BM(W1_2412_2412,W1_2437_2442,W1_2462_2462,W1_2472_2472,W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1), - BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462,WG1_2472_2472,WG1_2417_2432,WG1_2447_2457,WG1_2467_2467, -1, -1, -1, -1, -1), + BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1), + BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2472_2472, WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1), BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO}, @@ -1429,21 +1429,21 @@ static REG_DOMAIN regDomains[] = { BMZERO}, {WOR02_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D, - BM(W1_5260_5320, W1_5180_5240,W1_5170_5230,W1_5745_5825,W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), + BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, - BM(W1_2412_2412,W1_2437_2442,W1_2462_2462, W1_2472_2472,W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), - BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462, WG1_2472_2472,WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1), + BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), + BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2472_2472, WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1), BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO}, {EU1_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D, - BM(W1_5260_5320, W1_5180_5240,W1_5170_5230,W1_5745_5825,W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), + BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, - BM(W1_2412_2412,W1_2437_2442,W1_2462_2462, W2_2472_2472,W1_2417_2432, W1_2447_2457, W2_2467_2467, -1, -1, -1, -1, -1), - BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462, WG2_2472_2472,WG1_2417_2432, WG1_2447_2457, WG2_2467_2467, -1, -1, -1, -1, -1), + BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W2_2472_2472, W1_2417_2432, W1_2447_2457, W2_2467_2467, -1, -1, -1, -1, -1), + BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG2_2472_2472, WG1_2417_2432, WG1_2447_2457, WG2_2467_2467, -1, -1, -1, -1, -1), BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO}, @@ -1452,8 +1452,8 @@ static REG_DOMAIN regDomains[] = { BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO, - BM(W1_2412_2412,W1_2437_2442,W1_2462_2462,W1_2472_2472,W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1), - BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462,WG1_2472_2472,WG1_2417_2432,WG1_2447_2457,WG1_2467_2467, -1, -1, -1, -1, -1), + BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1), + BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2472_2472, WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1), BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO}, @@ -1462,8 +1462,8 @@ static REG_DOMAIN regDomains[] = { BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, - BM(W1_2412_2412,W1_2437_2442,W1_2462_2462,W1_2472_2472,W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1), - BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462,WG1_2472_2472,WG1_2417_2432,WG1_2447_2457,WG1_2467_2467, -1, -1, -1, -1, -1), + BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1), + BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2472_2472, WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1), BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO}, @@ -1472,8 +1472,8 @@ static REG_DOMAIN regDomains[] = { BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1), BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, - BM(W1_2412_2412,W1_2437_2442,W1_2462_2462,W1_2472_2472,W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), - BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462,WG1_2472_2472,WG1_2417_2432,WG1_2447_2457,WG1_2467_2467,-1, -1, -1, -1, -1), + BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), + BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2472_2472, WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1), BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO}, @@ -1482,8 +1482,8 @@ static REG_DOMAIN regDomains[] = { BM(W2_5260_5320, W2_5180_5240, F2_5745_5805, W2_5825_5825, -1, -1, -1, -1, -1, -1, -1, -1), BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, - BM(W1_2412_2412,W1_2437_2442,W1_2462_2462, W1_2417_2432,W1_2447_2457,-1, -1, -1, -1, -1, -1, -1), - BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462, WG1_2417_2432,WG1_2447_2457,-1, -1, -1, -1, -1, -1, -1), + BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432, W1_2447_2457, -1, -1, -1, -1, -1, -1, -1), + BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2417_2432, WG1_2447_2457, -1, -1, -1, -1, -1, -1, -1), BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), BMZERO, BMZERO}, @@ -1554,30 +1554,24 @@ static const struct cmode modes[] = { u8_t GetWmRD(u16_t regionCode, u16_t channelFlag, REG_DOMAIN *rd) { s16_t i, found, regDmn; - u64_t flags=NO_REQ; - REG_DMN_PAIR_MAPPING *regPair=NULL; + u64_t flags = NO_REQ; + REG_DMN_PAIR_MAPPING *regPair = NULL; - for (i=0, found=0; (i<N(regDomainPairs))&&(!found); i++) - { - if (regDomainPairs[i].regDmnEnum == regionCode) - { + for (i = 0, found = 0; (i < N(regDomainPairs)) && (!found); i++) { + if (regDomainPairs[i].regDmnEnum == regionCode) { regPair = ®DomainPairs[i]; found = 1; } } - if (!found) - { + if (!found) { zm_debug_msg1("Failed to find reg domain pair ", regionCode); return FALSE; } - if (channelFlag & ZM_REG_FLAG_CHANNEL_2GHZ) - { + if (channelFlag & ZM_REG_FLAG_CHANNEL_2GHZ) { regDmn = regPair->regDmn2GHz; flags = regPair->flags2GHz; - } - else - { + } else { regDmn = regPair->regDmn5GHz; flags = regPair->flags5GHz; } @@ -1587,19 +1581,16 @@ u8_t GetWmRD(u16_t regionCode, u16_t channelFlag, REG_DOMAIN *rd) * unitary reg domain of the pair */ - for (i=0;i<N(regDomains); i++) - { - if (regDomains[i].regDmnEnum == regDmn) - { - if (rd != NULL) - { - zfMemoryCopy((u8_t *)rd, (u8_t *)®Domains[i], - sizeof(REG_DOMAIN)); + for (i = 0 ; i < N(regDomains) ; i++) { + if (regDomains[i].regDmnEnum == regDmn) { + if (rd != NULL) { + zfMemoryCopy((u8_t *)rd, (u8_t *)®Domains[i], + sizeof(REG_DOMAIN)); } } } rd->pscan &= regPair->pscanMask; - rd->flags = (u32_t)flags; + rd->flags = (u32_t)flags; return TRUE; } @@ -1610,7 +1601,7 @@ u8_t isChanBitMaskZero(u64_t *bitmask) { u16_t i; - for (i=0; i<BMLEN; i++) { + for (i = 0; i < BMLEN; i++) { if (bitmask[i] != 0) return FALSE; } @@ -1632,384 +1623,344 @@ u8_t IS_BIT_SET(u32_t bit, u64_t *bitmask) } -void zfHpGetRegulationTable(zdev_t* dev, u16_t regionCode, u16_t c_lo, u16_t c_hi) +void zfHpGetRegulationTable(zdev_t *dev, u16_t regionCode, u16_t c_lo, u16_t c_hi) { REG_DOMAIN rd5GHz, rd2GHz; const struct cmode *cm; - s16_t next=0,b; - struct zsHpPriv* hpPriv; + s16_t next = 0, b; + struct zsHpPriv *hpPriv; - zmw_get_wlan_dev(dev); - hpPriv=wd->hpPrivate; + zmw_get_wlan_dev(dev); + hpPriv = wd->hpPrivate; - zmw_declare_for_critical_section(); + zmw_declare_for_critical_section(); - if (!GetWmRD(regionCode, ~ZM_REG_FLAG_CHANNEL_2GHZ, &rd5GHz)) - { - zm_debug_msg1("couldn't find unitary 5GHz reg domain for Region Code ", regionCode); + if (!GetWmRD(regionCode, ~ZM_REG_FLAG_CHANNEL_2GHZ, &rd5GHz)) { + zm_debug_msg1("couldn't find unitary 5GHz reg domain for Region Code ", regionCode); return; } - if (!GetWmRD(regionCode, ZM_REG_FLAG_CHANNEL_2GHZ, &rd2GHz)) - { - zm_debug_msg1("couldn't find unitary 2GHz reg domain for Region Code ", regionCode); + if (!GetWmRD(regionCode, ZM_REG_FLAG_CHANNEL_2GHZ, &rd2GHz)) { + zm_debug_msg1("couldn't find unitary 2GHz reg domain for Region Code ", regionCode); return; } - if (wd->regulationTable.regionCode == regionCode) - { - zm_debug_msg1("current region code is the same with Region Code ", regionCode); - return; - } - else - { - wd->regulationTable.regionCode = regionCode; - } + if (wd->regulationTable.regionCode == regionCode) { + zm_debug_msg1("current region code is the same with Region Code ", regionCode); + return; + } else + wd->regulationTable.regionCode = regionCode; - next = 0; + next = 0; - zmw_enter_critical_section(dev); + zmw_enter_critical_section(dev); - for (cm = modes; cm < &modes[N(modes)]; cm++) - { + for (cm = modes; cm < &modes[N(modes)]; cm++) { u16_t c; - u64_t *channelBM=NULL; - REG_DOMAIN *rd=NULL; - REG_DMN_FREQ_BAND *fband=NULL,*freqs=NULL; + u64_t *channelBM = NULL; + REG_DOMAIN *rd = NULL; + REG_DMN_FREQ_BAND *fband = NULL, *freqs = NULL; - switch (cm->mode) - { + switch (cm->mode) { case HAL_MODE_TURBO: - //we don't have turbo mode so we disable it - //zm_debug_msg0("CWY - HAL_MODE_TURBO"); - channelBM = NULL; - //rd = &rd5GHz; - //channelBM = rd->chan11a_turbo; - //freqs = ®Dmn5GhzTurboFreq[0]; - //ctl = rd->conformanceTestLimit | CTL_TURBO; + /* we don't have turbo mode so we disable it + //zm_debug_msg0("CWY - HAL_MODE_TURBO"); */ + channelBM = NULL; + /* rd = &rd5GHz; + channelBM = rd->chan11a_turbo; + freqs = ®Dmn5GhzTurboFreq[0]; + ctl = rd->conformanceTestLimit | CTL_TURBO; */ break; case HAL_MODE_11A: - if ((hpPriv->OpFlags & 0x1) != 0) - { - rd = &rd5GHz; - channelBM = rd->chan11a; - freqs = ®Dmn5GhzFreq[0]; - c_lo = 4920; //from channel 184 - c_hi = 5825; //to channel 165 - //ctl = rd->conformanceTestLimit; - //zm_debug_msg2("CWY - HAL_MODE_11A, channelBM = 0x", *channelBM); - } - //else - { - //channelBM = NULL; - } + if ((hpPriv->OpFlags & 0x1) != 0) { + rd = &rd5GHz; + channelBM = rd->chan11a; + freqs = ®Dmn5GhzFreq[0]; + c_lo = 4920; /* from channel 184 */ + c_hi = 5825; /* to channel 165 */ + /* ctl = rd->conformanceTestLimit; + zm_debug_msg2("CWY - HAL_MODE_11A, channelBM = 0x", *channelBM); */ + } + /* else + channelBM = NULL; + */ break; case HAL_MODE_11B: - //Disable 11B mode because it only has difference with 11G in PowerDFS Data, - //and we don't use this now. - //zm_debug_msg0("CWY - HAL_MODE_11B"); + /* Disable 11B mode because it only has difference with 11G in PowerDFS Data, + and we don't use this now. + zm_debug_msg0("CWY - HAL_MODE_11B"); */ channelBM = NULL; - //rd = &rd2GHz; - //channelBM = rd->chan11b; - //freqs = ®Dmn2GhzFreq[0]; - //ctl = rd->conformanceTestLimit | CTL_11B; - //zm_debug_msg2("CWY - HAL_MODE_11B, channelBM = 0x", *channelBM); + /* rd = &rd2GHz; + channelBM = rd->chan11b; + freqs = ®Dmn2GhzFreq[0]; + ctl = rd->conformanceTestLimit | CTL_11B; + zm_debug_msg2("CWY - HAL_MODE_11B, channelBM = 0x", *channelBM); */ break; case HAL_MODE_11G: - if ((hpPriv->OpFlags & 0x2) != 0) - { - rd = &rd2GHz; - channelBM = rd->chan11g; - freqs = ®Dmn2Ghz11gFreq[0]; - c_lo = 2412; //from channel 1 - //c_hi = 2462; //to channel 11 - c_hi = 2472; //to channel 13 - //ctl = rd->conformanceTestLimit | CTL_11G; - //zm_debug_msg2("CWY - HAL_MODE_11G, channelBM = 0x", *channelBM); - } - //else - { - //channelBM = NULL; - } + if ((hpPriv->OpFlags & 0x2) != 0) { + rd = &rd2GHz; + channelBM = rd->chan11g; + freqs = ®Dmn2Ghz11gFreq[0]; + c_lo = 2412; /* from channel 1 */ + /* c_hi = 2462; to channel 11 */ + c_hi = 2472; /* to channel 13 */ + /* ctl = rd->conformanceTestLimit | CTL_11G; */ + /* zm_debug_msg2("CWY - HAL_MODE_11G, channelBM = 0x", *channelBM); */ + } + /* else + channelBM = NULL; + */ break; case HAL_MODE_11G_TURBO: - //we don't have turbo mode so we disable it - //zm_debug_msg0("CWY - HAL_MODE_11G_TURBO"); - channelBM = NULL; - //rd = &rd2GHz; - //channelBM = rd->chan11g_turbo; - //freqs = ®Dmn2Ghz11gTurboFreq[0]; - //ctl = rd->conformanceTestLimit | CTL_108G; + /* we don't have turbo mode so we disable it + zm_debug_msg0("CWY - HAL_MODE_11G_TURBO"); */ + channelBM = NULL; + /* rd = &rd2GHz; + channelBM = rd->chan11g_turbo; + freqs = ®Dmn2Ghz11gTurboFreq[0]; + ctl = rd->conformanceTestLimit | CTL_108G; */ break; case HAL_MODE_11A_TURBO: - //we don't have turbo mode so we disable it - //zm_debug_msg0("CWY - HAL_MODE_11A_TURBO"); - channelBM = NULL; - //rd = &rd5GHz; - //channelBM = rd->chan11a_dyn_turbo; - //freqs = ®Dmn5GhzTurboFreq[0]; - //ctl = rd->conformanceTestLimit | CTL_108G; + /* we don't have turbo mode so we disable it + zm_debug_msg0("CWY - HAL_MODE_11A_TURBO"); */ + channelBM = NULL; + /* rd = &rd5GHz; + channelBM = rd->chan11a_dyn_turbo; + freqs = ®Dmn5GhzTurboFreq[0]; + ctl = rd->conformanceTestLimit | CTL_108G; */ break; default: - zm_debug_msg1("Unkonwn HAL mode ", cm->mode); + zm_debug_msg1("Unkonwn HAL mode ", cm->mode); continue; } - if (channelBM == NULL) - { - //zm_debug_msg0("CWY - channelBM is NULL"); + + if (channelBM == NULL) { + /* zm_debug_msg0("CWY - channelBM is NULL"); */ continue; - } - if (isChanBitMaskZero(channelBM)) - { - //zm_debug_msg0("CWY - BitMask is Zero"); - continue; - } - - // RAY:Is it ok?? - if (freqs == NULL ) - { - continue; - } - - for (b=0;b<64*BMLEN; b++) - { - if (IS_BIT_SET(b,channelBM)) - { + } + + if (isChanBitMaskZero(channelBM)) { + /* zm_debug_msg0("CWY - BitMask is Zero"); */ + continue; + } + + /* RAY:Is it ok?? */ + if (freqs == NULL) + continue; + + for (b = 0 ; b < 64*BMLEN ; b++) { + if (IS_BIT_SET(b, channelBM)) { fband = &freqs[b]; - //zm_debug_msg1("CWY - lowChannel = ", fband->lowChannel); - //zm_debug_msg1("CWY - highChannel = ", fband->highChannel); - //zm_debug_msg1("CWY - channelSep = ", fband->channelSep); - for (c=fband->lowChannel; c <= fband->highChannel; - c += fband->channelSep) - { + /* zm_debug_msg1("CWY - lowChannel = ", fband->lowChannel); + zm_debug_msg1("CWY - highChannel = ", fband->highChannel); + zm_debug_msg1("CWY - channelSep = ", fband->channelSep); */ + for (c = fband->lowChannel; c <= fband->highChannel; + c += fband->channelSep) { ZM_HAL_CHANNEL icv; - //Disable all DFS channel - if ((hpPriv->disableDfsCh==0) || (!(fband->useDfs & rd->dfsMask))) - { - if( fband->channelBW < 20 ) - { - /**************************************************************/ - /* */ - /* Temporary discard channel that BW < 20MHz (5 or 10MHz) */ - /* Our architecture does not implemnt it !!! */ - /* */ - /**************************************************************/ - continue; - } - if ((c >= c_lo) && (c <= c_hi)) - { - icv.channel = c; - icv.channelFlags = cm->flags; - icv.maxRegTxPower = fband->powerDfs; - if (fband->usePassScan & rd->pscan) - icv.channelFlags |= ZM_REG_FLAG_CHANNEL_PASSIVE; - else - icv.channelFlags &= ~ZM_REG_FLAG_CHANNEL_PASSIVE; - if (fband->useDfs & rd->dfsMask) - icv.privFlags = ZM_REG_FLAG_CHANNEL_DFS; - else - icv.privFlags = 0; - - /* For now disable radar for FCC3 */ - if (fband->useDfs & rd->dfsMask & DFS_FCC3) - { - icv.privFlags &= ~ZM_REG_FLAG_CHANNEL_DFS; - icv.privFlags |= ZM_REG_FLAG_CHANNEL_DFS_CLEAR; - } - - if(rd->flags & LIMIT_FRAME_4MS) - icv.privFlags |= ZM_REG_FLAG_CHANNEL_DFS_CLEAR; - - icv.minTxPower = 0; - icv.maxTxPower = 0; - - zm_assert(next < 60); - - wd->regulationTable.allowChannel[next++] = icv; - } + /* Disable all DFS channel */ + if ((hpPriv->disableDfsCh == 0) || (!(fband->useDfs & rd->dfsMask))) { + if (fband->channelBW < 20) { + /**************************************************************/ + /* */ + /* Temporary discard channel that BW < 20MHz (5 or 10MHz) */ + /* Our architecture does not implemnt it !!! */ + /* */ + /**************************************************************/ + continue; + } + if ((c >= c_lo) && (c <= c_hi)) { + icv.channel = c; + icv.channelFlags = cm->flags; + icv.maxRegTxPower = fband->powerDfs; + if (fband->usePassScan & rd->pscan) + icv.channelFlags |= ZM_REG_FLAG_CHANNEL_PASSIVE; + else + icv.channelFlags &= ~ZM_REG_FLAG_CHANNEL_PASSIVE; + if (fband->useDfs & rd->dfsMask) + icv.privFlags = ZM_REG_FLAG_CHANNEL_DFS; + else + icv.privFlags = 0; + + /* For now disable radar for FCC3 */ + if (fband->useDfs & rd->dfsMask & DFS_FCC3) { + icv.privFlags &= ~ZM_REG_FLAG_CHANNEL_DFS; + icv.privFlags |= ZM_REG_FLAG_CHANNEL_DFS_CLEAR; + } + + if (rd->flags & LIMIT_FRAME_4MS) + icv.privFlags |= ZM_REG_FLAG_CHANNEL_DFS_CLEAR; + + icv.minTxPower = 0; + icv.maxTxPower = 0; + + zm_assert(next < 60); + + wd->regulationTable.allowChannel[next++] = icv; + } + } } } } } - } wd->regulationTable.allowChannelCnt = next; - #if 0 - { - /* debug print */ - u32_t i; - DbgPrint("\n-------------------------------------------\n"); - DbgPrint("zfHpGetRegulationTable print all channel info regincode = 0x%x\n", wd->regulationTable.regionCode); - DbgPrint("index channel channelFlags maxRegTxPower privFlags useDFS\n"); - - for (i=0; i<wd->regulationTable.allowChannelCnt; i++) - { - DbgPrint("%02d %d %04x %02d %x %x\n", - i, - wd->regulationTable.allowChannel[i].channel, - wd->regulationTable.allowChannel[i].channelFlags, - wd->regulationTable.allowChannel[i].maxRegTxPower, - wd->regulationTable.allowChannel[i].privFlags, - wd->regulationTable.allowChannel[i].privFlags & ZM_REG_FLAG_CHANNEL_DFS); - } - } - #endif - - zmw_leave_critical_section(dev); + #if 0 + { + /* debug print */ + u32_t i; + DbgPrint("\n-------------------------------------------\n"); + DbgPrint("zfHpGetRegulationTable print all channel info regincode = 0x%x\n", wd->regulationTable.regionCode); + DbgPrint("index channel channelFlags maxRegTxPower privFlags useDFS\n"); + + for (i = 0 ; i < wd->regulationTable.allowChannelCnt ; i++) { + DbgPrint("%02d %d %04x %02d %x %x\n", i, + wd->regulationTable.allowChannel[i].channel, + wd->regulationTable.allowChannel[i].channelFlags, + wd->regulationTable.allowChannel[i].maxRegTxPower, + wd->regulationTable.allowChannel[i].privFlags, + wd->regulationTable.allowChannel[i].privFlags & ZM_REG_FLAG_CHANNEL_DFS); + } + } + #endif + + zmw_leave_critical_section(dev); } -void zfHpGetRegulationTablefromRegionCode(zdev_t* dev, u16_t regionCode) +void zfHpGetRegulationTablefromRegionCode(zdev_t *dev, u16_t regionCode) { - u16_t c_lo = 2000, c_hi = 6000; //default channel is all enable - u8_t isoName[3] = {'N', 'A', 0}; + u16_t c_lo = 2000, c_hi = 6000; /* default channel is all enable */ + u8_t isoName[3] = {'N', 'A', 0}; - zfCoreSetIsoName(dev, isoName); + zfCoreSetIsoName(dev, isoName); - zfHpGetRegulationTable(dev, regionCode, c_lo, c_hi); + zfHpGetRegulationTable(dev, regionCode, c_lo, c_hi); } -void zfHpGetRegulationTablefromCountry(zdev_t* dev, u16_t CountryCode) +void zfHpGetRegulationTablefromCountry(zdev_t *dev, u16_t CountryCode) { - u16_t i; - u16_t c_lo = 2000, c_hi = 6000; //default channel is all enable - u16_t RegDomain; - - zmw_get_wlan_dev(dev); + u16_t i; + u16_t c_lo = 2000, c_hi = 6000; /* default channel is all enable */ + u16_t RegDomain; - zmw_declare_for_critical_section(); + zmw_get_wlan_dev(dev); - for (i = 0; i < N(allCountries); i++) - { - if (CountryCode == allCountries[i].countryCode) - { - RegDomain = allCountries[i].regDmnEnum; + zmw_declare_for_critical_section(); - // read the ACU country code from EEPROM - zfCoreSetIsoName(dev, (u8_t*)allCountries[i].isoName); + for (i = 0; i < N(allCountries); i++) { + if (CountryCode == allCountries[i].countryCode) { + RegDomain = allCountries[i].regDmnEnum; - //zm_debug_msg_s("CWY - Country Name = ", allCountries[i].name); + /* read the ACU country code from EEPROM */ + zfCoreSetIsoName(dev, (u8_t *)allCountries[i].isoName); - if (wd->regulationTable.regionCode != RegDomain) - { - //zm_debug_msg0("CWY - Change regulatory table"); + /* zm_debug_msg_s("CWY - Country Name = ", allCountries[i].name); */ - zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi); - } - return; - } - } - zm_debug_msg1("Invalid CountryCode = ", CountryCode); + if (wd->regulationTable.regionCode != RegDomain) { + /* zm_debug_msg0("CWY - Change regulatory table"); */ + zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi); + } + return; + } + } + zm_debug_msg1("Invalid CountryCode = ", CountryCode); } -u8_t zfHpGetRegulationTablefromISO(zdev_t* dev, u8_t *countryInfo, u8_t length) +u8_t zfHpGetRegulationTablefromISO(zdev_t *dev, u8_t *countryInfo, u8_t length) { - u16_t i; - u16_t RegDomain; - u16_t c_lo = 2000, c_hi = 6000; //default channel is all enable - //u8_t strLen = 2; - - zmw_get_wlan_dev(dev); - - zmw_declare_for_critical_section(); - - if (countryInfo[4] != 0x20) - { // with (I)ndoor/(O)utdoor info - //strLen = 3; - } - //zm_debug_msg_s("Desired iso name = ", isoName); - for (i = 0; i < N(allCountries); i++) - { - //zm_debug_msg_s("Current iso name = ", allCountries[i].isoName); - if (zfMemoryIsEqual((u8_t *)allCountries[i].isoName, (u8_t *)&countryInfo[2], length-1)) - { - //DbgPrint("Set current iso name = %s\n", allCountries[i].isoName); - //zm_debug_msg0("iso name hit!!"); - - RegDomain = allCountries[i].regDmnEnum; - - if (wd->regulationTable.regionCode != RegDomain) - { - zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi); - } - - //while (index < (countryInfo[1]+2)) - //{ - // if (countryInfo[index] <= 14) - // { - // /* calculate 2.4GHz low boundary channel frequency */ - // ch = countryInfo[index]; - // if ( ch == 14 ) - // c_lo = ZM_CH_G_14; - // else - // c_lo = ZM_CH_G_1 + (ch - 1) * 5; - // /* calculate 2.4GHz high boundary channel frequency */ - // ch = countryInfo[index] + countryInfo[index + 1] - 1; - // if ( ch == 14 ) - // c_hi = ZM_CH_G_14; - // else - // c_hi = ZM_CH_G_1 + (ch - 1) * 5; - // } - // else - // { - // /* calculate 5GHz low boundary channel frequency */ - // ch = countryInfo[index]; - // if ( (ch >= 184)&&(ch <= 196) ) - // c_lo = 4000 + ch*5; - // else - // c_lo = 5000 + ch*5; - // /* calculate 5GHz high boundary channel frequency */ - // ch = countryInfo[index] + countryInfo[index + 1] - 1; - // if ( (ch >= 184)&&(ch <= 196) ) - // c_hi = 4000 + ch*5; - // else - // c_hi = 5000 + ch*5; - // } - // - // zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi); - // - // index+=3; - //} - - return 0; - } - } - //zm_debug_msg_s("Invalid iso name = ", &countryInfo[2]); - return 1; + u16_t i; + u16_t RegDomain; + u16_t c_lo = 2000, c_hi = 6000; /* default channel is all enable */ + /* u8_t strLen = 2; */ + + zmw_get_wlan_dev(dev); + + zmw_declare_for_critical_section(); + + if (countryInfo[4] != 0x20) { + /* with (I)ndoor/(O)utdoor info + strLen = 3; */ + } + /* zm_debug_msg_s("Desired iso name = ", isoName); */ + for (i = 0; i < N(allCountries); i++) { + /* zm_debug_msg_s("Current iso name = ", allCountries[i].isoName); */ + if (zfMemoryIsEqual((u8_t *)allCountries[i].isoName, (u8_t *)&countryInfo[2], length-1)) { + /* DbgPrint("Set current iso name = %s\n", allCountries[i].isoName); */ + /* zm_debug_msg0("iso name hit!!"); */ + + RegDomain = allCountries[i].regDmnEnum; + + if (wd->regulationTable.regionCode != RegDomain) + zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi); + /* + while (index < (countryInfo[1]+2)) { + if (countryInfo[index] <= 14) { + // calculate 2.4GHz low boundary channel frequency + ch = countryInfo[index]; + if ( ch == 14 ) + c_lo = ZM_CH_G_14; + else + c_lo = ZM_CH_G_1 + (ch - 1) * 5; + // calculate 2.4GHz high boundary channel frequency + ch = countryInfo[index] + countryInfo[index + 1] - 1; + if ( ch == 14 ) + c_hi = ZM_CH_G_14; + else + c_hi = ZM_CH_G_1 + (ch - 1) * 5; + } else { + // calculate 5GHz low boundary channel frequency + ch = countryInfo[index]; + if ( (ch >= 184)&&(ch <= 196) ) + c_lo = 4000 + ch*5; + else + c_lo = 5000 + ch*5; + // calculate 5GHz high boundary channel frequency + ch = countryInfo[index] + countryInfo[index + 1] - 1; + if ( (ch >= 184)&&(ch <= 196) ) + c_hi = 4000 + ch*5; + else + c_hi = 5000 + ch*5; + } + + zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi); + + index+=3; + } + */ + return 0; + } + } + /* zm_debug_msg_s("Invalid iso name = ", &countryInfo[2]); */ + return 1; } -const char* zfHpGetisoNamefromregionCode(zdev_t* dev, u16_t regionCode) +const char *zfHpGetisoNamefromregionCode(zdev_t *dev, u16_t regionCode) { - u16_t i; - - for (i = 0; i < N(allCountries); i++) - { - if (allCountries[i].regDmnEnum == regionCode) - { - return allCountries[i].isoName; - } - } - /* no matching item, return default */ - return allCountries[0].isoName; + u16_t i; + + for (i = 0; i < N(allCountries); i++) { + if (allCountries[i].regDmnEnum == regionCode) + return allCountries[i].isoName; + } + /* no matching item, return default */ + return allCountries[0].isoName; } -u16_t zfHpGetRegionCodeFromIsoName(zdev_t* dev, u8_t *countryIsoName) +u16_t zfHpGetRegionCodeFromIsoName(zdev_t *dev, u8_t *countryIsoName) { - u16_t i; - u16_t regionCode; - - /* if no matching item, return default */ - regionCode = DEF_REGDMN; - - for (i = 0; i < N(allCountries); i++) - { - if (zfMemoryIsEqual((u8_t *)allCountries[i].isoName, countryIsoName, 2)) - { - regionCode = allCountries[i].regDmnEnum; - break; - } - } - - return regionCode; + u16_t i; + u16_t regionCode; + + /* if no matching item, return default */ + regionCode = DEF_REGDMN; + + for (i = 0; i < N(allCountries); i++) { + if (zfMemoryIsEqual((u8_t *)allCountries[i].isoName, countryIsoName, 2)) { + regionCode = allCountries[i].regDmnEnum; + break; + } + } + + return regionCode; } /************************************************************************/ @@ -2029,323 +1980,294 @@ u16_t zfHpGetRegionCodeFromIsoName(zdev_t* dev, u8_t *countryIsoName) /* Chao-Wen Yang ZyDAS Technology Corporation 2007.3 */ /* */ /************************************************************************/ -u16_t zfHpDeleteAllowChannel(zdev_t* dev, u16_t freq) +u16_t zfHpDeleteAllowChannel(zdev_t *dev, u16_t freq) { - u16_t i, bandIndex = 0; - u16_t dfs5GBand[][2] = {{5150, 5240}, {5260, 5350}, {5450, 5700}, {5725, 5825}}; - - zmw_get_wlan_dev(dev); - /* Find which band does this frequency belong */ - for (i = 0; i < 4; i++) - { - if ((freq >= dfs5GBand[i][0]) && (freq <= dfs5GBand[i][1])) - bandIndex = i + 1; - } - - if (bandIndex == 0) - { - /* 2.4G, don't care */ - return 0; - } - else - { - bandIndex--; - } - /* Set all channels in this band to passive scan */ - for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) - { - if ((wd->regulationTable.allowChannel[i].channel >= dfs5GBand[bandIndex][0]) && - (wd->regulationTable.allowChannel[i].channel <= dfs5GBand[bandIndex][1])) - { - /* if channel is not passive, set it to be passive and mark it */ - if ((wd->regulationTable.allowChannel[i].channelFlags & - ZM_REG_FLAG_CHANNEL_PASSIVE) == 0) - { - wd->regulationTable.allowChannel[i].channelFlags |= - (ZM_REG_FLAG_CHANNEL_PASSIVE | ZM_REG_FLAG_CHANNEL_CSA); - } - } - } - - return 0; + u16_t i, bandIndex = 0; + u16_t dfs5GBand[][2] = { {5150, 5240}, {5260, 5350}, {5450, 5700}, {5725, 5825} }; + + zmw_get_wlan_dev(dev); + /* Find which band does this frequency belong */ + for (i = 0; i < 4; i++) { + if ((freq >= dfs5GBand[i][0]) && (freq <= dfs5GBand[i][1])) + bandIndex = i + 1; + } + + if (bandIndex == 0) { + /* 2.4G, don't care */ + return 0; + } else + bandIndex--; + /* Set all channels in this band to passive scan */ + for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) { + if ((wd->regulationTable.allowChannel[i].channel >= dfs5GBand[bandIndex][0]) && + (wd->regulationTable.allowChannel[i].channel <= dfs5GBand[bandIndex][1])) { + /* if channel is not passive, set it to be passive and mark it */ + if ((wd->regulationTable.allowChannel[i].channelFlags & + ZM_REG_FLAG_CHANNEL_PASSIVE) == 0) { + wd->regulationTable.allowChannel[i].channelFlags |= + (ZM_REG_FLAG_CHANNEL_PASSIVE | ZM_REG_FLAG_CHANNEL_CSA); + } + } + } + + return 0; } -u16_t zfHpAddAllowChannel(zdev_t* dev, u16_t freq) +u16_t zfHpAddAllowChannel(zdev_t *dev, u16_t freq) { - u16_t i, j, arrayIndex; + u16_t i, j, arrayIndex; - zmw_get_wlan_dev(dev); + zmw_get_wlan_dev(dev); - for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) - { - if (wd->regulationTable.allowChannel[i].channel == freq) - break; - } + for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) { + if (wd->regulationTable.allowChannel[i].channel == freq) + break; + } - if ( i == wd->regulationTable.allowChannelCnt) - { - for (j = 0; j < wd->regulationTable.allowChannelCnt; j++) - { - if (wd->regulationTable.allowChannel[j].channel > freq) - break; - } + if (i == wd->regulationTable.allowChannelCnt) { + for (j = 0; j < wd->regulationTable.allowChannelCnt; j++) { + if (wd->regulationTable.allowChannel[j].channel > freq) + break; + } - //zm_debug_msg1("CWY - add frequency = ", freq); - //zm_debug_msg1("CWY - channel array index = ", j); + /* zm_debug_msg1("CWY - add frequency = ", freq); + zm_debug_msg1("CWY - channel array index = ", j); */ - arrayIndex = j; + arrayIndex = j; - if (arrayIndex < wd->regulationTable.allowChannelCnt) - { - for (j = wd->regulationTable.allowChannelCnt; j > arrayIndex; j--) - wd->regulationTable.allowChannel[j] = wd->regulationTable.allowChannel[j - 1]; - } - wd->regulationTable.allowChannel[arrayIndex].channel = freq; + if (arrayIndex < wd->regulationTable.allowChannelCnt) { + for (j = wd->regulationTable.allowChannelCnt; j > arrayIndex; j--) + wd->regulationTable.allowChannel[j] = wd->regulationTable.allowChannel[j - 1]; + } + wd->regulationTable.allowChannel[arrayIndex].channel = freq; - wd->regulationTable.allowChannelCnt++; - } + wd->regulationTable.allowChannelCnt++; + } - return 0; + return 0; } -u16_t zfHpIsDfsChannelNCS(zdev_t* dev, u16_t freq) +u16_t zfHpIsDfsChannelNCS(zdev_t *dev, u16_t freq) { - u8_t flag = ZM_REG_FLAG_CHANNEL_DFS; - u16_t i; - zmw_get_wlan_dev(dev); - - for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) - { - //DbgPrint("DFS:freq=%d, chan=%d", freq, wd->regulationTable.allowChannel[i].channel); - if (wd->regulationTable.allowChannel[i].channel == freq) - { - flag = wd->regulationTable.allowChannel[i].privFlags; - break; - } - } - - return (flag & (ZM_REG_FLAG_CHANNEL_DFS|ZM_REG_FLAG_CHANNEL_DFS_CLEAR)); + u8_t flag = ZM_REG_FLAG_CHANNEL_DFS; + u16_t i; + zmw_get_wlan_dev(dev); + + for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) { + /* DbgPrint("DFS:freq=%d, chan=%d", freq, wd->regulationTable.allowChannel[i].channel); */ + if (wd->regulationTable.allowChannel[i].channel == freq) { + flag = wd->regulationTable.allowChannel[i].privFlags; + break; } + } + + return flag & (ZM_REG_FLAG_CHANNEL_DFS|ZM_REG_FLAG_CHANNEL_DFS_CLEAR); } -u16_t zfHpIsDfsChannel(zdev_t* dev, u16_t freq) +u16_t zfHpIsDfsChannel(zdev_t *dev, u16_t freq) { - u8_t flag = ZM_REG_FLAG_CHANNEL_DFS; - u16_t i; - zmw_get_wlan_dev(dev); + u8_t flag = ZM_REG_FLAG_CHANNEL_DFS; + u16_t i; + zmw_get_wlan_dev(dev); - zmw_declare_for_critical_section(); + zmw_declare_for_critical_section(); - zmw_enter_critical_section(dev); + zmw_enter_critical_section(dev); - for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) - { - //DbgPrint("DFS:freq=%d, chan=%d", freq, wd->regulationTable.allowChannel[i].channel); - if (wd->regulationTable.allowChannel[i].channel == freq) - { - flag = wd->regulationTable.allowChannel[i].privFlags; - break; - } - } + for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) { + /* DbgPrint("DFS:freq=%d, chan=%d", freq, wd->regulationTable.allowChannel[i].channel); */ + if (wd->regulationTable.allowChannel[i].channel == freq) { + flag = wd->regulationTable.allowChannel[i].privFlags; + break; + } + } - zmw_leave_critical_section(dev); + zmw_leave_critical_section(dev); - return (flag & (ZM_REG_FLAG_CHANNEL_DFS|ZM_REG_FLAG_CHANNEL_DFS_CLEAR)); + return flag & (ZM_REG_FLAG_CHANNEL_DFS|ZM_REG_FLAG_CHANNEL_DFS_CLEAR); } -u16_t zfHpIsAllowedChannel(zdev_t* dev, u16_t freq) +u16_t zfHpIsAllowedChannel(zdev_t *dev, u16_t freq) { - u16_t i; - zmw_get_wlan_dev(dev); - - for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) - { - if (wd->regulationTable.allowChannel[i].channel == freq) - { - return 1; - } - } - - return 0; + u16_t i; + zmw_get_wlan_dev(dev); + + for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) { + if (wd->regulationTable.allowChannel[i].channel == freq) + return 1; + } + + return 0; } -u16_t zfHpFindFirstNonDfsChannel(zdev_t* dev, u16_t aBand) +u16_t zfHpFindFirstNonDfsChannel(zdev_t *dev, u16_t aBand) { - u16_t chan = 2412; - u16_t i; - zmw_get_wlan_dev(dev); - - zmw_declare_for_critical_section(); - - zmw_enter_critical_section(dev); - - for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) - { - if ((wd->regulationTable.allowChannel[i].privFlags & ZM_REG_FLAG_CHANNEL_DFS) != 0) - { - if (aBand) - { - if (wd->regulationTable.allowChannel[i].channel > 3000) - { - chan = wd->regulationTable.allowChannel[i].channel; - break; - } - } - else - { - if (wd->regulationTable.allowChannel[i].channel < 3000) - { - chan = wd->regulationTable.allowChannel[i].channel; - break; - } - } - } - } - - zmw_leave_critical_section(dev); - - return chan; + u16_t chan = 2412; + u16_t i; + zmw_get_wlan_dev(dev); + + zmw_declare_for_critical_section(); + + zmw_enter_critical_section(dev); + + for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) { + if ((wd->regulationTable.allowChannel[i].privFlags & ZM_REG_FLAG_CHANNEL_DFS) != 0) { + if (aBand) { + if (wd->regulationTable.allowChannel[i].channel > 3000) { + chan = wd->regulationTable.allowChannel[i].channel; + break; + } + } else { + if (wd->regulationTable.allowChannel[i].channel < 3000) { + chan = wd->regulationTable.allowChannel[i].channel; + break; + } + } + } + } + + zmw_leave_critical_section(dev); + + return chan; } /* porting from ACU */ /* save RegulatoryDomain in hpriv */ -u8_t zfHpGetRegulatoryDomain(zdev_t* dev) +u8_t zfHpGetRegulatoryDomain(zdev_t *dev) { - zmw_get_wlan_dev(dev); - - switch (wd->regulationTable.regionCode) - { - case NO_ENUMRD: - return 0; - break; - case FCC1_FCCA: - case FCC1_WORLD: - case FCC4_FCCA: - case FCC5_FCCA: - case FCC2_WORLD: - case FCC2_ETSIC: - case FCC3_FCCA: - case FCC3_WORLD: - case FCC1: - case FCC2: - case FCC3: - case FCC4: - case FCC5: - case FCCA: - return 0x10;//WG_AMERICAS DOT11_REG_DOMAIN_FCC United States - break; - - case FCC2_FCCA: - return 0x20;//DOT11_REG_DOMAIN_DOC Canada - break; - - case ETSI1_WORLD: - case ETSI3_ETSIA: - case ETSI2_WORLD: - case ETSI3_WORLD: - case ETSI4_WORLD: - case ETSI4_ETSIC: - case ETSI5_WORLD: - case ETSI6_WORLD: - case ETSI_RESERVED: - case ETSI1: - case ETSI2: - case ETSI3: - case ETSI4: - case ETSI5: - case ETSI6: - case ETSIA: - case ETSIB: - case ETSIC: - return 0x30;//WG_EMEA DOT11_REG_DOMAIN_ETSI Most of Europe - break; - - case MKK1_MKKA: - case MKK1_MKKB: - case MKK2_MKKA: - case MKK1_FCCA: - case MKK1_MKKA1: - case MKK1_MKKA2: - case MKK1_MKKC: - case MKK3_MKKB: - case MKK3_MKKA2: - case MKK3_MKKC: - case MKK4_MKKB: - case MKK4_MKKA2: - case MKK4_MKKC: - case MKK5_MKKB: - case MKK5_MKKA2: - case MKK5_MKKC: - case MKK6_MKKB: - case MKK6_MKKA2: - case MKK6_MKKC: - case MKK7_MKKB: - case MKK7_MKKA: - case MKK7_MKKC: - case MKK8_MKKB: - case MKK8_MKKA2: - case MKK8_MKKC: - case MKK6_MKKA1: - case MKK6_FCCA: - case MKK7_MKKA1: - case MKK7_FCCA: - case MKK9_FCCA: - case MKK9_MKKA1: - case MKK9_MKKC: - case MKK9_MKKA2: - case MKK10_FCCA: - case MKK10_MKKA1: - case MKK10_MKKC: - case MKK10_MKKA2: - case MKK11_MKKA: - case MKK11_FCCA: - case MKK11_MKKA1: - case MKK11_MKKC: - case MKK11_MKKA2: - case MKK12_MKKA: - case MKK12_FCCA: - case MKK12_MKKA1: - case MKK12_MKKC: - case MKK12_MKKA2: - case MKK3_MKKA: - case MKK3_MKKA1: - case MKK3_FCCA: - case MKK4_MKKA: - case MKK4_MKKA1: - case MKK4_FCCA: - case MKK9_MKKA: - case MKK10_MKKA: - case MKK1: - case MKK2: - case MKK3: - case MKK4: - case MKK5: - case MKK6: - case MKK7: - case MKK8: - case MKK9: - case MKK10: - case MKK11: - case MKK12: - case MKKA: - case MKKC: - return 0x40;//WG_JAPAN DOT11_REG_DOMAIN_MKK Japan - break; - - default: - break; - } - return 0xFF;// Didn't input RegDmn by mean to distinguish by customer + zmw_get_wlan_dev(dev); + + switch (wd->regulationTable.regionCode) { + case NO_ENUMRD: + return 0; + break; + case FCC1_FCCA: + case FCC1_WORLD: + case FCC4_FCCA: + case FCC5_FCCA: + case FCC2_WORLD: + case FCC2_ETSIC: + case FCC3_FCCA: + case FCC3_WORLD: + case FCC1: + case FCC2: + case FCC3: + case FCC4: + case FCC5: + case FCCA: + return 0x10;/* WG_AMERICAS DOT11_REG_DOMAIN_FCC United States */ + break; + + case FCC2_FCCA: + return 0x20;/* DOT11_REG_DOMAIN_DOC Canada */ + break; + + case ETSI1_WORLD: + case ETSI3_ETSIA: + case ETSI2_WORLD: + case ETSI3_WORLD: + case ETSI4_WORLD: + case ETSI4_ETSIC: + case ETSI5_WORLD: + case ETSI6_WORLD: + case ETSI_RESERVED: + case ETSI1: + case ETSI2: + case ETSI3: + case ETSI4: + case ETSI5: + case ETSI6: + case ETSIA: + case ETSIB: + case ETSIC: + return 0x30;/* WG_EMEA DOT11_REG_DOMAIN_ETSI Most of Europe */ + break; + + case MKK1_MKKA: + case MKK1_MKKB: + case MKK2_MKKA: + case MKK1_FCCA: + case MKK1_MKKA1: + case MKK1_MKKA2: + case MKK1_MKKC: + case MKK3_MKKB: + case MKK3_MKKA2: + case MKK3_MKKC: + case MKK4_MKKB: + case MKK4_MKKA2: + case MKK4_MKKC: + case MKK5_MKKB: + case MKK5_MKKA2: + case MKK5_MKKC: + case MKK6_MKKB: + case MKK6_MKKA2: + case MKK6_MKKC: + case MKK7_MKKB: + case MKK7_MKKA: + case MKK7_MKKC: + case MKK8_MKKB: + case MKK8_MKKA2: + case MKK8_MKKC: + case MKK6_MKKA1: + case MKK6_FCCA: + case MKK7_MKKA1: + case MKK7_FCCA: + case MKK9_FCCA: + case MKK9_MKKA1: + case MKK9_MKKC: + case MKK9_MKKA2: + case MKK10_FCCA: + case MKK10_MKKA1: + case MKK10_MKKC: + case MKK10_MKKA2: + case MKK11_MKKA: + case MKK11_FCCA: + case MKK11_MKKA1: + case MKK11_MKKC: + case MKK11_MKKA2: + case MKK12_MKKA: + case MKK12_FCCA: + case MKK12_MKKA1: + case MKK12_MKKC: + case MKK12_MKKA2: + case MKK3_MKKA: + case MKK3_MKKA1: + case MKK3_FCCA: + case MKK4_MKKA: + case MKK4_MKKA1: + case MKK4_FCCA: + case MKK9_MKKA: + case MKK10_MKKA: + case MKK1: + case MKK2: + case MKK3: + case MKK4: + case MKK5: + case MKK6: + case MKK7: + case MKK8: + case MKK9: + case MKK10: + case MKK11: + case MKK12: + case MKKA: + case MKKC: + return 0x40;/* WG_JAPAN DOT11_REG_DOMAIN_MKK Japan */ + break; + + default: + break; + } + return 0xFF; /* Didn't input RegDmn by mean to distinguish by customer */ } - -void zfHpDisableDfsChannel(zdev_t* dev, u8_t disableFlag) +void zfHpDisableDfsChannel(zdev_t *dev, u8_t disableFlag) { - struct zsHpPriv* hpPriv; + struct zsHpPriv *hpPriv; - zmw_get_wlan_dev(dev); - hpPriv=wd->hpPrivate; - hpPriv->disableDfsCh = disableFlag; - return; + zmw_get_wlan_dev(dev); + hpPriv = wd->hpPrivate; + hpPriv->disableDfsCh = disableFlag; + return; } diff --git a/drivers/staging/otus/wwrap.c b/drivers/staging/otus/wwrap.c index a74f7eea56e4..b02eb42cd796 100644 --- a/drivers/staging/otus/wwrap.c +++ b/drivers/staging/otus/wwrap.c @@ -956,7 +956,6 @@ int zfLnxCencSendMsg(struct sock *netlink_sk, u_int8_t *msg, int len) /*ÌîдÊý¾Ý±¨Ïà¹ØÐÅÏ¢*/ nlh = NLMSG_PUT(skb, 0, 0, WAI_K_MSG, size-sizeof(*nlh)); pos = NLMSG_DATA(nlh); - memset(pos, 0, len); /*´«Êäµ½Óû§¿Õ¼äµÄÊý¾Ý*/ memcpy(pos, msg, len); diff --git a/drivers/staging/poch/Kconfig b/drivers/staging/poch/Kconfig deleted file mode 100644 index b3b33b984a57..000000000000 --- a/drivers/staging/poch/Kconfig +++ /dev/null @@ -1,6 +0,0 @@ -config POCH - tristate "Redrapids Pocket Change CardBus support" - depends on PCI && UIO - default N - ---help--- - Enable support for Redrapids Pocket Change CardBus devices. diff --git a/drivers/staging/poch/Makefile b/drivers/staging/poch/Makefile deleted file mode 100644 index d2b96805cb9e..000000000000 --- a/drivers/staging/poch/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-$(CONFIG_POCH) += poch.o diff --git a/drivers/staging/poch/README b/drivers/staging/poch/README deleted file mode 100644 index ac76ff969a2f..000000000000 --- a/drivers/staging/poch/README +++ /dev/null @@ -1,136 +0,0 @@ -TODO: - - Rx block size is limited to < 2048, hardware bug? - - Group size is limited to < page size, kernel alloc/mmap API issues - - test whether Tx is transmitting data from provided buffers - - handle device unplug case - - handle temperature above threshold - - use bus address instead of physical address for DMA - - support for snapshot mode - - audit userspace interfaces - - get reserved major/minor if needed - -Sample Code: - -#include <sys/types.h> -#include <sys/stat.h> -#include <sys/mman.h> -#include <sys/ioctl.h> -#include <poll.h> -#include <stdio.h> -#include <error.h> -#include <errno.h> -#include <fcntl.h> -#include <stdint.h> - -#include <sysfs/libsysfs.h> - -#include <poch.h> - -struct pconsume { - uint32_t * offsets; - uint32_t nfetch; - uint32_t nflush; -}; - -uint32_t offsets[10]; - -void process_group(unsigned char *buf, uint32_t size) -{ - uint16_t *buf16 = (uint16_t *)buf; - - printf("RX: %p %u %04x %04x %04x %04x %04x %04x\n", buf, size, - buf16[0], buf16[1], buf16[2], buf16[3], buf16[4], buf16[5]); -} - -int main() -{ - struct sysfs_attribute *attr; - char *path; - int ret; - unsigned long mmap_size; - int fd; - unsigned char *cbuf; - - uint32_t nflush; - struct pollfd poll_fds; - int count = 0; - int i; - - path = "/sys/class/pocketchange/poch0/ch0/block_size"; - attr = sysfs_open_attribute(path); - ret = sysfs_write_attribute(attr, "256", strlen("256")); - if (ret == -1) - error(1, errno, "error writing attribute %s", path); - sysfs_close_attribute(attr); - - path = "/sys/class/pocketchange/poch0/ch0/group_size"; - attr = sysfs_open_attribute(path); - ret = sysfs_write_attribute(attr, "4096", strlen("4096")); - if (ret == -1) - error(1, errno, "error writing attribute %s", path); - sysfs_close_attribute(attr); - - path = "/sys/class/pocketchange/poch0/ch0/group_count"; - attr = sysfs_open_attribute(path); - ret = sysfs_write_attribute(attr, "64", strlen("64")); - if (ret == -1) - error(1, errno, "error writing attribute %s", path); - sysfs_close_attribute(attr); - - fd = open("/dev/ch0", O_RDWR); - if (fd == -1) - error(1, errno, "error opening device node"); - - path = "/sys/class/pocketchange/poch0/ch0/mmap_size"; - attr = sysfs_open_attribute(path); - ret = sysfs_read_attribute(attr); - if (ret == -1) - error(1, errno, "error reading attribute %s", path); - printf("%s", attr->value); - sscanf(attr->value, "%lu", &mmap_size); - sysfs_close_attribute(attr); - - cbuf = mmap(NULL, mmap_size, PROT_READ | PROT_WRITE, - MAP_PRIVATE, fd, 0); - if (cbuf == MAP_FAILED) - error(1, errno, "error mapping DMA buffers"); - - ret = ioctl(fd, POCH_IOC_TRANSFER_START, 0); - if (ret == -1) - error(1, errno, "error starting transfer"); - - nflush = 0; - while (1) { - struct pconsume consume; - - consume.offsets = offsets; - consume.nfetch = 10; - consume.nflush = nflush; - - ret = ioctl(fd, POCH_IOC_CONSUME, &consume); - if (ret == -1) - error(1, errno, "error consuming groups"); - - nflush = consume.nfetch; - - for (i = 0; i < nflush; i++) { - process_group(cbuf + consume.offsets[i], 4096); - - count++; - if (count == 1000) - break; - } - - if (count == 1000) - break; - } - - ret = ioctl(fd, POCH_IOC_TRANSFER_STOP, 0); - if (ret == -1) - error(1, errno, "error starting transfer"); - - return 0; -} - -Please send patches to Greg Kroah-Hartman <greg@kroah.com> and -Vijay Kumar <vijaykumar@bravegnu.org> and Jaya Kumar <jayakumar.lkml@gmail.com> diff --git a/drivers/staging/poch/poch.c b/drivers/staging/poch/poch.c deleted file mode 100644 index f940a34c1a0c..000000000000 --- a/drivers/staging/poch/poch.c +++ /dev/null @@ -1,1443 +0,0 @@ -/* - * User-space DMA and UIO based Redrapids Pocket Change CardBus driver - * - * Copyright 2008 Vijay Kumar <vijaykumar@bravegnu.org> - * - * Licensed under GPL version 2 only. - */ - -#include <linux/device.h> -#include <linux/module.h> -#include <linux/pci.h> -#include <linux/uio_driver.h> -#include <linux/spinlock.h> -#include <linux/cdev.h> -#include <linux/delay.h> -#include <linux/sysfs.h> -#include <linux/poll.h> -#include <linux/idr.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/ioctl.h> -#include <linux/io.h> -#include <linux/sched.h> -#include <linux/slab.h> - -#include "poch.h" - -#include <asm/cacheflush.h> - -#ifndef PCI_VENDOR_ID_RRAPIDS -#define PCI_VENDOR_ID_RRAPIDS 0x17D2 -#endif - -#ifndef PCI_DEVICE_ID_RRAPIDS_POCKET_CHANGE -#define PCI_DEVICE_ID_RRAPIDS_POCKET_CHANGE 0x0351 -#endif - -#define POCH_NCHANNELS 2 - -#define MAX_POCH_CARDS 8 -#define MAX_POCH_DEVICES (MAX_POCH_CARDS * POCH_NCHANNELS) - -#define DRV_NAME "poch" -#define PFX DRV_NAME ": " - -/* - * BAR0 Bridge Register Definitions - */ - -#define BRIDGE_REV_REG 0x0 -#define BRIDGE_INT_MASK_REG 0x4 -#define BRIDGE_INT_STAT_REG 0x8 - -#define BRIDGE_INT_ACTIVE (0x1 << 31) -#define BRIDGE_INT_FPGA (0x1 << 2) -#define BRIDGE_INT_TEMP_FAIL (0x1 << 1) -#define BRIDGE_INT_TEMP_WARN (0x1 << 0) - -#define BRIDGE_FPGA_RESET_REG 0xC - -#define BRIDGE_CARD_POWER_REG 0x10 -#define BRIDGE_CARD_POWER_EN (0x1 << 0) -#define BRIDGE_CARD_POWER_PROG_DONE (0x1 << 31) - -#define BRIDGE_JTAG_REG 0x14 -#define BRIDGE_DMA_GO_REG 0x18 -#define BRIDGE_STAT_0_REG 0x1C -#define BRIDGE_STAT_1_REG 0x20 -#define BRIDGE_STAT_2_REG 0x24 -#define BRIDGE_STAT_3_REG 0x28 -#define BRIDGE_TEMP_STAT_REG 0x2C -#define BRIDGE_TEMP_THRESH_REG 0x30 -#define BRIDGE_EEPROM_REVSEL_REG 0x34 -#define BRIDGE_CIS_STRUCT_REG 0x100 -#define BRIDGE_BOARDREV_REG 0x124 - -/* - * BAR1 FPGA Register Definitions - */ - -#define FPGA_IFACE_REV_REG 0x0 -#define FPGA_RX_BLOCK_SIZE_REG 0x8 -#define FPGA_TX_BLOCK_SIZE_REG 0xC -#define FPGA_RX_BLOCK_COUNT_REG 0x10 -#define FPGA_TX_BLOCK_COUNT_REG 0x14 -#define FPGA_RX_CURR_DMA_BLOCK_REG 0x18 -#define FPGA_TX_CURR_DMA_BLOCK_REG 0x1C -#define FPGA_RX_GROUP_COUNT_REG 0x20 -#define FPGA_TX_GROUP_COUNT_REG 0x24 -#define FPGA_RX_CURR_GROUP_REG 0x28 -#define FPGA_TX_CURR_GROUP_REG 0x2C -#define FPGA_RX_CURR_PCI_REG 0x38 -#define FPGA_TX_CURR_PCI_REG 0x3C -#define FPGA_RX_GROUP0_START_REG 0x40 -#define FPGA_TX_GROUP0_START_REG 0xC0 -#define FPGA_DMA_DESC_1_REG 0x140 -#define FPGA_DMA_DESC_2_REG 0x144 -#define FPGA_DMA_DESC_3_REG 0x148 -#define FPGA_DMA_DESC_4_REG 0x14C - -#define FPGA_DMA_INT_STAT_REG 0x150 -#define FPGA_DMA_INT_MASK_REG 0x154 -#define FPGA_DMA_INT_RX (1 << 0) -#define FPGA_DMA_INT_TX (1 << 1) - -#define FPGA_RX_GROUPS_PER_INT_REG 0x158 -#define FPGA_TX_GROUPS_PER_INT_REG 0x15C -#define FPGA_DMA_ADR_PAGE_REG 0x160 -#define FPGA_FPGA_REV_REG 0x200 - -#define FPGA_ADC_CLOCK_CTL_REG 0x204 -#define FPGA_ADC_CLOCK_CTL_OSC_EN (0x1 << 3) -#define FPGA_ADC_CLOCK_LOCAL_CLK (0x1 | FPGA_ADC_CLOCK_CTL_OSC_EN) -#define FPGA_ADC_CLOCK_EXT_SAMP_CLK 0X0 - -#define FPGA_ADC_DAC_EN_REG 0x208 -#define FPGA_ADC_DAC_EN_DAC_OFF (0x1 << 1) -#define FPGA_ADC_DAC_EN_ADC_OFF (0x1 << 0) - -#define FPGA_INT_STAT_REG 0x20C -#define FPGA_INT_MASK_REG 0x210 -#define FPGA_INT_PLL_UNLOCKED (0x1 << 9) -#define FPGA_INT_DMA_CORE (0x1 << 8) -#define FPGA_INT_TX_FF_EMPTY (0x1 << 7) -#define FPGA_INT_RX_FF_EMPTY (0x1 << 6) -#define FPGA_INT_TX_FF_OVRFLW (0x1 << 3) -#define FPGA_INT_RX_FF_OVRFLW (0x1 << 2) -#define FPGA_INT_TX_ACQ_DONE (0x1 << 1) -#define FPGA_INT_RX_ACQ_DONE (0x1) - -#define FPGA_RX_CTL_REG 0x214 -#define FPGA_RX_CTL_FIFO_FLUSH (0x1 << 9) -#define FPGA_RX_CTL_SYNTH_DATA (0x1 << 8) -#define FPGA_RX_CTL_CONT_CAP (0x0 << 1) -#define FPGA_RX_CTL_SNAP_CAP (0x1 << 1) - -#define FPGA_RX_ARM_REG 0x21C - -#define FPGA_DOM_REG 0x224 -#define FPGA_DOM_DCM_RESET (0x1 << 5) -#define FPGA_DOM_SOFT_RESET (0x1 << 4) -#define FPGA_DOM_DUAL_M_SG_DMA (0x0) -#define FPGA_DOM_TARGET_ACCESS (0x1) - -#define FPGA_TX_CTL_REG 0x228 -#define FPGA_TX_CTL_FIFO_FLUSH (0x1 << 9) -#define FPGA_TX_CTL_OUTPUT_ZERO (0x0 << 2) -#define FPGA_TX_CTL_OUTPUT_CARDBUS (0x1 << 2) -#define FPGA_TX_CTL_OUTPUT_ADC (0x2 << 2) -#define FPGA_TX_CTL_OUTPUT_SNAPSHOT (0x3 << 2) -#define FPGA_TX_CTL_LOOPBACK (0x1 << 0) - -#define FPGA_ENDIAN_MODE_REG 0x22C -#define FPGA_RX_FIFO_COUNT_REG 0x28C -#define FPGA_TX_ENABLE_REG 0x298 -#define FPGA_TX_TRIGGER_REG 0x29C -#define FPGA_TX_DATAMEM_COUNT_REG 0x2A8 -#define FPGA_CAP_FIFO_REG 0x300 -#define FPGA_TX_SNAPSHOT_REG 0x8000 - -/* - * Channel Index Definitions - */ - -enum { - CHNO_RX_CHANNEL, - CHNO_TX_CHANNEL, -}; - -struct poch_dev; - -enum channel_dir { - CHANNEL_DIR_RX, - CHANNEL_DIR_TX, -}; - -struct poch_group_info { - struct page *pg; - dma_addr_t dma_addr; - unsigned long user_offset; -}; - -struct channel_info { - unsigned int chno; - - atomic_t sys_block_size; - atomic_t sys_group_size; - atomic_t sys_group_count; - - enum channel_dir dir; - - unsigned long block_size; - unsigned long group_size; - unsigned long group_count; - - /* Contains the DMA address and VM offset of each group. */ - struct poch_group_info *groups; - - /* Contains the header and circular buffer exported to userspace. */ - spinlock_t group_offsets_lock; - - /* Last group consumed by user space. */ - unsigned int consumed; - /* Last group indicated as 'complete' to user space. */ - unsigned int transfer; - - wait_queue_head_t wq; - - union { - unsigned int data_available; - unsigned int space_available; - }; - - void __iomem *bridge_iomem; - void __iomem *fpga_iomem; - spinlock_t *iomem_lock; - - atomic_t free; - atomic_t inited; - - /* Error counters */ - struct poch_counters counters; - spinlock_t counters_lock; - - struct device *dev; -}; - -struct poch_dev { - struct uio_info uio; - struct pci_dev *pci_dev; - unsigned int nchannels; - struct channel_info channels[POCH_NCHANNELS]; - struct cdev cdev; - - /* Counts the no. of channels that have been opened. On first - * open, the card is powered on. On last channel close, the - * card is powered off. - */ - atomic_t usage; - - void __iomem *bridge_iomem; - void __iomem *fpga_iomem; - spinlock_t iomem_lock; - - struct device *dev; -}; - -static int synth_rx; -module_param(synth_rx, bool, 0600); -MODULE_PARM_DESC(synth_rx, - "Synthesize received values using a counter. Default: No"); - -static int loopback; -module_param(loopback, bool, 0600); -MODULE_PARM_DESC(loopback, - "Enable hardware loopback of trasnmitted data. Default: No"); - -static dev_t poch_first_dev; -static struct class *poch_cls; -static DEFINE_IDR(poch_ids); - -static ssize_t store_block_size(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct channel_info *channel = dev_get_drvdata(dev); - unsigned long block_size; - - sscanf(buf, "%lu", &block_size); - atomic_set(&channel->sys_block_size, block_size); - - return count; -} -static DEVICE_ATTR(block_size, S_IWUSR|S_IWGRP, NULL, store_block_size); - -static ssize_t store_group_size(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct channel_info *channel = dev_get_drvdata(dev); - unsigned long group_size; - - sscanf(buf, "%lu", &group_size); - atomic_set(&channel->sys_group_size, group_size); - - return count; -} -static DEVICE_ATTR(group_size, S_IWUSR|S_IWGRP, NULL, store_group_size); - -static ssize_t store_group_count(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct channel_info *channel = dev_get_drvdata(dev); - unsigned long group_count; - - sscanf(buf, "%lu", &group_count); - atomic_set(&channel->sys_group_count, group_count); - - return count; -} -static DEVICE_ATTR(group_count, S_IWUSR|S_IWGRP, NULL, store_group_count); - -static ssize_t show_direction(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct channel_info *channel = dev_get_drvdata(dev); - int len; - - len = sprintf(buf, "%s\n", (channel->dir ? "tx" : "rx")); - return len; -} -static DEVICE_ATTR(dir, S_IRUSR|S_IRGRP, show_direction, NULL); - -static unsigned long npages(unsigned long bytes) -{ - if (bytes % PAGE_SIZE == 0) - return bytes / PAGE_SIZE; - else - return (bytes / PAGE_SIZE) + 1; -} - -static ssize_t show_mmap_size(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct channel_info *channel = dev_get_drvdata(dev); - int len; - unsigned long mmap_size; - unsigned long group_pages; - unsigned long total_group_pages; - - group_pages = npages(channel->group_size); - total_group_pages = group_pages * channel->group_count; - - mmap_size = total_group_pages * PAGE_SIZE; - len = sprintf(buf, "%lu\n", mmap_size); - return len; -} -static DEVICE_ATTR(mmap_size, S_IRUSR|S_IRGRP, show_mmap_size, NULL); - -static struct device_attribute *poch_class_attrs[] = { - &dev_attr_block_size, - &dev_attr_group_size, - &dev_attr_group_count, - &dev_attr_dir, - &dev_attr_mmap_size, -}; - -static void poch_channel_free_groups(struct channel_info *channel) -{ - unsigned long i; - - for (i = 0; i < channel->group_count; i++) { - struct poch_group_info *group; - unsigned int order; - - group = &channel->groups[i]; - order = get_order(channel->group_size); - if (group->pg) - __free_pages(group->pg, order); - } -} - -static int poch_channel_alloc_groups(struct channel_info *channel) -{ - unsigned long i; - unsigned long group_pages; - - group_pages = npages(channel->group_size); - - for (i = 0; i < channel->group_count; i++) { - struct poch_group_info *group; - unsigned int order; - gfp_t gfp_mask; - - group = &channel->groups[i]; - order = get_order(channel->group_size); - - /* - * __GFP_COMP is required here since we are going to - * perform non-linear mapping to userspace. For more - * information read the vm_insert_page() function - * comments. - */ - - gfp_mask = GFP_KERNEL | GFP_DMA32 | __GFP_ZERO; - group->pg = alloc_pages(gfp_mask, order); - if (!group->pg) { - poch_channel_free_groups(channel); - return -ENOMEM; - } - - /* FIXME: This is the physical address not the bus - * address! This won't work in architectures that - * have an IOMMU. Can we use pci_map_single() for - * this? - */ - group->dma_addr = page_to_pfn(group->pg) * PAGE_SIZE; - group->user_offset = (i * group_pages) * PAGE_SIZE; - - printk(KERN_INFO PFX "%ld: user_offset: 0x%lx\n", i, - group->user_offset); - } - - return 0; -} - -static int channel_latch_attr(struct channel_info *channel) -{ - channel->group_count = atomic_read(&channel->sys_group_count); - channel->group_size = atomic_read(&channel->sys_group_size); - channel->block_size = atomic_read(&channel->sys_block_size); - - if (channel->group_count == 0) { - printk(KERN_ERR PFX "invalid group count %lu", - channel->group_count); - return -EINVAL; - } - - if (channel->group_size == 0 || - channel->group_size < channel->block_size) { - printk(KERN_ERR PFX "invalid group size %lu", - channel->group_size); - return -EINVAL; - } - - if (channel->block_size == 0 || (channel->block_size % 8) != 0) { - printk(KERN_ERR PFX "invalid block size %lu", - channel->block_size); - return -EINVAL; - } - - if (channel->group_size % channel->block_size != 0) { - printk(KERN_ERR PFX - "group size should be multiple of block size"); - return -EINVAL; - } - - return 0; -} - -/* - * Configure DMA group registers - */ -static void channel_dma_init(struct channel_info *channel) -{ - void __iomem *fpga = channel->fpga_iomem; - u32 group_regs_base; - u32 group_reg; - unsigned int page; - unsigned int group_in_page; - unsigned long i; - u32 block_size_reg; - u32 block_count_reg; - u32 group_count_reg; - u32 groups_per_int_reg; - u32 curr_pci_reg; - - if (channel->chno == CHNO_RX_CHANNEL) { - group_regs_base = FPGA_RX_GROUP0_START_REG; - block_size_reg = FPGA_RX_BLOCK_SIZE_REG; - block_count_reg = FPGA_RX_BLOCK_COUNT_REG; - group_count_reg = FPGA_RX_GROUP_COUNT_REG; - groups_per_int_reg = FPGA_RX_GROUPS_PER_INT_REG; - curr_pci_reg = FPGA_RX_CURR_PCI_REG; - } else { - group_regs_base = FPGA_TX_GROUP0_START_REG; - block_size_reg = FPGA_TX_BLOCK_SIZE_REG; - block_count_reg = FPGA_TX_BLOCK_COUNT_REG; - group_count_reg = FPGA_TX_GROUP_COUNT_REG; - groups_per_int_reg = FPGA_TX_GROUPS_PER_INT_REG; - curr_pci_reg = FPGA_TX_CURR_PCI_REG; - } - - printk(KERN_WARNING "block_size, group_size, group_count\n"); - /* - * Block size is represented in no. of 64 bit transfers. - */ - iowrite32(channel->block_size / 8, fpga + block_size_reg); - iowrite32(channel->group_size / channel->block_size, - fpga + block_count_reg); - iowrite32(channel->group_count, fpga + group_count_reg); - /* FIXME: Hardcoded groups per int. Get it from sysfs? */ - iowrite32(16, fpga + groups_per_int_reg); - - /* Unlock PCI address? Not defined in the data sheet, but used - * in the reference code by Redrapids. - */ - iowrite32(0x1, fpga + curr_pci_reg); - - /* The DMA address page register is shared between the RX and - * TX channels, so acquire lock. - */ - for (i = 0; i < channel->group_count; i++) { - page = i / 32; - group_in_page = i % 32; - - group_reg = group_regs_base + (group_in_page * 4); - - spin_lock(channel->iomem_lock); - iowrite32(page, fpga + FPGA_DMA_ADR_PAGE_REG); - iowrite32(channel->groups[i].dma_addr, fpga + group_reg); - spin_unlock(channel->iomem_lock); - } - - for (i = 0; i < channel->group_count; i++) { - page = i / 32; - group_in_page = i % 32; - - group_reg = group_regs_base + (group_in_page * 4); - - spin_lock(channel->iomem_lock); - iowrite32(page, fpga + FPGA_DMA_ADR_PAGE_REG); - printk(KERN_INFO PFX "%ld: read dma_addr: 0x%x\n", i, - ioread32(fpga + group_reg)); - spin_unlock(channel->iomem_lock); - } - -} - -static void __poch_channel_clear_counters(struct channel_info *channel) -{ - channel->counters.pll_unlock = 0; - channel->counters.fifo_empty = 0; - channel->counters.fifo_overflow = 0; -} - -static int poch_channel_init(struct channel_info *channel, - struct poch_dev *poch_dev) -{ - struct pci_dev *pdev = poch_dev->pci_dev; - struct device *dev = &pdev->dev; - unsigned long alloc_size; - int ret; - - printk(KERN_WARNING "channel_latch_attr\n"); - - ret = channel_latch_attr(channel); - if (ret != 0) - goto out; - - channel->consumed = 0; - channel->transfer = 0; - - /* Allocate memory to hold group information. */ - alloc_size = channel->group_count * sizeof(struct poch_group_info); - channel->groups = kzalloc(alloc_size, GFP_KERNEL); - if (!channel->groups) { - dev_err(dev, "error allocating memory for group info\n"); - ret = -ENOMEM; - goto out; - } - - printk(KERN_WARNING "poch_channel_alloc_groups\n"); - - ret = poch_channel_alloc_groups(channel); - if (ret) { - dev_err(dev, "error allocating groups of order %d\n", - get_order(channel->group_size)); - goto out_free_group_info; - } - - channel->fpga_iomem = poch_dev->fpga_iomem; - channel->bridge_iomem = poch_dev->bridge_iomem; - channel->iomem_lock = &poch_dev->iomem_lock; - spin_lock_init(&channel->counters_lock); - - __poch_channel_clear_counters(channel); - - return 0; - - out_free_group_info: - kfree(channel->groups); - out: - return ret; -} - -static int poch_wait_fpga_prog(void __iomem *bridge) -{ - unsigned long total_wait; - const unsigned long wait_period = 100; - /* FIXME: Get the actual timeout */ - const unsigned long prog_timeo = 10000; /* 10 Seconds */ - u32 card_power; - - printk(KERN_WARNING "poch_wait_fpg_prog\n"); - - printk(KERN_INFO PFX "programming fpga ...\n"); - total_wait = 0; - while (1) { - msleep(wait_period); - total_wait += wait_period; - - card_power = ioread32(bridge + BRIDGE_CARD_POWER_REG); - if (card_power & BRIDGE_CARD_POWER_PROG_DONE) { - printk(KERN_INFO PFX "programming done\n"); - return 0; - } - if (total_wait > prog_timeo) { - printk(KERN_ERR PFX - "timed out while programming FPGA\n"); - return -EIO; - } - } -} - -static void poch_card_power_off(struct poch_dev *poch_dev) -{ - void __iomem *bridge = poch_dev->bridge_iomem; - u32 card_power; - - iowrite32(0, bridge + BRIDGE_INT_MASK_REG); - iowrite32(0, bridge + BRIDGE_DMA_GO_REG); - - card_power = ioread32(bridge + BRIDGE_CARD_POWER_REG); - iowrite32(card_power & ~BRIDGE_CARD_POWER_EN, - bridge + BRIDGE_CARD_POWER_REG); -} - -enum clk_src { - CLK_SRC_ON_BOARD, - CLK_SRC_EXTERNAL -}; - -static void poch_card_clock_on(void __iomem *fpga) -{ - /* FIXME: Get this data through sysfs? */ - enum clk_src clk_src = CLK_SRC_ON_BOARD; - - if (clk_src == CLK_SRC_ON_BOARD) { - iowrite32(FPGA_ADC_CLOCK_LOCAL_CLK | FPGA_ADC_CLOCK_CTL_OSC_EN, - fpga + FPGA_ADC_CLOCK_CTL_REG); - } else if (clk_src == CLK_SRC_EXTERNAL) { - iowrite32(FPGA_ADC_CLOCK_EXT_SAMP_CLK, - fpga + FPGA_ADC_CLOCK_CTL_REG); - } -} - -static int poch_card_power_on(struct poch_dev *poch_dev) -{ - void __iomem *bridge = poch_dev->bridge_iomem; - void __iomem *fpga = poch_dev->fpga_iomem; - - iowrite32(BRIDGE_CARD_POWER_EN, bridge + BRIDGE_CARD_POWER_REG); - - if (poch_wait_fpga_prog(bridge) != 0) { - poch_card_power_off(poch_dev); - return -EIO; - } - - poch_card_clock_on(fpga); - - /* Sync to new clock, reset state machines, set DMA mode. */ - iowrite32(FPGA_DOM_DCM_RESET | FPGA_DOM_SOFT_RESET - | FPGA_DOM_DUAL_M_SG_DMA, fpga + FPGA_DOM_REG); - - /* FIXME: The time required for sync. needs to be tuned. */ - msleep(1000); - - return 0; -} - -static void poch_channel_analog_on(struct channel_info *channel) -{ - void __iomem *fpga = channel->fpga_iomem; - u32 adc_dac_en; - - spin_lock(channel->iomem_lock); - adc_dac_en = ioread32(fpga + FPGA_ADC_DAC_EN_REG); - switch (channel->chno) { - case CHNO_RX_CHANNEL: - iowrite32(adc_dac_en & ~FPGA_ADC_DAC_EN_ADC_OFF, - fpga + FPGA_ADC_DAC_EN_REG); - break; - case CHNO_TX_CHANNEL: - iowrite32(adc_dac_en & ~FPGA_ADC_DAC_EN_DAC_OFF, - fpga + FPGA_ADC_DAC_EN_REG); - break; - } - spin_unlock(channel->iomem_lock); -} - -static int poch_open(struct inode *inode, struct file *filp) -{ - struct poch_dev *poch_dev; - struct channel_info *channel; - void __iomem *bridge; - void __iomem *fpga; - int chno; - int usage; - int ret; - - poch_dev = container_of(inode->i_cdev, struct poch_dev, cdev); - bridge = poch_dev->bridge_iomem; - fpga = poch_dev->fpga_iomem; - - chno = iminor(inode) % poch_dev->nchannels; - channel = &poch_dev->channels[chno]; - - if (!atomic_dec_and_test(&channel->free)) { - atomic_inc(&channel->free); - ret = -EBUSY; - goto out; - } - - usage = atomic_inc_return(&poch_dev->usage); - - printk(KERN_WARNING "poch_card_power_on\n"); - - if (usage == 1) { - ret = poch_card_power_on(poch_dev); - if (ret) - goto out_dec_usage; - } - - printk(KERN_INFO "CardBus Bridge Revision: %x\n", - ioread32(bridge + BRIDGE_REV_REG)); - printk(KERN_INFO "CardBus Interface Revision: %x\n", - ioread32(fpga + FPGA_IFACE_REV_REG)); - - channel->chno = chno; - filp->private_data = channel; - - printk(KERN_WARNING "poch_channel_init\n"); - - ret = poch_channel_init(channel, poch_dev); - if (ret) - goto out_power_off; - - poch_channel_analog_on(channel); - - printk(KERN_WARNING "channel_dma_init\n"); - - channel_dma_init(channel); - - printk(KERN_WARNING "poch_channel_analog_on\n"); - - if (usage == 1) { - printk(KERN_WARNING "setting up DMA\n"); - - /* Initialize DMA Controller. */ - iowrite32(FPGA_CAP_FIFO_REG, bridge + BRIDGE_STAT_2_REG); - iowrite32(FPGA_DMA_DESC_1_REG, bridge + BRIDGE_STAT_3_REG); - - ioread32(fpga + FPGA_DMA_INT_STAT_REG); - ioread32(fpga + FPGA_INT_STAT_REG); - ioread32(bridge + BRIDGE_INT_STAT_REG); - - /* Initialize Interrupts. FIXME: Enable temperature - * handling We are enabling both Tx and Rx channel - * interrupts here. Do we need to enable interrupts - * only for the current channel? Anyways we won't get - * the interrupt unless the DMA is activated. - */ - iowrite32(BRIDGE_INT_FPGA, bridge + BRIDGE_INT_MASK_REG); - iowrite32(FPGA_INT_DMA_CORE - | FPGA_INT_PLL_UNLOCKED - | FPGA_INT_TX_FF_EMPTY - | FPGA_INT_RX_FF_EMPTY - | FPGA_INT_TX_FF_OVRFLW - | FPGA_INT_RX_FF_OVRFLW, - fpga + FPGA_INT_MASK_REG); - iowrite32(FPGA_DMA_INT_RX | FPGA_DMA_INT_TX, - fpga + FPGA_DMA_INT_MASK_REG); - } - - if (channel->dir == CHANNEL_DIR_TX) { - /* Flush TX FIFO and output data from cardbus. */ - u32 ctl_val = 0; - - ctl_val |= FPGA_TX_CTL_FIFO_FLUSH; - ctl_val |= FPGA_TX_CTL_OUTPUT_CARDBUS; - if (loopback) - ctl_val |= FPGA_TX_CTL_LOOPBACK; - - iowrite32(ctl_val, fpga + FPGA_TX_CTL_REG); - } else { - /* Flush RX FIFO and output data to cardbus. */ - u32 ctl_val = FPGA_RX_CTL_CONT_CAP | FPGA_RX_CTL_FIFO_FLUSH; - if (synth_rx) - ctl_val |= FPGA_RX_CTL_SYNTH_DATA; - - iowrite32(ctl_val, fpga + FPGA_RX_CTL_REG); - } - - atomic_inc(&channel->inited); - - return 0; - - out_power_off: - if (usage == 1) - poch_card_power_off(poch_dev); - out_dec_usage: - atomic_dec(&poch_dev->usage); - atomic_inc(&channel->free); - out: - return ret; -} - -static int poch_release(struct inode *inode, struct file *filp) -{ - struct channel_info *channel = filp->private_data; - struct poch_dev *poch_dev; - int usage; - - poch_dev = container_of(inode->i_cdev, struct poch_dev, cdev); - - usage = atomic_dec_return(&poch_dev->usage); - if (usage == 0) { - printk(KERN_WARNING "poch_card_power_off\n"); - poch_card_power_off(poch_dev); - } - - atomic_dec(&channel->inited); - poch_channel_free_groups(channel); - kfree(channel->groups); - atomic_inc(&channel->free); - - return 0; -} - -/* - * Map the the group buffers, to user space. - */ -static int poch_mmap(struct file *filp, struct vm_area_struct *vma) -{ - struct channel_info *channel = filp->private_data; - - unsigned long start; - unsigned long size; - - unsigned long group_pages; - unsigned long total_group_pages; - - int pg_num; - struct page *pg; - - int i; - int ret; - - printk(KERN_WARNING "poch_mmap\n"); - - if (vma->vm_pgoff) { - printk(KERN_WARNING PFX "page offset: %lu\n", vma->vm_pgoff); - return -EINVAL; - } - - group_pages = npages(channel->group_size); - total_group_pages = group_pages * channel->group_count; - - size = vma->vm_end - vma->vm_start; - if (size != total_group_pages * PAGE_SIZE) { - printk(KERN_WARNING PFX "required %lu bytes\n", size); - return -EINVAL; - } - - start = vma->vm_start; - - for (i = 0; i < channel->group_count; i++) { - pg = channel->groups[i].pg; - for (pg_num = 0; pg_num < group_pages; pg_num++, pg++) { - printk(KERN_DEBUG PFX "%d: group %d: 0x%lx\n", - pg_num, i, start); - ret = vm_insert_page(vma, start, pg); - if (ret) { - printk(KERN_DEBUG PFX - "vm_insert 2 failed at %d\n", pg_num); - return ret; - } - start += PAGE_SIZE; - } - } - - return 0; -} - -/* - * Check whether there is some group that the user space has not - * consumed yet. When the user space consumes a group, it sets it to - * -1. Cosuming could be reading data in case of RX and filling a - * buffer in case of TX. - */ -static int poch_channel_available(struct channel_info *channel) -{ - int available = 0; - - spin_lock_irq(&channel->group_offsets_lock); - - if (channel->consumed != channel->transfer) - available = 1; - - spin_unlock_irq(&channel->group_offsets_lock); - - return available; -} - -static unsigned int poch_poll(struct file *filp, poll_table *pt) -{ - struct channel_info *channel = filp->private_data; - unsigned int ret = 0; - - poll_wait(filp, &channel->wq, pt); - - if (poch_channel_available(channel)) { - if (channel->dir == CHANNEL_DIR_RX) - ret = POLLIN | POLLRDNORM; - else - ret = POLLOUT | POLLWRNORM; - } - - return ret; -} - -static int poch_ioctl(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - struct channel_info *channel = filp->private_data; - void __iomem *fpga = channel->fpga_iomem; - void __iomem *bridge = channel->bridge_iomem; - void __user *argp = (void __user *)arg; - struct vm_area_struct *vms; - struct poch_counters counters; - int ret; - - switch (cmd) { - case POCH_IOC_TRANSFER_START: - switch (channel->chno) { - case CHNO_TX_CHANNEL: - printk(KERN_INFO PFX "ioctl: Tx start\n"); - iowrite32(0x1, fpga + FPGA_TX_TRIGGER_REG); - iowrite32(0x1, fpga + FPGA_TX_ENABLE_REG); - - /* FIXME: Does it make sense to do a DMA GO - * twice, once in Tx and once in Rx. - */ - iowrite32(0x1, bridge + BRIDGE_DMA_GO_REG); - break; - case CHNO_RX_CHANNEL: - printk(KERN_INFO PFX "ioctl: Rx start\n"); - iowrite32(0x1, fpga + FPGA_RX_ARM_REG); - iowrite32(0x1, bridge + BRIDGE_DMA_GO_REG); - break; - } - break; - case POCH_IOC_TRANSFER_STOP: - switch (channel->chno) { - case CHNO_TX_CHANNEL: - printk(KERN_INFO PFX "ioctl: Tx stop\n"); - iowrite32(0x0, fpga + FPGA_TX_ENABLE_REG); - iowrite32(0x0, fpga + FPGA_TX_TRIGGER_REG); - iowrite32(0x0, bridge + BRIDGE_DMA_GO_REG); - break; - case CHNO_RX_CHANNEL: - printk(KERN_INFO PFX "ioctl: Rx stop\n"); - iowrite32(0x0, fpga + FPGA_RX_ARM_REG); - iowrite32(0x0, bridge + BRIDGE_DMA_GO_REG); - break; - } - break; - case POCH_IOC_CONSUME: - { - int available; - int nfetch; - unsigned int from; - unsigned int count; - unsigned int i, j; - struct poch_consume consume; - struct poch_consume *uconsume; - - uconsume = argp; - ret = copy_from_user(&consume, uconsume, sizeof(consume)); - if (ret) - return ret; - - spin_lock_irq(&channel->group_offsets_lock); - - channel->consumed += consume.nflush; - channel->consumed %= channel->group_count; - - available = channel->transfer - channel->consumed; - if (available < 0) - available += channel->group_count; - - from = channel->consumed; - - spin_unlock_irq(&channel->group_offsets_lock); - - nfetch = consume.nfetch; - count = min(available, nfetch); - - for (i = 0; i < count; i++) { - j = (from + i) % channel->group_count; - ret = put_user(channel->groups[j].user_offset, - &consume.offsets[i]); - if (ret) - return -EFAULT; - } - - ret = put_user(count, &uconsume->nfetch); - if (ret) - return -EFAULT; - - break; - } - case POCH_IOC_GET_COUNTERS: - if (!access_ok(VERIFY_WRITE, argp, sizeof(struct poch_counters))) - return -EFAULT; - - spin_lock_irq(&channel->counters_lock); - counters = channel->counters; - __poch_channel_clear_counters(channel); - spin_unlock_irq(&channel->counters_lock); - - ret = copy_to_user(argp, &counters, - sizeof(struct poch_counters)); - if (ret) - return ret; - - break; - case POCH_IOC_SYNC_GROUP_FOR_USER: - case POCH_IOC_SYNC_GROUP_FOR_DEVICE: - vms = find_vma(current->mm, arg); - if (!vms) - /* Address not mapped. */ - return -EINVAL; - if (vms->vm_file != filp) - /* Address mapped from different device/file. */ - return -EINVAL; - - flush_cache_range(vms, arg, arg + channel->group_size); - break; - } - return 0; -} - -static struct file_operations poch_fops = { - .owner = THIS_MODULE, - .open = poch_open, - .release = poch_release, - .ioctl = poch_ioctl, - .poll = poch_poll, - .mmap = poch_mmap -}; - -static void poch_irq_dma(struct channel_info *channel) -{ - u32 prev_transfer; - u32 curr_transfer; - long groups_done; - unsigned long i, j; - struct poch_group_info *groups; - u32 curr_group_reg; - - if (!atomic_read(&channel->inited)) - return; - - prev_transfer = channel->transfer; - - if (channel->chno == CHNO_RX_CHANNEL) - curr_group_reg = FPGA_RX_CURR_GROUP_REG; - else - curr_group_reg = FPGA_TX_CURR_GROUP_REG; - - curr_transfer = ioread32(channel->fpga_iomem + curr_group_reg); - - groups_done = curr_transfer - prev_transfer; - /* Check wrap over, and handle it. */ - if (groups_done <= 0) - groups_done += channel->group_count; - - groups = channel->groups; - - spin_lock(&channel->group_offsets_lock); - - for (i = 0; i < groups_done; i++) { - j = (prev_transfer + i) % channel->group_count; - - channel->transfer += 1; - channel->transfer %= channel->group_count; - - if (channel->transfer == channel->consumed) { - channel->consumed += 1; - channel->consumed %= channel->group_count; - } - } - - spin_unlock(&channel->group_offsets_lock); - - wake_up_interruptible(&channel->wq); -} - -static irqreturn_t poch_irq_handler(int irq, void *p) -{ - struct poch_dev *poch_dev = p; - void __iomem *bridge = poch_dev->bridge_iomem; - void __iomem *fpga = poch_dev->fpga_iomem; - struct channel_info *channel_rx = &poch_dev->channels[CHNO_RX_CHANNEL]; - struct channel_info *channel_tx = &poch_dev->channels[CHNO_TX_CHANNEL]; - u32 bridge_stat; - u32 fpga_stat; - u32 dma_stat; - - bridge_stat = ioread32(bridge + BRIDGE_INT_STAT_REG); - fpga_stat = ioread32(fpga + FPGA_INT_STAT_REG); - dma_stat = ioread32(fpga + FPGA_DMA_INT_STAT_REG); - - ioread32(fpga + FPGA_DMA_INT_STAT_REG); - ioread32(fpga + FPGA_INT_STAT_REG); - ioread32(bridge + BRIDGE_INT_STAT_REG); - - if (bridge_stat & BRIDGE_INT_FPGA) { - if (fpga_stat & FPGA_INT_DMA_CORE) { - if (dma_stat & FPGA_DMA_INT_RX) - poch_irq_dma(channel_rx); - if (dma_stat & FPGA_DMA_INT_TX) - poch_irq_dma(channel_tx); - } - if (fpga_stat & FPGA_INT_PLL_UNLOCKED) { - channel_tx->counters.pll_unlock++; - channel_rx->counters.pll_unlock++; - if (printk_ratelimit()) - printk(KERN_WARNING PFX "PLL unlocked\n"); - } - if (fpga_stat & FPGA_INT_TX_FF_EMPTY) - channel_tx->counters.fifo_empty++; - if (fpga_stat & FPGA_INT_TX_FF_OVRFLW) - channel_tx->counters.fifo_overflow++; - if (fpga_stat & FPGA_INT_RX_FF_EMPTY) - channel_rx->counters.fifo_empty++; - if (fpga_stat & FPGA_INT_RX_FF_OVRFLW) - channel_rx->counters.fifo_overflow++; - - /* - * FIXME: These errors should be notified through the - * poll interface as POLLERR. - */ - - /* Re-enable interrupts. */ - iowrite32(BRIDGE_INT_FPGA, bridge + BRIDGE_INT_MASK_REG); - - return IRQ_HANDLED; - } - - return IRQ_NONE; -} - -static void poch_class_dev_unregister(struct poch_dev *poch_dev, int id) -{ - int i, j; - int nattrs; - struct channel_info *channel; - dev_t devno; - - if (poch_dev->dev == NULL) - return; - - for (i = 0; i < poch_dev->nchannels; i++) { - channel = &poch_dev->channels[i]; - devno = poch_first_dev + (id * poch_dev->nchannels) + i; - - if (!channel->dev) - continue; - - nattrs = sizeof(poch_class_attrs)/sizeof(poch_class_attrs[0]); - for (j = 0; j < nattrs; j++) - device_remove_file(channel->dev, poch_class_attrs[j]); - - device_unregister(channel->dev); - } - - device_unregister(poch_dev->dev); -} - -static int __devinit poch_class_dev_register(struct poch_dev *poch_dev, - int id) -{ - struct device *dev = &poch_dev->pci_dev->dev; - int i, j; - int nattrs; - int ret; - struct channel_info *channel; - dev_t devno; - - poch_dev->dev = device_create(poch_cls, &poch_dev->pci_dev->dev, - MKDEV(0, 0), NULL, "poch%d", id); - if (IS_ERR(poch_dev->dev)) { - dev_err(dev, "error creating parent class device"); - ret = PTR_ERR(poch_dev->dev); - poch_dev->dev = NULL; - return ret; - } - - for (i = 0; i < poch_dev->nchannels; i++) { - channel = &poch_dev->channels[i]; - - devno = poch_first_dev + (id * poch_dev->nchannels) + i; - channel->dev = device_create(poch_cls, poch_dev->dev, devno, - NULL, "ch%d", i); - if (IS_ERR(channel->dev)) { - dev_err(dev, "error creating channel class device"); - ret = PTR_ERR(channel->dev); - channel->dev = NULL; - poch_class_dev_unregister(poch_dev, id); - return ret; - } - - dev_set_drvdata(channel->dev, channel); - nattrs = sizeof(poch_class_attrs)/sizeof(poch_class_attrs[0]); - for (j = 0; j < nattrs; j++) { - ret = device_create_file(channel->dev, - poch_class_attrs[j]); - if (ret) { - dev_err(dev, "error creating attribute file"); - poch_class_dev_unregister(poch_dev, id); - return ret; - } - } - } - - return 0; -} - -static int __devinit poch_pci_probe(struct pci_dev *pdev, - const struct pci_device_id *pci_id) -{ - struct device *dev = &pdev->dev; - struct poch_dev *poch_dev; - struct uio_info *uio; - int ret; - int id; - int i; - - poch_dev = kzalloc(sizeof(struct poch_dev), GFP_KERNEL); - if (!poch_dev) { - dev_err(dev, "error allocating priv. data memory\n"); - return -ENOMEM; - } - - poch_dev->pci_dev = pdev; - uio = &poch_dev->uio; - - pci_set_drvdata(pdev, poch_dev); - - spin_lock_init(&poch_dev->iomem_lock); - - poch_dev->nchannels = POCH_NCHANNELS; - poch_dev->channels[CHNO_RX_CHANNEL].dir = CHANNEL_DIR_RX; - poch_dev->channels[CHNO_TX_CHANNEL].dir = CHANNEL_DIR_TX; - - for (i = 0; i < poch_dev->nchannels; i++) { - init_waitqueue_head(&poch_dev->channels[i].wq); - atomic_set(&poch_dev->channels[i].free, 1); - atomic_set(&poch_dev->channels[i].inited, 0); - } - - ret = pci_enable_device(pdev); - if (ret) { - dev_err(dev, "error enabling device\n"); - goto out_free; - } - - ret = pci_request_regions(pdev, "poch"); - if (ret) { - dev_err(dev, "error requesting resources\n"); - goto out_disable; - } - - uio->mem[0].addr = pci_resource_start(pdev, 1); - if (!uio->mem[0].addr) { - dev_err(dev, "invalid BAR1\n"); - ret = -ENODEV; - goto out_release; - } - - uio->mem[0].size = pci_resource_len(pdev, 1); - uio->mem[0].memtype = UIO_MEM_PHYS; - - uio->name = "poch"; - uio->version = "0.0.1"; - uio->irq = -1; - ret = uio_register_device(dev, uio); - if (ret) { - dev_err(dev, "error register UIO device: %d\n", ret); - goto out_release; - } - - poch_dev->bridge_iomem = ioremap(pci_resource_start(pdev, 0), - pci_resource_len(pdev, 0)); - if (poch_dev->bridge_iomem == NULL) { - dev_err(dev, "error mapping bridge (bar0) registers\n"); - ret = -ENOMEM; - goto out_uio_unreg; - } - - poch_dev->fpga_iomem = ioremap(pci_resource_start(pdev, 1), - pci_resource_len(pdev, 1)); - if (poch_dev->fpga_iomem == NULL) { - dev_err(dev, "error mapping fpga (bar1) registers\n"); - ret = -ENOMEM; - goto out_bar0_unmap; - } - - ret = request_irq(pdev->irq, poch_irq_handler, IRQF_SHARED, - dev_name(dev), poch_dev); - if (ret) { - dev_err(dev, "error requesting IRQ %u\n", pdev->irq); - ret = -ENOMEM; - goto out_bar1_unmap; - } - - if (!idr_pre_get(&poch_ids, GFP_KERNEL)) { - dev_err(dev, "error allocating memory ids\n"); - ret = -ENOMEM; - goto out_free_irq; - } - - idr_get_new(&poch_ids, poch_dev, &id); - if (id >= MAX_POCH_CARDS) { - dev_err(dev, "minors exhausted\n"); - ret = -EBUSY; - goto out_free_irq; - } - - cdev_init(&poch_dev->cdev, &poch_fops); - poch_dev->cdev.owner = THIS_MODULE; - ret = cdev_add(&poch_dev->cdev, - poch_first_dev + (id * poch_dev->nchannels), - poch_dev->nchannels); - if (ret) { - dev_err(dev, "error register character device\n"); - goto out_idr_remove; - } - - ret = poch_class_dev_register(poch_dev, id); - if (ret) - goto out_cdev_del; - - return 0; - - out_cdev_del: - cdev_del(&poch_dev->cdev); - out_idr_remove: - idr_remove(&poch_ids, id); - out_free_irq: - free_irq(pdev->irq, poch_dev); - out_bar1_unmap: - iounmap(poch_dev->fpga_iomem); - out_bar0_unmap: - iounmap(poch_dev->bridge_iomem); - out_uio_unreg: - uio_unregister_device(uio); - out_release: - pci_release_regions(pdev); - out_disable: - pci_disable_device(pdev); - out_free: - kfree(poch_dev); - return ret; -} - -/* - * FIXME: We are yet to handle the hot unplug case. - */ -static void poch_pci_remove(struct pci_dev *pdev) -{ - struct poch_dev *poch_dev = pci_get_drvdata(pdev); - struct uio_info *uio = &poch_dev->uio; - unsigned int minor = MINOR(poch_dev->cdev.dev); - unsigned int id = minor / poch_dev->nchannels; - - poch_class_dev_unregister(poch_dev, id); - cdev_del(&poch_dev->cdev); - idr_remove(&poch_ids, id); - free_irq(pdev->irq, poch_dev); - iounmap(poch_dev->fpga_iomem); - iounmap(poch_dev->bridge_iomem); - uio_unregister_device(uio); - pci_release_regions(pdev); - pci_disable_device(pdev); - pci_set_drvdata(pdev, NULL); - iounmap(uio->mem[0].internal_addr); - - kfree(poch_dev); -} - -static const struct pci_device_id poch_pci_ids[] /* __devinitconst */ = { - { PCI_DEVICE(PCI_VENDOR_ID_RRAPIDS, - PCI_DEVICE_ID_RRAPIDS_POCKET_CHANGE) }, - { 0, } -}; - -static struct pci_driver poch_pci_driver = { - .name = DRV_NAME, - .id_table = poch_pci_ids, - .probe = poch_pci_probe, - .remove = poch_pci_remove, -}; - -static int __init poch_init_module(void) -{ - int ret = 0; - - ret = alloc_chrdev_region(&poch_first_dev, 0, - MAX_POCH_DEVICES, DRV_NAME); - if (ret) { - printk(KERN_ERR PFX "error allocating device no."); - return ret; - } - - poch_cls = class_create(THIS_MODULE, "pocketchange"); - if (IS_ERR(poch_cls)) { - ret = PTR_ERR(poch_cls); - goto out_unreg_chrdev; - } - - ret = pci_register_driver(&poch_pci_driver); - if (ret) { - printk(KERN_ERR PFX "error register PCI device"); - goto out_class_destroy; - } - - return 0; - - out_class_destroy: - class_destroy(poch_cls); - - out_unreg_chrdev: - unregister_chrdev_region(poch_first_dev, MAX_POCH_DEVICES); - - return ret; -} - -static void __exit poch_exit_module(void) -{ - pci_unregister_driver(&poch_pci_driver); - class_destroy(poch_cls); - unregister_chrdev_region(poch_first_dev, MAX_POCH_DEVICES); -} - -module_init(poch_init_module); -module_exit(poch_exit_module); - -MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/poch/poch.h b/drivers/staging/poch/poch.h deleted file mode 100644 index 8b08385861fd..000000000000 --- a/drivers/staging/poch/poch.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * User-space DMA and UIO based Redrapids Pocket Change CardBus driver - * - * Copyright 2008 Vijay Kumar <vijaykumar@bravegnu.org> - * - * Part of userspace API. Should be moved to a header file in - * include/linux for final version. - * - */ - -#include <linux/types.h> - -struct poch_counters { - __u32 fifo_empty; - __u32 fifo_overflow; - __u32 pll_unlock; -}; - -struct poch_consume { - __u32 __user *offsets; - __u32 nfetch; - __u32 nflush; -}; - -#define POCH_IOC_NUM '9' - -#define POCH_IOC_TRANSFER_START _IO(POCH_IOC_NUM, 0) -#define POCH_IOC_TRANSFER_STOP _IO(POCH_IOC_NUM, 1) -#define POCH_IOC_GET_COUNTERS _IOR(POCH_IOC_NUM, 2, \ - struct poch_counters) -#define POCH_IOC_SYNC_GROUP_FOR_USER _IO(POCH_IOC_NUM, 3) -#define POCH_IOC_SYNC_GROUP_FOR_DEVICE _IO(POCH_IOC_NUM, 4) - -#define POCH_IOC_CONSUME _IOWR(POCH_IOC_NUM, 5, \ - struct poch_consume) diff --git a/drivers/staging/rt2860/common/cmm_aes.c b/drivers/staging/rt2860/common/cmm_aes.c index 250357c5cd65..1d159ff82fd2 100644 --- a/drivers/staging/rt2860/common/cmm_aes.c +++ b/drivers/staging/rt2860/common/cmm_aes.c @@ -281,7 +281,7 @@ void construct_mic_header2(unsigned char *mic_header2, mic_header2[6] = mpdu[22] & 0x0f; /* SC */ mic_header2[7] = 0x00; /* mpdu[23]; */ - if ((!qc_exists) & a4_exists) { + if ((!qc_exists) && a4_exists) { for (i = 0; i < 6; i++) mic_header2[8 + i] = mpdu[24 + i]; /* A4 */ diff --git a/drivers/staging/rt2860/pci_main_dev.c b/drivers/staging/rt2860/pci_main_dev.c index e665d862281c..321facd6b0ab 100644 --- a/drivers/staging/rt2860/pci_main_dev.c +++ b/drivers/staging/rt2860/pci_main_dev.c @@ -107,13 +107,13 @@ MODULE_VERSION(STA_DRIVER_VERSION); /* Our PCI driver structure */ /* */ static struct pci_driver rt2860_driver = { -name: "rt2860", -id_table:rt2860_pci_tbl, -probe: rt2860_probe, -remove:__devexit_p(rt2860_remove_one), +name: "rt2860", +id_table : rt2860_pci_tbl, +probe : rt2860_probe, +remove : __devexit_p(rt2860_remove_one), #ifdef CONFIG_PM -suspend:rt2860_suspend, -resume:rt2860_resume, +suspend : rt2860_suspend, +resume : rt2860_resume, #endif }; @@ -211,9 +211,9 @@ static int rt2860_resume(struct pci_dev *pci_dev) DBGPRINT(RT_DEBUG_TRACE, ("===> rt2860_resume()\n")); - if (net_dev == NULL) { + if (net_dev == NULL) DBGPRINT(RT_DEBUG_ERROR, ("net_dev == NULL!\n")); - } else + else GET_PAD_FROM_NET_DEV(pAd, net_dev); if (pAd != NULL) { @@ -281,7 +281,9 @@ static int __devinit rt2860_probe(IN struct pci_dev *pci_dev, /*PCIDevInit============================================== */ /* wake up and enable device */ - if ((rv = pci_enable_device(pci_dev)) != 0) { + rv = pci_enable_device(pci_dev); + + if (rv != 0) { DBGPRINT(RT_DEBUG_ERROR, ("Enable PCI device failed, errno=%d!\n", rv)); return rv; @@ -289,7 +291,9 @@ static int __devinit rt2860_probe(IN struct pci_dev *pci_dev, print_name = (char *)pci_name(pci_dev); - if ((rv = pci_request_regions(pci_dev, print_name)) != 0) { + rv = pci_request_regions(pci_dev, print_name); + + if (rv != 0) { DBGPRINT(RT_DEBUG_ERROR, ("Request PCI resource failed, errno=%d!\n", rv)); goto err_out; @@ -490,9 +494,8 @@ static void RTMPInitPCIeDevice(struct pci_dev *pci_dev, struct rt_rtmp_adapter * /* Support advanced power save after 2892/2790. */ /* MAC version at offset 0x1000 is 0x2872XXXX/0x2870XXXX(PCIe, USB, SDIO). */ - if ((MacCsr0 & 0xffff0000) != 0x28600000) { + if ((MacCsr0 & 0xffff0000) != 0x28600000) OPSTATUS_SET_FLAG(pAd, fOP_STATUS_PCIE_DEVICE); - } } } @@ -900,9 +903,9 @@ void RTMPPCIeLinkCtrlValueRestore(struct rt_rtmp_adapter *pAd, u8 Level) if ((Configuration != 0) && (Configuration != 0xFFFF)) { Configuration &= 0xfefc; /* If call from interface down, restore to orginial setting. */ - if (Level == RESTORE_CLOSE) { + if (Level == RESTORE_CLOSE) Configuration |= pAd->HostLnkCtrlConfiguration; - } else + else Configuration |= 0x0; PCI_REG_WIRTE_WORD(pObj->parent_pci_dev, pAd->HostLnkCtrlOffset, @@ -1100,13 +1103,13 @@ void RTMPrt3xSetPCIePowerLinkCtrl(struct rt_rtmp_adapter *pAd) /* Find PCI-to-PCI Bridge Express Capability Offset */ pos = pci_find_capability(pObj->parent_pci_dev, PCI_CAP_ID_EXP); - if (pos != 0) { + if (pos != 0) pAd->HostLnkCtrlOffset = pos + PCI_EXP_LNKCTL; - } + /* If configurared to turn on L1. */ HostConfiguration = 0; if (pAd->StaCfg.PSControl.field.rt30xxForceASPMTest == 1) { - DBGPRINT(RT_DEBUG_TRACE, ("Enter,PSM : Force ASPM \n")); + DBGPRINT(RT_DEBUG_TRACE, ("Enter,PSM : Force ASPM\n")); /* Skip non-exist deice right away */ if ((pAd->HostLnkCtrlOffset != 0)) { diff --git a/drivers/staging/rt2860/sta/assoc.c b/drivers/staging/rt2860/sta/assoc.c index 7055f229e511..6e85d5e6554b 100644 --- a/drivers/staging/rt2860/sta/assoc.c +++ b/drivers/staging/rt2860/sta/assoc.c @@ -1596,7 +1596,6 @@ BOOLEAN StaAddMacTableEntry(struct rt_rtmp_adapter *pAd, union iwreq_data wrqu; wext_notify_event_assoc(pAd); - memset(wrqu.ap_addr.sa_data, 0, MAC_ADDR_LEN); memcpy(wrqu.ap_addr.sa_data, pAd->MlmeAux.Bssid, MAC_ADDR_LEN); wireless_send_event(pAd->net_dev, SIOCGIWAP, &wrqu, NULL); diff --git a/drivers/staging/rt2860/sta_ioctl.c b/drivers/staging/rt2860/sta_ioctl.c index de4b6277baee..112da7a6c417 100644 --- a/drivers/staging/rt2860/sta_ioctl.c +++ b/drivers/staging/rt2860/sta_ioctl.c @@ -608,7 +608,6 @@ int rt_ioctl_siwap(struct net_device *dev, /* Prevent to connect AP again in STAMlmePeriodicExec */ pAdapter->MlmeAux.AutoReconnectSsidLen = 32; - memset(Bssid, 0, MAC_ADDR_LEN); memcpy(Bssid, ap_addr->sa_data, MAC_ADDR_LEN); MlmeEnqueue(pAdapter, MLME_CNTL_STATE_MACHINE, @@ -1047,8 +1046,7 @@ int rt_ioctl_giwscan(struct net_device *dev, if (tmpRate == 0x6c && pAdapter->ScanTab.BssEntry[i].HtCapabilityLen > 0) { - int rate_count = - sizeof(ralinkrate) / sizeof(__s32); + int rate_count = ARRAY_SIZE(ralinkrate); struct rt_ht_cap_info capInfo = pAdapter->ScanTab.BssEntry[i].HtCapability. HtCapInfo; @@ -1061,10 +1059,11 @@ int rt_ioctl_giwscan(struct net_device *dev, int rate_index = 12 + ((u8)capInfo.ChannelWidth * 24) + ((u8)shortGI * 48) + ((u8)maxMCS); + if (rate_index < 0) rate_index = 0; - if (rate_index > rate_count) - rate_index = rate_count; + if (rate_index >= rate_count) + rate_index = rate_count - 1; iwe.u.bitrate.value = ralinkrate[rate_index] * 500000; } @@ -2338,7 +2337,7 @@ int rt_ioctl_giwrate(struct net_device *dev, */ GET_PAD_FROM_NET_DEV(pAd, dev); - rate_count = sizeof(ralinkrate) / sizeof(__s32); + rate_count = ARRAY_SIZE(ralinkrate); /*check if the interface is down */ if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) { DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n")); @@ -2369,8 +2368,8 @@ int rt_ioctl_giwrate(struct net_device *dev, if (rate_index < 0) rate_index = 0; - if (rate_index > rate_count) - rate_index = rate_count; + if (rate_index >= rate_count) + rate_index = rate_count - 1; wrqu->bitrate.value = ralinkrate[rate_index] * 500000; wrqu->bitrate.disabled = 0; diff --git a/drivers/staging/rt2870/common/rtusb_bulk.c b/drivers/staging/rt2870/common/rtusb_bulk.c index 379780c72b3c..625b872eccc6 100644 --- a/drivers/staging/rt2870/common/rtusb_bulk.c +++ b/drivers/staging/rt2870/common/rtusb_bulk.c @@ -172,11 +172,11 @@ void RTUSBInitRxDesc(struct rt_rtmp_adapter *pAd, struct rt_rx_context *pRxConte */ #define BULK_OUT_LOCK(pLock, IrqFlags) \ - if(1 /*!(in_interrupt() & 0xffff0000)*/) \ + if (1 /*!(in_interrupt() & 0xffff0000)*/) \ RTMP_IRQ_LOCK((pLock), IrqFlags); #define BULK_OUT_UNLOCK(pLock, IrqFlags) \ - if(1 /*!(in_interrupt() & 0xffff0000)*/) \ + if (1 /*!(in_interrupt() & 0xffff0000)*/) \ RTMP_IRQ_UNLOCK((pLock), IrqFlags); void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd, @@ -187,7 +187,7 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd, PURB pUrb; int ret = 0; struct rt_txinfo *pTxInfo, *pLastTxInfo = NULL; - struct rt_txwi * pTxWI; + struct rt_txwi *pTxWI; unsigned long TmpBulkEndPos, ThisBulkSize; unsigned long IrqFlags = 0, IrqFlags2 = 0; u8 *pWirelessPkt, *pAppendant; @@ -273,9 +273,9 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd, } do { - pTxInfo = (struct rt_txinfo *)& pWirelessPkt[TmpBulkEndPos]; + pTxInfo = (struct rt_txinfo *)&pWirelessPkt[TmpBulkEndPos]; pTxWI = - (struct rt_txwi *) & pWirelessPkt[TmpBulkEndPos + TXINFO_SIZE]; + (struct rt_txwi *)&pWirelessPkt[TmpBulkEndPos + TXINFO_SIZE]; if (pAd->bForcePrintTX == TRUE) DBGPRINT(RT_DEBUG_TRACE, @@ -310,7 +310,7 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd, pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos; break; - } else if (((pAd->BulkOutMaxPacketSize < 512) && ((ThisBulkSize & 0xfffff800) != 0)) /*|| ( (ThisBulkSize != 0) && (pTxWI->AMPDU == 0)) */ ) { /* For USB 1.1 or peer which didn't support AMPDU, limit the BulkOut size. */ + } else if (((pAd->BulkOutMaxPacketSize < 512) && ((ThisBulkSize & 0xfffff800) != 0)) /*|| ( (ThisBulkSize != 0) && (pTxWI->AMPDU == 0)) */) { /* For USB 1.1 or peer which didn't support AMPDU, limit the BulkOut size. */ /* For performence in b/g mode, now just check for USB 1.1 and didn't care about the APMDU or not! 2008/06/04. */ pHTTXContext->ENextBulkOutPosition = TmpBulkEndPos; @@ -326,7 +326,7 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd, if (pTxInfo->QSEL != FIFO_EDCA) { DBGPRINT(RT_DEBUG_ERROR, ("%s(): ====> pTxInfo->QueueSel(%d)!= FIFO_EDCA!!!!\n", - __FUNCTION__, pTxInfo->QSEL)); + __func__, pTxInfo->QSEL)); DBGPRINT(RT_DEBUG_ERROR, ("\tCWPos=%ld, NBPos=%ld, ENBPos=%ld, bCopy=%d!\n", pHTTXContext->CurWritePosition, @@ -334,7 +334,7 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd, pHTTXContext->ENextBulkOutPosition, pHTTXContext->bCopySavePad)); hex_dump("Wrong QSel Pkt:", - (u8 *)& pWirelessPkt[TmpBulkEndPos], + (u8 *)&pWirelessPkt[TmpBulkEndPos], (pHTTXContext->CurWritePosition - pHTTXContext->NextBulkOutPosition)); } @@ -401,9 +401,8 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd, } while (TRUE); /* adjust the pTxInfo->USBDMANextVLD value of last pTxInfo. */ - if (pLastTxInfo) { + if (pLastTxInfo) pLastTxInfo->USBDMANextVLD = 0; - } /* We need to copy SavedPad when following condition matched! @@ -949,9 +948,8 @@ void RTUSBKickBulkOut(struct rt_rtmp_adapter *pAd) if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NEED_STOP_TX) ) { /* 2. PS-Poll frame is next */ - if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_PSPOLL)) { + if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_PSPOLL)) RTUSBBulkOutPsPoll(pAd); - } /* 5. Mlme frame is next */ else if ((RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME)) || (pAd->MgmtRing.TxSwFreeIdx < MGMT_RING_SIZE)) { @@ -1014,9 +1012,8 @@ void RTUSBKickBulkOut(struct rt_rtmp_adapter *pAd) } } /* 8. No data avaliable */ - else { - - } + else + ; } } diff --git a/drivers/staging/rt2870/common/rtusb_data.c b/drivers/staging/rt2870/common/rtusb_data.c index 4583764c78d2..69368862217c 100644 --- a/drivers/staging/rt2870/common/rtusb_data.c +++ b/drivers/staging/rt2870/common/rtusb_data.c @@ -124,7 +124,7 @@ int RTUSBFreeDescriptorRequest(struct rt_rtmp_adapter *pAd, } RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); - return (Status); + return Status; } int RTUSBFreeDescriptorRelease(struct rt_rtmp_adapter *pAd, @@ -138,7 +138,7 @@ int RTUSBFreeDescriptorRelease(struct rt_rtmp_adapter *pAd, pHTTXContext->bCurWriting = FALSE; RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); - return (NDIS_STATUS_SUCCESS); + return NDIS_STATUS_SUCCESS; } BOOLEAN RTUSBNeedQueueBackForAgg(struct rt_rtmp_adapter *pAd, u8 BulkOutPipeId) @@ -151,7 +151,7 @@ BOOLEAN RTUSBNeedQueueBackForAgg(struct rt_rtmp_adapter *pAd, u8 BulkOutPipeId) RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); if ((pHTTXContext->IRPPending == - TRUE) /*&& (pAd->TxSwQueue[BulkOutPipeId].Number == 0) */ ) { + TRUE) /*&& (pAd->TxSwQueue[BulkOutPipeId].Number == 0) */) { if ((pHTTXContext->CurWritePosition < pHTTXContext->ENextBulkOutPosition) && @@ -201,7 +201,7 @@ void RTUSBRejectPendingPackets(struct rt_rtmp_adapter *pAd) for (Index = 0; Index < 4; Index++) { NdisAcquireSpinLock(&pAd->TxSwQueueLock[Index]); while (pAd->TxSwQueue[Index].Head != NULL) { - pQueue = (struct rt_queue_header *)& (pAd->TxSwQueue[Index]); + pQueue = (struct rt_queue_header *)&(pAd->TxSwQueue[Index]); pEntry = RemoveHeadQueue(pQueue); pPacket = QUEUE_ENTRY_TO_PACKET(pEntry); RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE); diff --git a/drivers/staging/rt2870/common/rtusb_io.c b/drivers/staging/rt2870/common/rtusb_io.c index cf0d2f5dbc6c..cde38fe7e2e5 100644 --- a/drivers/staging/rt2870/common/rtusb_io.c +++ b/drivers/staging/rt2870/common/rtusb_io.c @@ -24,7 +24,7 @@ * * ************************************************************************* - Module Name: + Module Name: rtusb_io.c Abstract: @@ -400,8 +400,7 @@ int RTUSBWriteBBPRegister(struct rt_rtmp_adapter *pAd, ("RTUSBWriteBBPRegister(BBP_CSR_CFG):retry count=%d!\n", i)); i++; - } - while ((i < RETRY_LIMIT) + } while ((i < RETRY_LIMIT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))); if ((i == RETRY_LIMIT) @@ -455,8 +454,7 @@ int RTUSBWriteRFRegister(struct rt_rtmp_adapter *pAd, u32 Value) ("RTUSBWriteRFRegister(RF_CSR_CFG0):retry count=%d!\n", i)); i++; - } - while ((i < RETRY_LIMIT) + } while ((i < RETRY_LIMIT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))); if ((i == RETRY_LIMIT) @@ -652,11 +650,11 @@ int RTUSBEnqueueCmdFromNdis(struct rt_rtmp_adapter *pAd, } else #endif - return (NDIS_STATUS_RESOURCES); + return NDIS_STATUS_RESOURCES; status = os_alloc_mem(pAd, (u8 **) (&cmdqelmt), sizeof(struct rt_cmdqelmt)); if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt == NULL)) - return (NDIS_STATUS_RESOURCES); + return NDIS_STATUS_RESOURCES; cmdqelmt->buffer = NULL; if (pInformationBuffer != NULL) { @@ -666,7 +664,7 @@ int RTUSBEnqueueCmdFromNdis(struct rt_rtmp_adapter *pAd, if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt->buffer == NULL)) { kfree(cmdqelmt); - return (NDIS_STATUS_RESOURCES); + return NDIS_STATUS_RESOURCES; } else { NdisMoveMemory(cmdqelmt->buffer, pInformationBuffer, InformationBufferLength); @@ -698,7 +696,7 @@ int RTUSBEnqueueCmdFromNdis(struct rt_rtmp_adapter *pAd, } else RTUSBCMDUp(pAd); - return (NDIS_STATUS_SUCCESS); + return NDIS_STATUS_SUCCESS; } /* @@ -726,7 +724,7 @@ int RTUSBEnqueueInternalCmd(struct rt_rtmp_adapter *pAd, status = os_alloc_mem(pAd, (u8 **) & cmdqelmt, sizeof(struct rt_cmdqelmt)); if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt == NULL)) - return (NDIS_STATUS_RESOURCES); + return NDIS_STATUS_RESOURCES; NdisZeroMemory(cmdqelmt, sizeof(struct rt_cmdqelmt)); if (InformationBufferLength > 0) { @@ -736,7 +734,7 @@ int RTUSBEnqueueInternalCmd(struct rt_rtmp_adapter *pAd, if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt->buffer == NULL)) { os_free_mem(pAd, cmdqelmt); - return (NDIS_STATUS_RESOURCES); + return NDIS_STATUS_RESOURCES; } else { NdisMoveMemory(cmdqelmt->buffer, pInformationBuffer, InformationBufferLength); @@ -767,7 +765,7 @@ int RTUSBEnqueueInternalCmd(struct rt_rtmp_adapter *pAd, } else RTUSBCMDUp(pAd); } - return (NDIS_STATUS_SUCCESS); + return NDIS_STATUS_SUCCESS; } /* @@ -1071,7 +1069,7 @@ void CMDHandler(struct rt_rtmp_adapter *pAd) TXRXQ_PCNT, &MACValue); if ((MACValue & 0xf00000 - /*0x800000 */ ) == 0) + /*0x800000 */) == 0) break; Index++; RTMPusecDelay(10000); @@ -1406,15 +1404,13 @@ void CMDHandler(struct rt_rtmp_adapter *pAd) /* All transfers must be aborted or cancelled before attempting to reset the pipe. */ { u32 MACValue; - { /*while ((atomic_read(&pAd->PendingRx) > 0) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))) */ if ((pAd->PendingRx > 0) && (!RTMP_TEST_FLAG (pAd, - fRTMP_ADAPTER_NIC_NOT_EXIST))) - { + fRTMP_ADAPTER_NIC_NOT_EXIST))) { DBGPRINT_RAW (RT_DEBUG_ERROR, ("BulkIn IRP Pending!!!\n")); @@ -1424,7 +1420,6 @@ void CMDHandler(struct rt_rtmp_adapter *pAd) pAd->PendingRx = 0; } } - /* Wait 10ms before reading register. */ RTMPusecDelay(10000); ntStatus = diff --git a/drivers/staging/rtl8192su/Kconfig b/drivers/staging/rtl8192su/Kconfig index b72a96206f58..b422ea1ecf9c 100644 --- a/drivers/staging/rtl8192su/Kconfig +++ b/drivers/staging/rtl8192su/Kconfig @@ -3,5 +3,6 @@ config RTL8192SU depends on PCI && WLAN && USB select WIRELESS_EXT select WEXT_PRIV + select EEPROM_93CX6 default N ---help--- diff --git a/drivers/staging/rtl8192su/Makefile b/drivers/staging/rtl8192su/Makefile index c8b4332d108c..9374a0179e5b 100644 --- a/drivers/staging/rtl8192su/Makefile +++ b/drivers/staging/rtl8192su/Makefile @@ -9,7 +9,6 @@ EXTRA_CFLAGS += -DTHOMAS_BEACON #EXTRA_CFLAGS += -DMUTIPLE_BULK_OUT r8192s_usb-objs := \ - r8180_93cx6.o \ r8192U_wx.o \ r8192S_phy.o \ r8192S_rtl6052.o \ diff --git a/drivers/staging/rtl8192su/r8180_93cx6.c b/drivers/staging/rtl8192su/r8180_93cx6.c deleted file mode 100644 index 8878cfeb0fbb..000000000000 --- a/drivers/staging/rtl8192su/r8180_93cx6.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - This files contains card eeprom (93c46 or 93c56) programming routines, - memory is addressed by 16 bits words. - - This is part of rtl8180 OpenSource driver. - Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it> - Released under the terms of GPL (General Public Licence) - - Parts of this driver are based on the GPL part of the - official realtek driver. - - Parts of this driver are based on the rtl8180 driver skeleton - from Patric Schenke & Andres Salomon. - - Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver. - - We want to tanks the Authors of those projects and the Ndiswrapper - project Authors. -*/ - -#include "r8180_93cx6.h" - -void eprom_cs(struct net_device *dev, short bit) -{ - if(bit) - write_nic_byte_E(dev, EPROM_CMD, - (1<<EPROM_CS_SHIFT) | \ - read_nic_byte_E(dev, EPROM_CMD)); //enable EPROM - else - write_nic_byte_E(dev, EPROM_CMD, read_nic_byte_E(dev, EPROM_CMD)\ - &~(1<<EPROM_CS_SHIFT)); //disable EPROM - - force_pci_posting(dev); - udelay(EPROM_DELAY); -} - - -void eprom_ck_cycle(struct net_device *dev) -{ - write_nic_byte_E(dev, EPROM_CMD, - (1<<EPROM_CK_SHIFT) | read_nic_byte_E(dev,EPROM_CMD)); - force_pci_posting(dev); - udelay(EPROM_DELAY); - write_nic_byte_E(dev, EPROM_CMD, - read_nic_byte_E(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT)); - force_pci_posting(dev); - udelay(EPROM_DELAY); -} - - -void eprom_w(struct net_device *dev,short bit) -{ - if(bit) - write_nic_byte_E(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \ - read_nic_byte_E(dev,EPROM_CMD)); - else - write_nic_byte_E(dev, EPROM_CMD, read_nic_byte_E(dev,EPROM_CMD)\ - &~(1<<EPROM_W_SHIFT)); - - force_pci_posting(dev); - udelay(EPROM_DELAY); -} - - -short eprom_r(struct net_device *dev) -{ - short bit; - - bit=(read_nic_byte_E(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) ); - udelay(EPROM_DELAY); - - if(bit) return 1; - return 0; -} - - -void eprom_send_bits_string(struct net_device *dev, short b[], int len) -{ - int i; - - for(i=0; i<len; i++){ - eprom_w(dev, b[i]); - eprom_ck_cycle(dev); - } -} - - -u32 eprom_read(struct net_device *dev, u32 addr) -{ - struct r8192_priv *priv = ieee80211_priv(dev); - short read_cmd[]={1,1,0}; - short addr_str[8]; - int i; - int addr_len; - u32 ret; - - ret=0; - //enable EPROM programming - write_nic_byte_E(dev, EPROM_CMD, - (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT)); - force_pci_posting(dev); - udelay(EPROM_DELAY); - - if (priv->epromtype==EPROM_93c56){ - addr_str[7]=addr & 1; - addr_str[6]=addr & (1<<1); - addr_str[5]=addr & (1<<2); - addr_str[4]=addr & (1<<3); - addr_str[3]=addr & (1<<4); - addr_str[2]=addr & (1<<5); - addr_str[1]=addr & (1<<6); - addr_str[0]=addr & (1<<7); - addr_len=8; - }else{ - addr_str[5]=addr & 1; - addr_str[4]=addr & (1<<1); - addr_str[3]=addr & (1<<2); - addr_str[2]=addr & (1<<3); - addr_str[1]=addr & (1<<4); - addr_str[0]=addr & (1<<5); - addr_len=6; - } - eprom_cs(dev, 1); - eprom_ck_cycle(dev); - eprom_send_bits_string(dev, read_cmd, 3); - eprom_send_bits_string(dev, addr_str, addr_len); - - //keep chip pin D to low state while reading. - //I'm unsure if it is necessary, but anyway shouldn't hurt - eprom_w(dev, 0); - - for(i=0;i<16;i++){ - //eeprom needs a clk cycle between writing opcode&adr - //and reading data. (eeprom outs a dummy 0) - eprom_ck_cycle(dev); - ret |= (eprom_r(dev)<<(15-i)); - } - - eprom_cs(dev, 0); - eprom_ck_cycle(dev); - - //disable EPROM programming - write_nic_byte_E(dev, EPROM_CMD, - (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT)); - return ret; -} diff --git a/drivers/staging/rtl8192su/r8180_93cx6.h b/drivers/staging/rtl8192su/r8180_93cx6.h deleted file mode 100644 index 0309800255cf..000000000000 --- a/drivers/staging/rtl8192su/r8180_93cx6.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - This is part of rtl8187 OpenSource driver - Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it> - Released under the terms of GPL (General Public Licence) - - Parts of this driver are based on the GPL part of the official realtek driver - Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon - Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver - - We want to tanks the Authors of such projects and the Ndiswrapper project Authors. -*/ - -/*This files contains card eeprom (93c46 or 93c56) programming routines*/ -/*memory is addressed by WORDS*/ - -#include "r8192U.h" -#include "r8192S_hw.h" - -#define EPROM_DELAY 10 - -#define EPROM_ANAPARAM_ADDRLWORD 0xd -#define EPROM_ANAPARAM_ADDRHWORD 0xe - -#define EPROM_RFCHIPID 0x6 -#define EPROM_TXPW_BASE 0x05 -#define EPROM_RFCHIPID_RTL8225U 5 -#define EPROM_RF_PARAM 0x4 -#define EPROM_CONFIG2 0xc - -#define EPROM_VERSION 0x1E -#define MAC_ADR 0x7 - -#define CIS 0x18 - -#define EPROM_TXPW0 0x16 -#define EPROM_TXPW2 0x1b -#define EPROM_TXPW1 0x3d - - -u32 eprom_read(struct net_device *dev,u32 addr); //reads a 16 bits word diff --git a/drivers/staging/rtl8192su/r8192U.h b/drivers/staging/rtl8192su/r8192U.h index ba87623f32ee..830625253293 100644 --- a/drivers/staging/rtl8192su/r8192U.h +++ b/drivers/staging/rtl8192su/r8192U.h @@ -44,6 +44,12 @@ #include "r8192S_firmware.h" +/* EEPROM defs for use with linux/eeprom_93cx6.h */ +#define RTL819X_EEPROM_CMD_READ (1 << 0) +#define RTL819X_EEPROM_CMD_WRITE (1 << 1) +#define RTL819X_EEPROM_CMD_CK (1 << 2) +#define RTL819X_EEPROM_CMD_CS (1 << 3) + //#define RTL8192U #define RTL819xU_MODULE_NAME "rtl819xU" //added for HW security, john.0629 diff --git a/drivers/staging/rtl8192su/r8192U_core.c b/drivers/staging/rtl8192su/r8192U_core.c index fcdb9e4b74d4..22386ad0a0cb 100644 --- a/drivers/staging/rtl8192su/r8192U_core.c +++ b/drivers/staging/rtl8192su/r8192U_core.c @@ -26,6 +26,7 @@ #include <linux/vmalloc.h> #include <linux/slab.h> +#include <linux/eeprom_93cx6.h> #undef LOOP_TEST #undef DUMP_RX @@ -54,7 +55,6 @@ #include <asm/uaccess.h> #include "r8192U.h" -#include "r8180_93cx6.h" /* Card EEPROM */ #include "r8192U_wx.h" #include "r8192S_rtl8225.h" @@ -216,6 +216,36 @@ static CHANNEL_LIST ChannelPlan[] = { {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 }; +static void rtl819x_eeprom_register_read(struct eeprom_93cx6 *eeprom) +{ + struct net_device *dev = eeprom->data; + u8 reg = read_nic_byte(dev, EPROM_CMD); + + eeprom->reg_data_in = reg & RTL819X_EEPROM_CMD_WRITE; + eeprom->reg_data_out = reg & RTL819X_EEPROM_CMD_READ; + eeprom->reg_data_clock = reg & RTL819X_EEPROM_CMD_CK; + eeprom->reg_chip_select = reg & RTL819X_EEPROM_CMD_CS; +} + +static void rtl819x_eeprom_register_write(struct eeprom_93cx6 *eeprom) +{ + struct net_device *dev = eeprom->data; + u8 reg = 2 << 6; + + if (eeprom->reg_data_in) + reg |= RTL819X_EEPROM_CMD_WRITE; + if (eeprom->reg_data_out) + reg |= RTL819X_EEPROM_CMD_READ; + if (eeprom->reg_data_clock) + reg |= RTL819X_EEPROM_CMD_CK; + if (eeprom->reg_chip_select) + reg |= RTL819X_EEPROM_CMD_CS; + + write_nic_byte(dev, EPROM_CMD, reg); + read_nic_byte(dev, EPROM_CMD); + udelay(10); +} + static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv) { int i, max_chan=-1, min_chan=-1; @@ -1154,15 +1184,6 @@ void tx_timeout(struct net_device *dev) //DMESG("TXTIMEOUT"); } - -/* this is only for debug */ -void dump_eprom(struct net_device *dev) -{ - int i; - for(i=0; i<63; i++) - RT_TRACE(COMP_EPROM, "EEPROM addr %x : %x", i, eprom_read(dev,i)); -} - /* this is only for debug */ void rtl8192_dump_reg(struct net_device *dev) { @@ -3408,34 +3429,28 @@ void update_hal_variables(struct r8192_priv *priv) } } -// -// Description: -// Config HW adapter information into initial value. -// -// Assumption: -// 1. After Auto load fail(i.e, check CR9346 fail) -// -// Created by Roger, 2008.10.21. -// -void -rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev) +/* + * Description: + * Config HW adapter information into initial value. + * + * Assumption: + * 1. After Auto load fail(i.e, check CR9346 fail) + * + */ +void rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device *dev) { - struct r8192_priv *priv = ieee80211_priv(dev); - //u16 i,usValue; - //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; - u8 rf_path; // For EEPROM/EFUSE After V0.6_1117 - int i; + struct r8192_priv *priv = ieee80211_priv(dev); + u8 rf_path; /* For EEPROM/EFUSE After V0.6_1117 */ + int i; RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n"); - write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader - //PlatformStallExecution(10000); + /* Isolation signals from Loader */ + write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); mdelay(10); - write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep + write_nic_byte(dev, PMC_FSM, 0x02); /* Enable Loader Data Keep */ - //RT_ASSERT(priv->AutoloadFailFlag==TRUE, ("ReadAdapterInfo8192SEEPROM(): AutoloadFailFlag !=TRUE\n")); - - // Initialize IC Version && Channel Plan + /* Initialize IC Version && Channel Plan */ priv->eeprom_vid = 0; priv->eeprom_pid = 0; priv->card_8192_version = 0; @@ -3446,12 +3461,14 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev) RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid); RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid); - RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID); - RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID); - RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan); - RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset); - - + RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", + priv->eeprom_CustomerID); + RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", + priv->eeprom_SubCustomerID); + RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", + priv->eeprom_ChannelPlan); + RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n", + priv->bIgnoreDiffRateTxPowerOffset); priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC; RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption); @@ -3459,19 +3476,15 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev) for(i=0; i<5; i++) priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM; - //RT_PRINT_DATA(COMP_INIT|COMP_EFUSE, DBG_LOUD, ("EFUSE USB PHY Param: \n"), priv->EEPROMUsbPhyParam, 5); - { - //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15. + /* + * In this case, we randomly assign a MAC address here. + */ static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; - u8 i; - - //sMacAddr[5] = (u8)GetRandomNumber(1, 254); - for(i = 0; i < 6; i++) dev->dev_addr[i] = sMacAddr[i]; } - //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); + /* NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); */ write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]); write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]); @@ -3480,7 +3493,7 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev) dev->dev_addr); priv->EEPROMBoardType = EEPROM_Default_BoardType; - priv->rf_type = RF_1T2R; //RF_2T2R + priv->rf_type = RF_1T2R; /* RF_2T2R */ priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff; priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter; priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap; @@ -3489,13 +3502,11 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev) priv->EEPROMTSSI_B = EEPROM_Default_TSSI; priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode; - - for (rf_path = 0; rf_path < 2; rf_path++) { for (i = 0; i < 3; i++) { - // Read CCK RF A & B Tx power + /* Read CCK RF A & B Tx power */ priv->RfCckChnlAreaTxPwr[rf_path][i] = priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] = priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] = @@ -3505,22 +3516,25 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev) update_hal_variables(priv); - // - // Update remained HAL variables. - // + /* + * Update remaining HAL variables. + */ priv->TSSI_13dBm = priv->EEPROMThermalMeter *100; - priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;//new + priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff; /* new */ priv->TxPowerDiff = priv->EEPROMTxPowerDiff; - //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit0~3 - //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit4~7 - priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit12~15 - priv->ThermalMeter[0] = priv->EEPROMThermalMeter;// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2 + /* Antenna B gain offset to antenna A, bit0~3 */ + /* priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf); */ + /* Antenna C gain offset to antenna A, bit4~7 */ + /* priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4); */ + /* CrystalCap, bit12~15 */ + priv->CrystalCap = priv->EEPROMCrystalCap; + /* ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2 */ + priv->ThermalMeter[0] = priv->EEPROMThermalMeter; priv->LedStrategy = SW_LED_MODE0; init_rate_adaptive(dev); RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n"); - } // @@ -3533,26 +3547,32 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev) // // Created by Roger, 2008.10.21. // -void -rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev) +void rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev) { - struct r8192_priv *priv = ieee80211_priv(dev); - u16 i,usValue; - u8 tmpU1b, tempval; - u16 EEPROMId; - u8 hwinfo[HWSET_MAX_SIZE_92S]; - u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117 - + struct r8192_priv *priv = ieee80211_priv(dev); + u16 i; + u8 tmpU1b, tempval; + u16 EEPROMId; + u8 hwinfo[HWSET_MAX_SIZE_92S]; + u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117 + struct eeprom_93cx6 eeprom; + u16 eeprom_val; + + eeprom.data = dev; + eeprom.register_read = rtl819x_eeprom_register_read; + eeprom.register_write = rtl819x_eeprom_register_write; + if (priv->epromtype == EPROM_93c46) + eeprom.width = PCI_EEPROM_WIDTH_93C46; + else + eeprom.width = PCI_EEPROM_WIDTH_93C56; RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n"); - // - // <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V. - // 2008.11.25. - // + /* + * The following operation are prevent Efuse leakage by turn on 2.5V.. + */ tmpU1b = read_nic_byte(dev, EFUSE_TEST+3); write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80); - //PlatformStallExecution(1000); mdelay(10); write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7))); @@ -3560,21 +3580,20 @@ rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev) priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF); RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version); - switch(priv->card_8192_version) - { - case 0: - RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n"); - break; - case 1: - RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n"); - break; - case 2: - RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n"); - break; - default: - RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n"); - priv->card_8192_version = VERSION_8192S_BCUT; - break; + switch (priv->card_8192_version) { + case 0: + RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n"); + break; + case 1: + RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n"); + break; + case 2: + RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n"); + break; + default: + RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n"); + priv->card_8192_version = VERSION_8192S_BCUT; + break; } //if (IS_BOOT_FROM_EEPROM(Adapter)) @@ -3587,8 +3606,8 @@ rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev) // Read all Content from EEPROM or EFUSE. for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2) { - usValue = eprom_read(dev, (u16) (i>>1)); - *((u16*)(&hwinfo[i])) = usValue; + eeprom_93cx6_read(&eeprom, (u16) (i>>1), &eeprom_val); + *((u16 *)(&hwinfo[i])) = eeprom_val; } } else if (!(priv->EepromOrEfuse)) @@ -4140,11 +4159,6 @@ short rtl8192_init(struct net_device *dev) init_timer(&priv->watch_dog_timer); priv->watch_dog_timer.data = (unsigned long)dev; priv->watch_dog_timer.function = watch_dog_timer_callback; - - //rtl8192_adapter_start(dev); -#ifdef DEBUG_EPROM - dump_eprom(dev); -#endif return 0; } @@ -5512,85 +5526,93 @@ void rtl819x_update_rxcounts( } } -extern void rtl819x_watchdog_wqcallback(struct work_struct *work) +void rtl819x_watchdog_wqcallback(struct work_struct *work) { - struct delayed_work *dwork = container_of(work,struct delayed_work,work); - struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq); - struct net_device *dev = priv->ieee80211->dev; + struct delayed_work *dwork = container_of(work, + struct delayed_work, + work); + struct r8192_priv *priv = container_of(dwork, + struct r8192_priv, + watch_dog_wq); + struct net_device *dev = priv->ieee80211->dev; struct ieee80211_device* ieee = priv->ieee80211; - RESET_TYPE ResetType = RESET_TYPE_NORESET; - static u8 check_reset_cnt=0; + RESET_TYPE ResetType = RESET_TYPE_NORESET; + u8 check_reset_cnt = 0; bool bBusyTraffic = false; if(!priv->up) return; hal_dm_watchdog(dev); - {//to get busy traffic condition - if(ieee->state == IEEE80211_LINKED) - { - //windows mod 666 to 100. - //if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 || - // ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) { - if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 || - ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) { + /* to get busy traffic condition */ + if (ieee->state == IEEE80211_LINKED) { + if (ieee->LinkDetectInfo.NumRxOkInPeriod > 666 || + ieee->LinkDetectInfo.NumTxOkInPeriod > 666) bBusyTraffic = true; - } - ieee->LinkDetectInfo.NumRxOkInPeriod = 0; - ieee->LinkDetectInfo.NumTxOkInPeriod = 0; - ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic; - } - } - //added by amy for AP roaming - { - if(priv->ieee80211->state == IEEE80211_LINKED && priv->ieee80211->iw_mode == IW_MODE_INFRA) - { - u32 TotalRxBcnNum = 0; - u32 TotalRxDataNum = 0; - rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum); - if((TotalRxBcnNum+TotalRxDataNum) == 0) - { - #ifdef TODO - if(rfState == eRfOff) - RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__); - #endif - printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__); - // Dot11d_Reset(dev); - priv->ieee80211->state = IEEE80211_ASSOCIATING; - notify_wx_assoc_event(priv->ieee80211); - RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid); - ieee->is_roaming = true; - priv->ieee80211->link_change(dev); - queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq); - } + ieee->LinkDetectInfo.NumRxOkInPeriod = 0; + ieee->LinkDetectInfo.NumTxOkInPeriod = 0; + ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic; + } + + if (priv->ieee80211->state == IEEE80211_LINKED && + priv->ieee80211->iw_mode == IW_MODE_INFRA) { + u32 TotalRxBcnNum = 0; + u32 TotalRxDataNum = 0; + rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum); + if ((TotalRxBcnNum + TotalRxDataNum) == 0) { + #ifdef TODO + if (rfState == eRfOff) + RT_TRACE(COMP_ERR, "========>%s()\n", + __func__); + #endif + RT_TRACE(COMP_ERR, "=>%s(): AP is power off," + "connect another one\n", __func__); + /* Dot11d_Reset(dev); */ + priv->ieee80211->state = IEEE80211_ASSOCIATING; + notify_wx_assoc_event(priv->ieee80211); + RemovePeerTS(priv->ieee80211, + priv->ieee80211->current_network.bssid); + + ieee->is_roaming = true; + priv->ieee80211->link_change(dev); + queue_work(priv->ieee80211->wq, + &priv->ieee80211->associate_procedure_wq); } - priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod=0; - priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod=0; } -// CAM_read_entry(dev,4); - //check if reset the driver - if(check_reset_cnt++ >= 3 && !ieee->is_roaming) - { - ResetType = rtl819x_ifcheck_resetornot(dev); + priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod = 0; + priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod = 0; + + /* + * CAM_read_entry(dev,4); + * check if reset the driver + */ + if (check_reset_cnt++ >= 3 && !ieee->is_roaming) { + ResetType = rtl819x_ifcheck_resetornot(dev); check_reset_cnt = 3; - //DbgPrint("Start to check silent reset\n"); } - // RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType); -#if 1 - if( (priv->force_reset) || (priv->ResetProgress==RESET_TYPE_NORESET && + if ((priv->force_reset) || (priv->ResetProgress == RESET_TYPE_NORESET && (priv->bForcedSilentReset || - (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT)))) // This is control by OID set in Pomelo - { - RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType); + (!priv->bDisableNormalResetCheck && + /* This is control by OID set in Pomelo */ + ResetType == RESET_TYPE_SILENT)))) { + RT_TRACE(COMP_RESET, "%s():priv->force_reset is %d," + "priv->ResetProgress is %d, " + "priv->bForcedSilentReset is %d, " + "priv->bDisableNormalResetCheck is %d, " + "ResetType is %d\n", + __func__, + priv->force_reset, + priv->ResetProgress, + priv->bForcedSilentReset, + priv->bDisableNormalResetCheck, + ResetType); rtl819x_ifsilentreset(dev); } -#endif priv->force_reset = false; priv->bForcedSilentReset = false; priv->bResetInProgress = false; RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n"); - } void watch_dog_timer_callback(unsigned long data) diff --git a/drivers/staging/rtl8192su/r819xU_cmdpkt.c b/drivers/staging/rtl8192su/r819xU_cmdpkt.c index 3ebfe79bb663..43b68a02d0c1 100644 --- a/drivers/staging/rtl8192su/r819xU_cmdpkt.c +++ b/drivers/staging/rtl8192su/r819xU_cmdpkt.c @@ -1,384 +1,249 @@ -/****************************************************************************** - - (c) Copyright 2008, RealTEK Technologies Inc. All Rights Reserved. - - Module: r819xusb_cmdpkt.c (RTL8190 TX/RX command packet handler Source C File) - - Note: The module is responsible for handling TX and RX command packet. - 1. TX : Send set and query configuration command packet. - 2. RX : Receive tx feedback, beacon state, query configuration - command packet. - - Function: - - Export: - - Abbrev: - - History: - Data Who Remark - - 05/06/2008 amy Create initial version porting from windows driver. - -******************************************************************************/ +/* + * (c) Copyright 2008, RealTEK Technologies Inc. All Rights Reserved. + * + * Module: r819xusb_cmdpkt.c + * (RTL8190 TX/RX command packet handler Source C File) + * + * Note: The module is responsible for handling TX and RX command packet. + * 1.TX: Send set and query configuration command packet. + * 2.RX: Receive tx feedback, beacon state, query configuration, command packet. + */ #include "r8192U.h" #include "r819xU_cmdpkt.h" -/*---------------------------Define Local Constant---------------------------*/ -/* Debug constant*/ -#define CMPK_DEBOUNCE_CNT 1 -/* 2007/10/24 MH Add for printing a range of data. */ -#define CMPK_PRINT(Address)\ -{\ - unsigned char i;\ - u32 temp[10];\ - \ - memcpy(temp, Address, 40);\ - for (i = 0; i <40; i+=4)\ - printk("\r\n %08x", temp[i]);\ -}\ -/*---------------------------Define functions---------------------------------*/ - -bool -SendTxCommandPacket( - struct net_device *dev, - void* pData, - u32 DataLen - ) + +bool SendTxCommandPacket(struct net_device *dev, void *pData, u32 DataLen) { bool rtStatus = true; struct r8192_priv *priv = ieee80211_priv(dev); struct sk_buff *skb; cb_desc *tcb_desc; unsigned char *ptr_buf; - //bool bLastInitPacket = false; - //PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); + /* PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); */ - //Get TCB and local buffer from common pool. (It is shared by CmdQ, MgntQ, and USB coalesce DataQ) + /* + * Get TCB and local buffer from common pool. + * (It is shared by CmdQ, MgntQ, and USB coalesce DataQ) + */ skb = dev_alloc_skb(USB_HWDESC_HEADER_LEN + DataLen + 4); - memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev)); - tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE); + memcpy((unsigned char *)(skb->cb), &dev, sizeof(dev)); + tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); tcb_desc->queue_index = TXCMD_QUEUE; tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_NORMAL; tcb_desc->bLastIniPkt = 0; skb_reserve(skb, USB_HWDESC_HEADER_LEN); ptr_buf = skb_put(skb, DataLen); - memset(ptr_buf,0,DataLen); - memcpy(ptr_buf,pData,DataLen); - tcb_desc->txbuf_size= (u16)DataLen; - - if(!priv->ieee80211->check_nic_enough_desc(dev,tcb_desc->queue_index)|| - (!skb_queue_empty(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index]))||\ - (priv->ieee80211->queue_stop) ) { - RT_TRACE(COMP_FIRMWARE,"===================NULL packet==================================> tx full!\n"); + memcpy(ptr_buf, pData, DataLen); + tcb_desc->txbuf_size = (u16)DataLen; + + if (!priv->ieee80211->check_nic_enough_desc(dev, tcb_desc->queue_index) || + (!skb_queue_empty(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index])) || + (priv->ieee80211->queue_stop)) { + RT_TRACE(COMP_FIRMWARE, "NULL packet => tx full\n"); skb_queue_tail(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index], skb); } else { - priv->ieee80211->softmac_hard_start_xmit(skb,dev); + priv->ieee80211->softmac_hard_start_xmit(skb, dev); } //PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); return rtStatus; } -/*----------------------------------------------------------------------------- +/* * Function: cmpk_message_handle_tx() * * Overview: Driver internal module can call the API to send message to - * firmware side. For example, you can send a debug command packet. - * Or you can send a request for FW to modify RLX4181 LBUS HW bank. - * Otherwise, you can change MAC/PHT/RF register by firmware at - * run time. We do not support message more than one segment now. + * firmware side. For example, you can send a debug command packet. + * Or you can send a request for FW to modify RLX4181 LBUS HW bank. + * Otherwise, you can change MAC/PHT/RF register by firmware at + * run time. We do not support message more than one segment now. * * Input: NONE * * Output: NONE * * Return: NONE - * - * Revised History: - * When Who Remark - * 05/06/2008 amy porting from windows code. - * - *---------------------------------------------------------------------------*/ + */ extern bool cmpk_message_handle_tx( struct net_device *dev, - u8* codevirtualaddress, + u8 *codevirtualaddress, u32 packettype, u32 buffer_len) { - - bool rt_status = true; + bool rt_status = true; return rt_status; -} /* CMPK_Message_Handle_Tx */ +} -/*----------------------------------------------------------------------------- - * Function: cmpk_counttxstatistic() - * - * Overview: - * - * Input: PADAPTER pAdapter - . - * CMPK_TXFB_T *psTx_FB - . - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 05/12/2008 amy Create Version 0 porting from windows code. - * - *---------------------------------------------------------------------------*/ +/* + * Function: cmpk_counttxstatistic() + */ static void -cmpk_count_txstatistic( - struct net_device *dev, - cmpk_txfb_t *pstx_fb) +cmpk_count_txstatistic(struct net_device *dev, cmpk_txfb_t *pstx_fb) { struct r8192_priv *priv = ieee80211_priv(dev); #ifdef ENABLE_PS - RT_RF_POWER_STATE rtState; + RT_RF_POWER_STATE rtState; - pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); + pAdapter->HalFunc.GetHwRegHandler(pAdapter, + HW_VAR_RF_STATE, + (pu1Byte)(&rtState)); - // When RF is off, we should not count the packet for hw/sw synchronize - // reason, ie. there may be a duration while sw switch is changed and hw - // switch is being changed. 2006.12.04, by shien chang. + /* + * When RF is off, we should not count the packet for hw/sw synchronize + * reason, ie. there may be a duration while sw switch is changed and hw + * switch is being changed. + */ if (rtState == eRfOff) - { return; - } #endif #ifdef TODO - if(pAdapter->bInHctTest) + if (pAdapter->bInHctTest) return; #endif - /* We can not know the packet length and transmit type: broadcast or uni - or multicast. So the relative statistics must be collected in tx - feedback info. */ - if (pstx_fb->tok) - { + /* + * We can not know the packet length and transmit type: + * broadcast or uni or multicast. + * So the relative statistics must be collected in tx feedback info + */ + if (pstx_fb->tok) { priv->stats.txfeedbackok++; priv->stats.txoktotal++; priv->stats.txokbytestotal += pstx_fb->pkt_length; priv->stats.txokinperiod++; - /* We can not make sure broadcast/multicast or unicast mode. */ - if (pstx_fb->pkt_type == PACKET_MULTICAST) - { + if (pstx_fb->pkt_type == PACKET_MULTICAST) { priv->stats.txmulticast++; priv->stats.txbytesmulticast += pstx_fb->pkt_length; - } - else if (pstx_fb->pkt_type == PACKET_BROADCAST) - { + } else if (pstx_fb->pkt_type == PACKET_BROADCAST) { priv->stats.txbroadcast++; priv->stats.txbytesbroadcast += pstx_fb->pkt_length; - } - else - { + } else { priv->stats.txunicast++; priv->stats.txbytesunicast += pstx_fb->pkt_length; } - } - else - { + } else { priv->stats.txfeedbackfail++; priv->stats.txerrtotal++; priv->stats.txerrbytestotal += pstx_fb->pkt_length; - /* We can not make sure broadcast/multicast or unicast mode. */ if (pstx_fb->pkt_type == PACKET_MULTICAST) - { priv->stats.txerrmulticast++; - } else if (pstx_fb->pkt_type == PACKET_BROADCAST) - { priv->stats.txerrbroadcast++; - } else - { priv->stats.txerrunicast++; - } } - priv->stats.txretrycount += pstx_fb->retry_cnt; priv->stats.txfeedbackretry += pstx_fb->retry_cnt; +} -} /* cmpk_CountTxStatistic */ - - - -/*----------------------------------------------------------------------------- +/* * Function: cmpk_handle_tx_feedback() * * Overview: The function is responsible for extract the message inside TX - * feedbck message from firmware. It will contain dedicated info in - * ws-06-0063-rtl8190-command-packet-specification. Please - * refer to chapter "TX Feedback Element". We have to read 20 bytes - * in the command packet. + * feedbck message from firmware. It will contain dedicated info in + * ws-06-0063-rtl8190-command-packet-specification. Please + * refer to chapter "TX Feedback Element". We have to read 20 bytes + * in the command packet. * * Input: struct net_device * dev - * u8 * pmsg - Msg Ptr of the command packet. + * u8 *pmsg - Msg Ptr of the command packet. * * Output: NONE * * Return: NONE - * - * Revised History: - * When Who Remark - * 05/08/2008 amy Create Version 0 porting from windows code. - * - *---------------------------------------------------------------------------*/ -static void -cmpk_handle_tx_feedback( - struct net_device *dev, - u8 * pmsg) + */ +static void cmpk_handle_tx_feedback(struct net_device *dev, u8 *pmsg) { struct r8192_priv *priv = ieee80211_priv(dev); - cmpk_txfb_t rx_tx_fb; /* */ + cmpk_txfb_t rx_tx_fb; priv->stats.txfeedback++; - /* 0. Display received message. */ - //cmpk_Display_Message(CMPK_RX_TX_FB_SIZE, pMsg); - /* 1. Extract TX feedback info from RFD to temp structure buffer. */ + memcpy((u8 *)&rx_tx_fb, pmsg, sizeof(cmpk_txfb_t)); - /* 2007/07/05 MH Use pointer to transfer structure memory. */ - //memcpy((UINT8 *)&rx_tx_fb, pMsg, sizeof(CMPK_TXFB_T)); - memcpy((u8*)&rx_tx_fb, pmsg, sizeof(cmpk_txfb_t)); /* 2. Use tx feedback info to count TX statistics. */ cmpk_count_txstatistic(dev, &rx_tx_fb); +} - /* 2007/01/17 MH Comment previous method for TX statistic function. */ - /* Collect info TX feedback packet to fill TCB. */ - /* We can not know the packet length and transmit type: broadcast or uni - or multicast. */ - //CountTxStatistics( pAdapter, &tcb ); - -} /* cmpk_Handle_Tx_Feedback */ - -void -cmdpkt_beacontimerinterrupt_819xusb( - struct net_device *dev -) +void cmdpkt_beacontimerinterrupt_819xusb(struct net_device *dev) { struct r8192_priv *priv = ieee80211_priv(dev); u16 tx_rate; - { - // - // 070117, rcnjko: 87B have to S/W beacon for DTM encryption_cmn. - // - if(priv->ieee80211->current_network.mode == IEEE_A || - priv->ieee80211->current_network.mode == IEEE_N_5G || - (priv->ieee80211->current_network.mode == IEEE_N_24G && (!priv->ieee80211->pHTInfo->bCurSuppCCK))) - { - tx_rate = 60; - DMESG("send beacon frame tx rate is 6Mbpm\n"); - } - else - { - tx_rate =10; - DMESG("send beacon frame tx rate is 1Mbpm\n"); - } - - rtl819xusb_beacon_tx(dev,tx_rate); // HW Beacon + if (priv->ieee80211->current_network.mode == IEEE_A || + priv->ieee80211->current_network.mode == IEEE_N_5G || + (priv->ieee80211->current_network.mode == IEEE_N_24G && + (!priv->ieee80211->pHTInfo->bCurSuppCCK))) { + tx_rate = 60; + DMESG("send beacon frame tx rate is 6Mbpm\n"); + } else { + tx_rate = 10; + DMESG("send beacon frame tx rate is 1Mbpm\n"); } - + rtl819xusb_beacon_tx(dev, tx_rate); /* HW Beacon */ } - - - -/*----------------------------------------------------------------------------- +/* * Function: cmpk_handle_interrupt_status() * * Overview: The function is responsible for extract the message from - * firmware. It will contain dedicated info in - * ws-07-0063-v06-rtl819x-command-packet-specification-070315.doc. - * Please refer to chapter "Interrupt Status Element". + * firmware. It will contain dedicated info in + * ws-07-0063-v06-rtl819x-command-packet-specification-070315.doc. + * Please refer to chapter "Interrupt Status Element". * * Input: struct net_device *dev, - * u8* pmsg - Message Pointer of the command packet. + * u8* pmsg - Message Pointer of the command packet. * * Output: NONE * * Return: NONE - * - * Revised History: - * When Who Remark - * 05/12/2008 amy Add this for rtl8192 porting from windows code. - * - *---------------------------------------------------------------------------*/ -static void -cmpk_handle_interrupt_status( - struct net_device *dev, - u8* pmsg) + */ +static void cmpk_handle_interrupt_status(struct net_device *dev, u8 *pmsg) { cmpk_intr_sta_t rx_intr_status; /* */ struct r8192_priv *priv = ieee80211_priv(dev); DMESG("---> cmpk_Handle_Interrupt_Status()\n"); - /* 0. Display received message. */ - //cmpk_Display_Message(CMPK_RX_BEACON_STATE_SIZE, pMsg); - /* 1. Extract TX feedback info from RFD to temp structure buffer. */ - /* It seems that FW use big endian(MIPS) and DRV use little endian in - windows OS. So we have to read the content byte by byte or transfer - endian type before copy the message copy. */ - //rx_bcn_state.Element_ID = pMsg[0]; - //rx_bcn_state.Length = pMsg[1]; rx_intr_status.length = pmsg[1]; - if (rx_intr_status.length != (sizeof(cmpk_intr_sta_t) - 2)) - { + if (rx_intr_status.length != (sizeof(cmpk_intr_sta_t) - 2)) { DMESG("cmpk_Handle_Interrupt_Status: wrong length!\n"); return; } - - - // Statistics of beacon for ad-hoc mode. - if( priv->ieee80211->iw_mode == IW_MODE_ADHOC) - { + /* Statistics of beacon for ad-hoc mode. */ + if (priv->ieee80211->iw_mode == IW_MODE_ADHOC) { //2 maybe need endian transform? rx_intr_status.interrupt_status = *((u32 *)(pmsg + 4)); //rx_intr_status.InterruptStatus = N2H4BYTE(*((UINT32 *)(pMsg + 4))); DMESG("interrupt status = 0x%x\n", rx_intr_status.interrupt_status); - if (rx_intr_status.interrupt_status & ISR_TxBcnOk) - { + if (rx_intr_status.interrupt_status & ISR_TxBcnOk) { priv->ieee80211->bibsscoordinator = true; priv->stats.txbeaconokint++; - } - else if (rx_intr_status.interrupt_status & ISR_TxBcnErr) - { + } else if (rx_intr_status.interrupt_status & ISR_TxBcnErr) { priv->ieee80211->bibsscoordinator = false; priv->stats.txbeaconerr++; } if (rx_intr_status.interrupt_status & ISR_BcnTimerIntr) - { cmdpkt_beacontimerinterrupt_819xusb(dev); - } - } - - // Other informations in interrupt status we need? - - + /* Other informations in interrupt status we need? */ DMESG("<---- cmpk_handle_interrupt_status()\n"); +} -} /* cmpk_handle_interrupt_status */ - - -/*----------------------------------------------------------------------------- +/* * Function: cmpk_handle_query_config_rx() * * Overview: The function is responsible for extract the message from * firmware. It will contain dedicated info in - * ws-06-0063-rtl8190-command-packet-specification. Please - * refer to chapter "Beacon State Element". + * ws-06-0063-rtl8190-command-packet-specification + * Please refer to chapter "Beacon State Element". * * Input: u8 * pmsg - Message Pointer of the command packet. * @@ -386,44 +251,28 @@ cmpk_handle_interrupt_status( * * Return: NONE * - * Revised History: - * When Who Remark - * 05/12/2008 amy Create Version 0 porting from windows code. - * - *---------------------------------------------------------------------------*/ -static void -cmpk_handle_query_config_rx( - struct net_device *dev, - u8* pmsg) + */ +static void cmpk_handle_query_config_rx(struct net_device *dev, u8 *pmsg) { - cmpk_query_cfg_t rx_query_cfg; /* */ - - /* 0. Display received message. */ - //cmpk_Display_Message(CMPK_RX_BEACON_STATE_SIZE, pMsg); + cmpk_query_cfg_t rx_query_cfg; + /* + * Extract TX feedback info from RFD to temp structure buffer. + */ + rx_query_cfg.cfg_action = (pmsg[4] & 0x80000000) >> 31; + rx_query_cfg.cfg_type = (pmsg[4] & 0x60) >> 5; + rx_query_cfg.cfg_size = (pmsg[4] & 0x18) >> 3; + rx_query_cfg.cfg_page = (pmsg[6] & 0x0F) >> 0; + rx_query_cfg.cfg_offset = pmsg[7]; + rx_query_cfg.value = (pmsg[8] << 24) | (pmsg[9] << 16) | + (pmsg[10] << 8) | (pmsg[11] << 0); + rx_query_cfg.mask = (pmsg[12] << 24) | (pmsg[13] << 16) | + (pmsg[14] << 8) | (pmsg[15] << 0); +} - /* 1. Extract TX feedback info from RFD to temp structure buffer. */ - /* It seems that FW use big endian(MIPS) and DRV use little endian in - windows OS. So we have to read the content byte by byte or transfer - endian type before copy the message copy. */ - //rx_query_cfg.Element_ID = pMsg[0]; - //rx_query_cfg.Length = pMsg[1]; - rx_query_cfg.cfg_action = (pmsg[4] & 0x80000000)>>31; - rx_query_cfg.cfg_type = (pmsg[4] & 0x60) >> 5; - rx_query_cfg.cfg_size = (pmsg[4] & 0x18) >> 3; - rx_query_cfg.cfg_page = (pmsg[6] & 0x0F) >> 0; - rx_query_cfg.cfg_offset = pmsg[7]; - rx_query_cfg.value = (pmsg[8] << 24) | (pmsg[9] << 16) | - (pmsg[10] << 8) | (pmsg[11] << 0); - rx_query_cfg.mask = (pmsg[12] << 24) | (pmsg[13] << 16) | - (pmsg[14] << 8) | (pmsg[15] << 0); - -} /* cmpk_Handle_Query_Config_Rx */ - - -/*----------------------------------------------------------------------------- +/* * Function: cmpk_count_tx_status() * - * Overview: Count aggregated tx status from firmwar of one type rx command + * Overview: Count aggregated tx status from firmware of one type rx command * packet element id = RX_TX_STATUS. * * Input: NONE @@ -431,14 +280,9 @@ cmpk_handle_query_config_rx( * Output: NONE * * Return: NONE - * - * Revised History: - * When Who Remark - * 05/12/2008 amy Create Version 0 porting from windows code. - * - *---------------------------------------------------------------------------*/ -static void cmpk_count_tx_status( struct net_device *dev, - cmpk_tx_status_t *pstx_status) + */ +static void cmpk_count_tx_status(struct net_device *dev, + cmpk_tx_status_t *pstx_status) { struct r8192_priv *priv = ieee80211_priv(dev); @@ -448,13 +292,13 @@ static void cmpk_count_tx_status( struct net_device *dev, pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); - // When RF is off, we should not count the packet for hw/sw synchronize - // reason, ie. there may be a duration while sw switch is changed and hw - // switch is being changed. 2006.12.04, by shien chang. + /* + * When RF is off, we should not count the packet for hw/sw synchronize + * reason, ie. there may be a duration while sw switch is changed and hw + * switch is being changed. + */ if (rtState == eRfOff) - { return; - } #endif priv->stats.txfeedbackok += pstx_status->txok; @@ -463,15 +307,11 @@ static void cmpk_count_tx_status( struct net_device *dev, priv->stats.txfeedbackfail += pstx_status->txfail; priv->stats.txerrtotal += pstx_status->txfail; - priv->stats.txretrycount += pstx_status->txretry; + priv->stats.txretrycount += pstx_status->txretry; priv->stats.txfeedbackretry += pstx_status->txretry; - //pAdapter->TxStats.NumTxOkBytesTotal += psTx_FB->pkt_length; - //pAdapter->TxStats.NumTxErrBytesTotal += psTx_FB->pkt_length; - //pAdapter->MgntInfo.LinkDetectInfo.NumTxOkInPeriod++; - - priv->stats.txmulticast += pstx_status->txmcok; - priv->stats.txbroadcast += pstx_status->txbcok; + priv->stats.txmulticast += pstx_status->txmcok; + priv->stats.txbroadcast += pstx_status->txbcok; priv->stats.txunicast += pstx_status->txucok; priv->stats.txerrmulticast += pstx_status->txmcfail; @@ -480,14 +320,12 @@ static void cmpk_count_tx_status( struct net_device *dev, priv->stats.txbytesmulticast += pstx_status->txmclength; priv->stats.txbytesbroadcast += pstx_status->txbclength; - priv->stats.txbytesunicast += pstx_status->txuclength; - - priv->stats.last_packet_rate = pstx_status->rate; -} /* cmpk_CountTxStatus */ - + priv->stats.txbytesunicast += pstx_status->txuclength; + priv->stats.last_packet_rate = pstx_status->rate; +} -/*----------------------------------------------------------------------------- +/* * Function: cmpk_handle_tx_status() * * Overview: Firmware add a new tx feedback status to reduce rx command @@ -498,27 +336,18 @@ static void cmpk_count_tx_status( struct net_device *dev, * Output: NONE * * Return: NONE - * - * Revised History: - * When Who Remark - * 05/12/2008 amy Create Version 0 porting from windows code. - * - *---------------------------------------------------------------------------*/ + */ static void -cmpk_handle_tx_status( - struct net_device *dev, - u8* pmsg) +cmpk_handle_tx_status(struct net_device *dev, u8 *pmsg) { - cmpk_tx_status_t rx_tx_sts; /* */ + cmpk_tx_status_t rx_tx_sts; - memcpy((void*)&rx_tx_sts, (void*)pmsg, sizeof(cmpk_tx_status_t)); + memcpy((void *)&rx_tx_sts, (void *)pmsg, sizeof(cmpk_tx_status_t)); /* 2. Use tx feedback info to count TX statistics. */ cmpk_count_tx_status(dev, &rx_tx_sts); +} -} /* cmpk_Handle_Tx_Status */ - - -/*----------------------------------------------------------------------------- +/* * Function: cmpk_handle_tx_rate_history() * * Overview: Firmware add a new tx rate history @@ -528,117 +357,90 @@ cmpk_handle_tx_status( * Output: NONE * * Return: NONE - * - * Revised History: - * When Who Remark - * 05/12/2008 amy Create Version 0 porting from windows code. - * - *---------------------------------------------------------------------------*/ -static void -cmpk_handle_tx_rate_history( - struct net_device *dev, - u8* pmsg) + */ +static void cmpk_handle_tx_rate_history(struct net_device *dev, u8 *pmsg) { cmpk_tx_rahis_t *ptxrate; -// RT_RF_POWER_STATE rtState; - u8 i, j; - u16 length = sizeof(cmpk_tx_rahis_t); - u32 *ptemp; + u8 i, j; + u16 length = sizeof(cmpk_tx_rahis_t); + u32 *ptemp; struct r8192_priv *priv = ieee80211_priv(dev); - #ifdef ENABLE_PS - pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); - - // When RF is off, we should not count the packet for hw/sw synchronize - // reason, ie. there may be a duration while sw switch is changed and hw - // switch is being changed. 2006.12.04, by shien chang. + pAdapter->HalFunc.GetHwRegHandler(pAdapter, + HW_VAR_RF_STATE, + (pu1Byte)(&rtState)); + /* + * When RF is off, we should not count the packet for hw/sw synchronize + * reason, ie. there may be a duration while sw switch is changed and hw + * switch is being changed. + */ if (rtState == eRfOff) - { return; - } #endif - ptemp = (u32 *)pmsg; - // - // Do endian transfer to word alignment(16 bits) for windows system. - // You must do different endian transfer for linux and MAC OS - // - for (i = 0; i < (length/4); i++) - { - u16 temp1, temp2; - - temp1 = ptemp[i]&0x0000FFFF; - temp2 = ptemp[i]>>16; - ptemp[i] = (temp1<<16)|temp2; + /* + * Do endian transfer to word alignment(16 bits) for windows system. + * You must do different endian transfer for linux and MAC OS + */ + for (i = 0; i < (length/4); i++) { + u16 temp1, temp2; + temp1 = ptemp[i] & 0x0000FFFF; + temp2 = ptemp[i] >> 16; + ptemp[i] = (temp1 << 16) | temp2; } ptxrate = (cmpk_tx_rahis_t *)pmsg; - if (ptxrate == NULL ) - { + if (ptxrate == NULL) return; - } - for (i = 0; i < 16; i++) - { - // Collect CCK rate packet num + for (i = 0; i < 16; i++) { + /* Collect CCK rate packet num */ if (i < 4) priv->stats.txrate.cck[i] += ptxrate->cck[i]; - - // Collect OFDM rate packet num - if (i< 8) + /* Collect OFDM rate packet num */ + if (i < 8) priv->stats.txrate.ofdm[i] += ptxrate->ofdm[i]; - for (j = 0; j < 4; j++) priv->stats.txrate.ht_mcs[j][i] += ptxrate->ht_mcs[j][i]; } -} /* cmpk_Handle_Tx_Rate_History */ - +} -/*----------------------------------------------------------------------------- +/* * Function: cmpk_message_handle_rx() * * Overview: In the function, we will capture different RX command packet - * info. Every RX command packet element has different message - * length and meaning in content. We only support three type of RX - * command packet now. Please refer to document - * ws-06-0063-rtl8190-command-packet-specification. + * info. Every RX command packet element has different message + * length and meaning in content. We only support three type of RX + * command packet now. Please refer to document + * ws-06-0063-rtl8190-command-packet-specification. * * Input: NONE * * Output: NONE * * Return: NONE - * - * Revised History: - * When Who Remark - * 05/06/2008 amy Create Version 0 porting from windows code. - * - *---------------------------------------------------------------------------*/ + */ extern u32 cmpk_message_handle_rx( struct net_device *dev, struct ieee80211_rx_stats *pstats) { -// u32 debug_level = DBG_LOUD; struct r8192_priv *priv = ieee80211_priv(dev); int total_length; u8 cmd_length, exe_cnt = 0; u8 element_id; u8 *pcmd_buff; - /* 0. Check inpt arguments. If is is a command queue message or pointer is - null. */ - if (/*(prfd->queue_id != CMPK_RX_QUEUE_ID) || */(pstats== NULL)) - { - /* Print error message. */ - /*RT_TRACE(COMP_SEND, DebugLevel, - ("\n\r[CMPK]-->Err queue id or pointer"));*/ + /* + * 0. Check input arguments. + * If is is a command queue message or pointer is null + */ + if ((pstats == NULL)) return 0; /* This is not a command packet. */ - } /* 1. Read received command packet message length from RFD. */ total_length = pstats->Length; @@ -648,70 +450,49 @@ cmpk_message_handle_rx( /* 3. Read command pakcet element id and length. */ element_id = pcmd_buff[0]; - /*RT_TRACE(COMP_SEND, DebugLevel, - ("\n\r[CMPK]-->element ID=%d Len=%d", element_id, total_length));*/ - - /* 4. Check every received command packet conent according to different - element type. Because FW may aggregate RX command packet to minimize - transmit time between DRV and FW.*/ - // Add a counter to prevent to locked in the loop too long - while (total_length > 0 || exe_cnt++ >100) - { - /* 2007/01/17 MH We support aggregation of different cmd in the same packet. */ - element_id = pcmd_buff[0]; - switch(element_id) - { - case RX_TX_FEEDBACK: - cmpk_handle_tx_feedback (dev, pcmd_buff); - cmd_length = CMPK_RX_TX_FB_SIZE; - break; - - case RX_INTERRUPT_STATUS: - cmpk_handle_interrupt_status(dev, pcmd_buff); - cmd_length = sizeof(cmpk_intr_sta_t); - break; - - case BOTH_QUERY_CONFIG: - cmpk_handle_query_config_rx(dev, pcmd_buff); - cmd_length = CMPK_BOTH_QUERY_CONFIG_SIZE; - break; - - case RX_TX_STATUS: - cmpk_handle_tx_status(dev, pcmd_buff); - cmd_length = CMPK_RX_TX_STS_SIZE; - break; - - case RX_TX_PER_PKT_FEEDBACK: - // You must at lease add a switch case element here, - // Otherwise, we will jump to default case. - //DbgPrint("CCX Test\r\n"); - cmd_length = CMPK_RX_TX_FB_SIZE; - break; - - case RX_TX_RATE_HISTORY: - //DbgPrint(" rx tx rate history\r\n"); - cmpk_handle_tx_rate_history(dev, pcmd_buff); - cmd_length = CMPK_TX_RAHIS_SIZE; - break; - - default: - - RT_TRACE(COMP_ERR, "---->cmpk_message_handle_rx():unknown CMD Element\n"); - return 1; /* This is a command packet. */ - } - // 2007/01/22 MH Display received rx command packet info. - //cmpk_Display_Message(cmd_length, pcmd_buff); + /* + * 4. Check every received command packet conent according to different + * element type. Because FW may aggregate RX command packet to minimize + * transmit time between DRV and FW. + */ - // 2007/01/22 MH Add to display tx statistic. - //cmpk_DisplayTxStatistic(pAdapter); - - /* 2007/03/09 MH Collect sidderent cmd element pkt num. */ + /* Add a counter to prevent to locked in the loop too long */ + while (total_length > 0 || exe_cnt++ > 100) { + /* We support aggregation of different cmd in the same packet */ + element_id = pcmd_buff[0]; + switch (element_id) { + case RX_TX_FEEDBACK: + cmpk_handle_tx_feedback(dev, pcmd_buff); + cmd_length = CMPK_RX_TX_FB_SIZE; + break; + case RX_INTERRUPT_STATUS: + cmpk_handle_interrupt_status(dev, pcmd_buff); + cmd_length = sizeof(cmpk_intr_sta_t); + break; + case BOTH_QUERY_CONFIG: + cmpk_handle_query_config_rx(dev, pcmd_buff); + cmd_length = CMPK_BOTH_QUERY_CONFIG_SIZE; + break; + case RX_TX_STATUS: + cmpk_handle_tx_status(dev, pcmd_buff); + cmd_length = CMPK_RX_TX_STS_SIZE; + break; + case RX_TX_PER_PKT_FEEDBACK: + cmd_length = CMPK_RX_TX_FB_SIZE; + break; + case RX_TX_RATE_HISTORY: + cmpk_handle_tx_rate_history(dev, pcmd_buff); + cmd_length = CMPK_TX_RAHIS_SIZE; + break; + default: + RT_TRACE(COMP_ERR, "(%s): unknown CMD Element\n", + __func__); + return 1; /* This is a command packet. */ + } priv->stats.rxcmdpkt[element_id]++; - total_length -= cmd_length; pcmd_buff += cmd_length; - } /* while (total_length > 0) */ - return 1; /* This is a command packet. */ - -} /* CMPK_Message_Handle_Rx */ + } + return 1; /* This is a command packet. */ +} diff --git a/drivers/staging/rtl8192su/r819xU_cmdpkt.h b/drivers/staging/rtl8192su/r819xU_cmdpkt.h index cced8e0d2788..d3c561551880 100644 --- a/drivers/staging/rtl8192su/r819xU_cmdpkt.h +++ b/drivers/staging/rtl8192su/r819xU_cmdpkt.h @@ -1,199 +1,191 @@ #ifndef R819XUSB_CMDPKT_H #define R819XUSB_CMDPKT_H -/* Different command packet have dedicated message length and definition. */ -#define CMPK_RX_TX_FB_SIZE sizeof(cmpk_txfb_t) //20 -#define CMPK_TX_SET_CONFIG_SIZE sizeof(cmpk_set_cfg_t) //16 -#define CMPK_BOTH_QUERY_CONFIG_SIZE sizeof(cmpk_set_cfg_t) //16 -#define CMPK_RX_TX_STS_SIZE sizeof(cmpk_tx_status_t)// -#define CMPK_RX_DBG_MSG_SIZE sizeof(cmpk_rx_dbginfo_t)// -#define CMPK_TX_RAHIS_SIZE sizeof(cmpk_tx_rahis_t) - -/* 2008/05/08 amy For USB constant. */ -#define ISR_TxBcnOk BIT27 // Transmit Beacon OK -#define ISR_TxBcnErr BIT26 // Transmit Beacon Error -#define ISR_BcnTimerIntr BIT13 // Beacon Timer Interrupt - -/* Define element ID of command packet. */ - -/*------------------------------Define structure----------------------------*/ -/* Define different command packet structure. */ -/* 1. RX side: TX feedback packet. */ -typedef struct tag_cmd_pkt_tx_feedback -{ - // DWORD 0 - u8 element_id; /* Command packet type. */ - u8 length; /* Command packet length. */ - /* 2007/07/05 MH Change tx feedback info field. */ - /*------TX Feedback Info Field */ - u8 TID:4; /* */ - u8 fail_reason:3; /* */ - u8 tok:1; /* Transmit ok. */ - u8 reserve1:4; /* */ - u8 pkt_type:2; /* */ - u8 bandwidth:1; /* */ - u8 qos_pkt:1; /* */ - - // DWORD 1 - u8 reserve2; /* */ - /*------TX Feedback Info Field */ - u8 retry_cnt; /* */ - u16 pkt_id; /* */ - - // DWORD 3 - u16 seq_num; /* */ - u8 s_rate; /* Start rate. */ - u8 f_rate; /* Final rate. */ - - // DWORD 4 - u8 s_rts_rate; /* */ - u8 f_rts_rate; /* */ - u16 pkt_length; /* */ - - // DWORD 5 - u16 reserve3; /* */ - u16 duration; /* */ -}cmpk_txfb_t; - -/* 2. RX side: Interrupt status packet. It includes Beacon State, - Beacon Timer Interrupt and other useful informations in MAC ISR Reg. */ -typedef struct tag_cmd_pkt_interrupt_status -{ - u8 element_id; /* Command packet type. */ - u8 length; /* Command packet length. */ - u16 reserve; - u32 interrupt_status; /* Interrupt Status. */ -}cmpk_intr_sta_t; - - -/* 3. TX side: Set configuration packet. */ -typedef struct tag_cmd_pkt_set_configuration -{ - u8 element_id; /* Command packet type. */ - u8 length; /* Command packet length. */ - u16 reserve1; /* */ - u8 cfg_reserve1:3; - u8 cfg_size:2; /* Configuration info. */ - u8 cfg_type:2; /* Configuration info. */ - u8 cfg_action:1; /* Configuration info. */ - u8 cfg_reserve2; /* Configuration info. */ - u8 cfg_page:4; /* Configuration info. */ - u8 cfg_reserve3:4; /* Configuration info. */ - u8 cfg_offset; /* Configuration info. */ - u32 value; /* */ - u32 mask; /* */ -}cmpk_set_cfg_t; - -/* 4. Both side : TX/RX query configuraton packet. The query structure is the - same as set configuration. */ -#define cmpk_query_cfg_t cmpk_set_cfg_t -/* 5. Multi packet feedback status. */ -typedef struct tag_tx_stats_feedback // PJ quick rxcmd 09042007 -{ - // For endian transfer --> Driver will not the same as firmware structure. - // DW 0 +/* + * Different command packets have dedicated message length and definition. + */ +#define CMPK_RX_TX_FB_SIZE sizeof(cmpk_txfb_t) /* 20 */ +#define CMPK_TX_SET_CONFIG_SIZE sizeof(cmpk_set_cfg_t) /* 16 */ +#define CMPK_BOTH_QUERY_CONFIG_SIZE sizeof(cmpk_set_cfg_t) /* 16 */ +#define CMPK_RX_TX_STS_SIZE sizeof(cmpk_tx_status_t) +#define CMPK_RX_DBG_MSG_SIZE sizeof(cmpk_rx_dbginfo_t) +#define CMPK_TX_RAHIS_SIZE sizeof(cmpk_tx_rahis_t) + +/* For USB constant. */ +#define ISR_TxBcnOk BIT27 /* Transmit Beacon OK */ +#define ISR_TxBcnErr BIT26 /* Transmit Beacon Error */ +#define ISR_BcnTimerIntr BIT13 /* Beacon Timer Interrupt */ + +/* + * Define different command packet structures + * + * 1. RX side: TX feedback packet. + */ +typedef struct tag_cmd_pkt_tx_feedback { + /* DWORD 0 */ + u8 element_id; /* Command packet type. */ + u8 length; /* Command packet length. */ + /* TX Feedback Info Field */ + u8 TID:4; + u8 fail_reason:3; + u8 tok:1; /* Transmit ok. */ + u8 reserve1:4; + u8 pkt_type:2; + u8 bandwidth:1; + u8 qos_pkt:1; + + /* DWORD 1 */ + u8 reserve2; + /* TX Feedback Info Field */ + u8 retry_cnt; + u16 pkt_id; + + /* DWORD 3 */ + u16 seq_num; + u8 s_rate; /* Start rate. */ + u8 f_rate; /* Final rate. */ + + /* DWORD 4 */ + u8 s_rts_rate; + u8 f_rts_rate; + u16 pkt_length; + + /* DWORD 5 */ + u16 reserve3; + u16 duration; +} cmpk_txfb_t; + +/* + * 2. RX side: Interrupt status packet. + * It includes Beacon State, Beacon Timer Interrupt + * and other useful informations in MAC ISR Reg. + */ +typedef struct tag_cmd_pkt_interrupt_status { + u8 element_id; /* Command packet type. */ + u8 length; /* Command packet length. */ + u16 reserve; + u32 interrupt_status; /* Interrupt Status. */ +} cmpk_intr_sta_t; + + +/* + * 3. TX side: Set configuration packet. + */ +typedef struct tag_cmd_pkt_set_configuration { + u8 element_id; /* Command packet type. */ + u8 length; /* Command packet length. */ u16 reserve1; - u8 length; // Command packet length - u8 element_id; // Command packet type - - // DW 1 - u16 txfail; // Tx Fail count - u16 txok; // Tx ok count - - // DW 2 - u16 txmcok; // tx multicast - u16 txretry; // Tx Retry count - - // DW 3 - u16 txucok; // tx unicast - u16 txbcok; // tx broadcast - - // DW 4 - u16 txbcfail; // - u16 txmcfail; // - - // DW 5 - u16 reserve2; // - u16 txucfail; // - - // DW 6-8 - u32 txmclength; - u32 txbclength; - u32 txuclength; - - // DW 9 - u16 reserve3_23; - u8 reserve3_1; - u8 rate; -}__attribute__((packed)) cmpk_tx_status_t; - -/* 6. Debug feedback message. */ -/* 2007/10/23 MH Define RX debug message */ -typedef struct tag_rx_debug_message_feedback -{ - // For endian transfer --> for driver - // DW 0 - u16 reserve1; - u8 length; // Command packet length - u8 element_id; // Command packet type - - // DW 1-?? - // Variable debug message. - -}cmpk_rx_dbginfo_t; - -/* 2008/03/20 MH Define transmit rate history. For big endian format. */ -typedef struct tag_tx_rate_history -{ - // For endian transfer --> for driver - // DW 0 - u8 element_id; // Command packet type - u8 length; // Command packet length - u16 reserved1; - - // DW 1-2 CCK rate counter - u16 cck[4]; - - // DW 3-6 - u16 ofdm[8]; - - // DW 7-14 - //UINT16 MCS_BW0_SG0[16]; - - // DW 15-22 - //UINT16 MCS_BW1_SG0[16]; - - // DW 23-30 - //UINT16 MCS_BW0_SG1[16]; - - // DW 31-38 - //UINT16 MCS_BW1_SG1[16]; - - // DW 7-14 BW=0 SG=0 - // DW 15-22 BW=1 SG=0 - // DW 23-30 BW=0 SG=1 - // DW 31-38 BW=1 SG=1 - u16 ht_mcs[4][16]; - -}__attribute__((packed)) cmpk_tx_rahis_t; + u8 cfg_reserve1:3; + u8 cfg_size:2; /* Configuration info. */ + u8 cfg_type:2; /* Configuration info. */ + u8 cfg_action:1; /* Configuration info. */ + u8 cfg_reserve2; /* Configuration info. */ + u8 cfg_page:4; /* Configuration info. */ + u8 cfg_reserve3:4; /* Configuration info. */ + u8 cfg_offset; /* Configuration info. */ + u32 value; + u32 mask; +} cmpk_set_cfg_t; + +/* + * 4. Both side : TX/RX query configuraton packet. + * The query structure is the same as set configuration. + */ +#define cmpk_query_cfg_t cmpk_set_cfg_t -typedef enum tag_command_packet_directories -{ +/* + * 5. Multi packet feedback status. + */ +typedef struct tag_tx_stats_feedback { + /* + * For endian transfer + * Driver will not the same as firmware structure. + */ + /* DW 0 */ + u16 reserve1; + u8 length; /* Command packet length */ + u8 element_id; /* Command packet type */ + + /* DW 1 */ + u16 txfail; /* Tx Fail count */ + u16 txok; /* Tx ok count */ + + /* DW 2 */ + u16 txmcok; /* tx multicast */ + u16 txretry; /* Tx Retry count */ + + /* DW 3 */ + u16 txucok; /* tx unicast */ + u16 txbcok; /* tx broadcast */ + + /* DW 4 */ + u16 txbcfail; + u16 txmcfail; + + /* DW 5 */ + u16 reserve2; + u16 txucfail; + + /* DW 6-8 */ + u32 txmclength; + u32 txbclength; + u32 txuclength; + + /* DW 9 */ + u16 reserve3_23; + u8 reserve3_1; + u8 rate; +} __attribute__((packed)) cmpk_tx_status_t; + +/* + * 6. Debug feedback message. + */ +typedef struct tag_rx_debug_message_feedback { + /* For endian transfer --> for driver */ + /* DW 0 */ + u16 reserve1; + u8 length; /* Command packet length */ + u8 element_id; /* Command packet type */ +} cmpk_rx_dbginfo_t; + +/* + * Define transmit rate history. For big endian format. + */ +typedef struct tag_tx_rate_history { + /* For endian transfer --> for driver */ + /* DW 0 */ + u8 element_id; /* Command packet type */ + u8 length; /* Command packet length */ + u16 reserved1; + /* DW 1-2 CCK rate counter */ + u16 cck[4]; + /* DW 3-6 */ + u16 ofdm[8]; + u16 ht_mcs[4][16]; +} __attribute__((packed)) cmpk_tx_rahis_t; + +typedef enum tag_command_packet_directories { RX_TX_FEEDBACK = 0, - RX_INTERRUPT_STATUS = 1, - TX_SET_CONFIG = 2, - BOTH_QUERY_CONFIG = 3, - RX_TX_STATUS = 4, - RX_DBGINFO_FEEDBACK = 5, - RX_TX_PER_PKT_FEEDBACK = 6, - RX_TX_RATE_HISTORY = 7, + RX_INTERRUPT_STATUS = 1, + TX_SET_CONFIG = 2, + BOTH_QUERY_CONFIG = 3, + RX_TX_STATUS = 4, + RX_DBGINFO_FEEDBACK = 5, + RX_TX_PER_PKT_FEEDBACK = 6, + RX_TX_RATE_HISTORY = 7, RX_CMD_ELE_MAX -}cmpk_element_e; +} cmpk_element_e; -extern bool cmpk_message_handle_tx(struct net_device *dev, u8* codevirtualaddress, u32 packettype, u32 buffer_len); +extern bool cmpk_message_handle_tx(struct net_device *dev, + u8 *codevirtualaddress, + u32 packettype, + u32 buffer_len); -extern u32 cmpk_message_handle_rx(struct net_device *dev, struct ieee80211_rx_stats * pstats); -extern bool SendTxCommandPacket( struct net_device *dev, void* pData, u32 DataLen); +extern u32 cmpk_message_handle_rx(struct net_device *dev, + struct ieee80211_rx_stats *pstats); +extern bool SendTxCommandPacket(struct net_device *dev, + void *pData, + u32 DataLen); #endif diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c index 48537d948945..81aa2ed226ac 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c @@ -47,7 +47,6 @@ #include <linux/slab.h> #include <linux/tcp.h> #include <linux/types.h> -#include <linux/version.h> #include <linux/wireless.h> #include <linux/etherdevice.h> #include <asm/uaccess.h> diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c index 750e94e17114..4d5348e6c104 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c @@ -30,7 +30,6 @@ ******************************************************************************/ #include <linux/wireless.h> -#include <linux/version.h> #include <linux/kmod.h> #include <linux/slab.h> #include <linux/module.h> diff --git a/drivers/staging/rtl8192u/r819xU_cmdpkt.c b/drivers/staging/rtl8192u/r819xU_cmdpkt.c index fd19a85297a9..0cb28c776c49 100644 --- a/drivers/staging/rtl8192u/r819xU_cmdpkt.c +++ b/drivers/staging/rtl8192u/r819xU_cmdpkt.c @@ -63,7 +63,6 @@ SendTxCommandPacket( tcb_desc->bLastIniPkt = 0; skb_reserve(skb, USB_HWDESC_HEADER_LEN); ptr_buf = skb_put(skb, DataLen); - memset(ptr_buf,0,DataLen); memcpy(ptr_buf,pData,DataLen); tcb_desc->txbuf_size= (u16)DataLen; diff --git a/drivers/staging/sep/sep_driver.c b/drivers/staging/sep/sep_driver.c index 88880734921a..0332c370fd82 100644 --- a/drivers/staging/sep/sep_driver.c +++ b/drivers/staging/sep/sep_driver.c @@ -39,7 +39,6 @@ #include <linux/mm.h> #include <linux/poll.h> #include <linux/wait.h> -#include <linux/sched.h> #include <linux/pci.h> #include <linux/firmware.h> #include <linux/slab.h> diff --git a/drivers/staging/sm7xx/smtcfb.c b/drivers/staging/sm7xx/smtcfb.c index 8d7261c052eb..e817a20d1bdd 100644 --- a/drivers/staging/sm7xx/smtcfb.c +++ b/drivers/staging/sm7xx/smtcfb.c @@ -3,7 +3,7 @@ * * Copyright (C) 2006 Silicon Motion Technology Corp. * Authors: Ge Wang, gewang@siliconmotion.com - * Boyod boyod.yang@siliconmotion.com.cn + * Boyod boyod.yang@siliconmotion.com.cn * * Copyright (C) 2009 Lemote, Inc. * Author: Wu Zhangjin, wuzhangjin@gmail.com @@ -13,17 +13,17 @@ * more details. * * Version 0.10.26192.21.01 - * - Add PowerPC/Big endian support - * - Add 2D support for Lynx - * - Verified on2.6.19.2 Boyod.yang <boyod.yang@siliconmotion.com.cn> + * - Add PowerPC/Big endian support + * - Add 2D support for Lynx + * - Verified on2.6.19.2 Boyod.yang <boyod.yang@siliconmotion.com.cn> * * Version 0.09.2621.00.01 - * - Only support Linux Kernel's version 2.6.21. + * - Only support Linux Kernel's version 2.6.21. * Boyod.yang <boyod.yang@siliconmotion.com.cn> * * Version 0.09 - * - Only support Linux Kernel's version 2.6.12. - * Boyod.yang <boyod.yang@siliconmotion.com.cn> + * - Only support Linux Kernel's version 2.6.12. + * Boyod.yang <boyod.yang@siliconmotion.com.cn> */ #ifndef __KERNEL__ diff --git a/drivers/staging/vme/boards/vme_vmivme7805.c b/drivers/staging/vme/boards/vme_vmivme7805.c index 843c9edde555..80eaa0c4fe1c 100644 --- a/drivers/staging/vme/boards/vme_vmivme7805.c +++ b/drivers/staging/vme/boards/vme_vmivme7805.c @@ -10,7 +10,6 @@ * option) any later version. */ -#include <linux/version.h> #include <linux/module.h> #include <linux/types.h> #include <linux/errno.h> diff --git a/drivers/staging/vme/devices/vme_user.c b/drivers/staging/vme/devices/vme_user.c index 1ab9a985dfb9..bc16fc070fd3 100644 --- a/drivers/staging/vme/devices/vme_user.c +++ b/drivers/staging/vme/devices/vme_user.c @@ -31,6 +31,7 @@ #include <linux/slab.h> #include <linux/spinlock.h> #include <linux/syscalls.h> +#include <linux/smp_lock.h> #include <linux/types.h> #include <asm/io.h> @@ -130,8 +131,7 @@ static int vme_user_release(struct inode *, struct file *); static ssize_t vme_user_read(struct file *, char *, size_t, loff_t *); static ssize_t vme_user_write(struct file *, const char *, size_t, loff_t *); static loff_t vme_user_llseek(struct file *, loff_t, int); -static int vme_user_ioctl(struct inode *, struct file *, unsigned int, - unsigned long); +static long vme_user_unlocked_ioctl(struct file *, unsigned int, unsigned long); static int __init vme_user_probe(struct device *, int, int); static int __exit vme_user_remove(struct device *, int, int); @@ -142,7 +142,7 @@ static struct file_operations vme_user_fops = { .read = vme_user_read, .write = vme_user_write, .llseek = vme_user_llseek, - .ioctl = vme_user_ioctl, + .unlocked_ioctl = vme_user_unlocked_ioctl, }; @@ -555,6 +555,18 @@ static int vme_user_ioctl(struct inode *inode, struct file *file, return -EINVAL; } +static long +vme_user_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + int ret; + + lock_kernel(); + ret = vme_user_ioctl(file->f_path.dentry->d_inode, file, cmd, arg); + unlock_kernel(); + + return ret; +} + /* * Unallocate a previously allocated buffer diff --git a/drivers/staging/vt6655/80211hdr.h b/drivers/staging/vt6655/80211hdr.h index e5cee6fd0533..b7b170e19aa2 100644 --- a/drivers/staging/vt6655/80211hdr.h +++ b/drivers/staging/vt6655/80211hdr.h @@ -34,7 +34,7 @@ #include "ttype.h" /*--------------------- Export Definitions -------------------------*/ -// bit type +/* bit type */ #define BIT0 0x00000001 #define BIT1 0x00000002 #define BIT2 0x00000004 @@ -80,7 +80,7 @@ #define WLAN_HDR_ADDR4_LEN 30 #define WLAN_IEHDR_LEN 2 #define WLAN_SSID_MAXLEN 32 -//#define WLAN_RATES_MAXLEN 255 +/*#define WLAN_RATES_MAXLEN 255*/ #define WLAN_RATES_MAXLEN 16 #define WLAN_RATES_MAXLEN_11B 4 #define WLAN_RSN_MAXLEN 32 @@ -106,7 +106,7 @@ #define WLAN_WEP40_KEYLEN 5 #define WLAN_WEP104_KEYLEN 13 #define WLAN_WEP232_KEYLEN 29 -//#define WLAN_WEPMAX_KEYLEN 29 +/*#define WLAN_WEPMAX_KEYLEN 29*/ #define WLAN_WEPMAX_KEYLEN 32 #define WLAN_CHALLENGE_IE_MAXLEN 255 #define WLAN_CHALLENGE_IE_LEN 130 @@ -115,7 +115,7 @@ #define WLAN_WEP_ICV_LEN 4 #define WLAN_FRAGS_MAX 16 -// Frame Type +/* Frame Type */ #define WLAN_TYPE_MGR 0x00 #define WLAN_TYPE_CTL 0x01 #define WLAN_TYPE_DATA 0x02 @@ -125,7 +125,7 @@ #define WLAN_FTYPE_DATA 0x02 -// Frame Subtypes +/* Frame Subtypes */ #define WLAN_FSTYPE_ASSOCREQ 0x00 #define WLAN_FSTYPE_ASSOCRESP 0x01 #define WLAN_FSTYPE_REASSOCREQ 0x02 @@ -139,7 +139,7 @@ #define WLAN_FSTYPE_DEAUTHEN 0x0c #define WLAN_FSTYPE_ACTION 0x0d -// Control +/* Control */ #define WLAN_FSTYPE_PSPOLL 0x0a #define WLAN_FSTYPE_RTS 0x0b #define WLAN_FSTYPE_CTS 0x0c @@ -147,7 +147,7 @@ #define WLAN_FSTYPE_CFEND 0x0e #define WLAN_FSTYPE_CFENDCFACK 0x0f -// Data +/* Data */ #define WLAN_FSTYPE_DATAONLY 0x00 #define WLAN_FSTYPE_DATA_CFACK 0x01 #define WLAN_FSTYPE_DATA_CFPOLL 0x02 @@ -160,7 +160,7 @@ #ifdef __BIG_ENDIAN -// GET & SET Frame Control bit +/* GET & SET Frame Control bit */ #define WLAN_GET_FC_PRVER(n) ((((WORD)(n) >> 8) & (BIT0 | BIT1)) #define WLAN_GET_FC_FTYPE(n) ((((WORD)(n) >> 8) & (BIT2 | BIT3)) >> 2) #define WLAN_GET_FC_FSTYPE(n) ((((WORD)(n) >> 8) & (BIT4|BIT5|BIT6|BIT7)) >> 4) @@ -173,12 +173,12 @@ #define WLAN_GET_FC_ISWEP(n) ((((WORD)(n) << 8) & (BIT14)) >> 14) #define WLAN_GET_FC_ORDER(n) ((((WORD)(n) << 8) & (BIT15)) >> 15) -// Sequence Field bit +/* Sequence Field bit */ #define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n) >> 8) & (BIT0|BIT1|BIT2|BIT3)) #define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n) >> 8) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4) -// Capability Field bit +/* Capability Field bit */ #define WLAN_GET_CAP_INFO_ESS(n) (((n) >> 8) & BIT0) #define WLAN_GET_CAP_INFO_IBSS(n) ((((n) >> 8) & BIT1) >> 1) #define WLAN_GET_CAP_INFO_CFPOLLABLE(n) ((((n) >> 8) & BIT2) >> 2) @@ -195,7 +195,7 @@ #else -// GET & SET Frame Control bit +/* GET & SET Frame Control bit */ #define WLAN_GET_FC_PRVER(n) (((WORD)(n)) & (BIT0 | BIT1)) #define WLAN_GET_FC_FTYPE(n) ((((WORD)(n)) & (BIT2 | BIT3)) >> 2) #define WLAN_GET_FC_FSTYPE(n) ((((WORD)(n)) & (BIT4|BIT5|BIT6|BIT7)) >> 4) @@ -209,12 +209,12 @@ #define WLAN_GET_FC_ORDER(n) ((((WORD)(n)) & (BIT15)) >> 15) -// Sequence Field bit +/* Sequence Field bit */ #define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n)) & (BIT0|BIT1|BIT2|BIT3)) #define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n)) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4) -// Capability Field bit +/* Capability Field bit */ #define WLAN_GET_CAP_INFO_ESS(n) ((n) & BIT0) #define WLAN_GET_CAP_INFO_IBSS(n) (((n) & BIT1) >> 1) #define WLAN_GET_CAP_INFO_CFPOLLABLE(n) (((n) & BIT2) >> 2) @@ -229,7 +229,7 @@ #define WLAN_GET_CAP_INFO_GRPACK(n) (((n) & BIT14) >> 14) -#endif //#ifdef __BIG_ENDIAN +#endif /*#ifdef __BIG_ENDIAN */ #define WLAN_SET_CAP_INFO_ESS(n) (n) @@ -261,7 +261,7 @@ #define WLAN_SET_SEQ_FRGNUM(n) ((WORD)(n)) #define WLAN_SET_SEQ_SEQNUM(n) (((WORD)(n)) << 4) -// ERP Field bit +/* ERP Field bit */ #define WLAN_GET_ERP_NONERP_PRESENT(n) ((n) & BIT0) #define WLAN_GET_ERP_USE_PROTECTION(n) (((n) & BIT1) >> 1) @@ -273,19 +273,19 @@ -// Support & Basic Rates field +/* Support & Basic Rates field */ #define WLAN_MGMT_IS_BASICRATE(b) ((b) & BIT7) #define WLAN_MGMT_GET_RATE(b) ((b) & ~BIT7) -// TIM field +/* TIM field */ #define WLAN_MGMT_IS_MULTICAST_TIM(b) ((b) & BIT0) #define WLAN_MGMT_GET_TIM_OFFSET(b) (((b) & ~BIT0) >> 1) -// 3-Addr & 4-Addr +/* 3-Addr & 4-Addr */ #define WLAN_HDR_A3_DATA_PTR(p) (((PBYTE)(p)) + WLAN_HDR_ADDR3_LEN) #define WLAN_HDR_A4_DATA_PTR(p) (((PBYTE)(p)) + WLAN_HDR_ADDR4_LEN) -// IEEE ADDR +/* IEEE ADDR */ #define IEEE_ADDR_UNIVERSAL 0x02 #define IEEE_ADDR_GROUP 0x01 @@ -293,7 +293,7 @@ typedef struct { BYTE abyAddr[6]; } IEEE_ADDR, *PIEEE_ADDR; -// 802.11 Header Format +/* 802.11 Header Format */ typedef struct tagWLAN_80211HDR_A2 { @@ -302,7 +302,7 @@ typedef struct tagWLAN_80211HDR_A2 { BYTE abyAddr1[WLAN_ADDR_LEN]; BYTE abyAddr2[WLAN_ADDR_LEN]; -}__attribute__ ((__packed__)) +} __attribute__ ((__packed__)) WLAN_80211HDR_A2, *PWLAN_80211HDR_A2; typedef struct tagWLAN_80211HDR_A3 { @@ -327,7 +327,7 @@ typedef struct tagWLAN_80211HDR_A4 { WORD wSeqCtl; BYTE abyAddr4[WLAN_ADDR_LEN]; -}__attribute__ ((__packed__)) +} __attribute__ ((__packed__)) WLAN_80211HDR_A4, *PWLAN_80211HDR_A4; @@ -348,6 +348,6 @@ typedef union tagUWLAN_80211HDR { -#endif // __80211HDR_H__ +#endif /* __80211HDR_H__ */ diff --git a/drivers/staging/vt6655/iwctl.c b/drivers/staging/vt6655/iwctl.c index 78b49830a255..824466d5a659 100644 --- a/drivers/staging/vt6655/iwctl.c +++ b/drivers/staging/vt6655/iwctl.c @@ -699,7 +699,6 @@ if (pMgmt->eScanState == WMAC_IS_SCANNING) { if (wrq->sa_family != ARPHRD_ETHER) rc = -EINVAL; else { - memset(pMgmt->abyDesireBSSID, 0xFF, 6); memcpy(pMgmt->abyDesireBSSID, wrq->sa_data, 6); //2008-0409-05, <Add> by Einsn Liu if((pDevice->bLinkPass == TRUE) && @@ -889,7 +888,6 @@ if (pMgmt->eScanState == WMAC_IS_SCANNING) { BYTE abyTmpDesireSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1]; UINT ii , uSameBssidNum=0; - memset(abyTmpDesireSSID,0,sizeof(abyTmpDesireSSID)); memcpy(abyTmpDesireSSID,pMgmt->abyDesireSSID,sizeof(abyTmpDesireSSID)); pCurr = BSSpSearchBSSList(pDevice, NULL, diff --git a/drivers/staging/vt6656/iwctl.c b/drivers/staging/vt6656/iwctl.c index b7c6a22fe321..d7ed3b456339 100644 --- a/drivers/staging/vt6656/iwctl.c +++ b/drivers/staging/vt6656/iwctl.c @@ -758,7 +758,6 @@ int iwctl_siwap(struct net_device *dev, if (wrq->sa_family != ARPHRD_ETHER) rc = -EINVAL; else { - memset(pMgmt->abyDesireBSSID, 0xFF, 6); memcpy(pMgmt->abyDesireBSSID, wrq->sa_data, 6); //mike :add @@ -936,7 +935,6 @@ int iwctl_siwessid(struct net_device *dev, BYTE abyTmpDesireSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1]; UINT ii , uSameBssidNum=0; - memset(abyTmpDesireSSID,0,sizeof(abyTmpDesireSSID)); memcpy(abyTmpDesireSSID,pMgmt->abyDesireSSID,sizeof(abyTmpDesireSSID)); pCurr = BSSpSearchBSSList(pDevice, NULL, diff --git a/drivers/staging/wavelan/wavelan.c b/drivers/staging/wavelan/wavelan.c index f44ef351647b..f6b4e0933703 100644 --- a/drivers/staging/wavelan/wavelan.c +++ b/drivers/staging/wavelan/wavelan.c @@ -36,7 +36,7 @@ static u8 wv_irq_to_psa(int irq) /*------------------------------------------------------------------*/ /* - * Translate PSA irq parameter to irq number + * Translate PSA irq parameter to irq number */ static int __init wv_psa_to_irq(u8 irqval) { @@ -55,7 +55,7 @@ static int __init wv_psa_to_irq(u8 irqval) * * One major difference with the PCMCIA hardware (except the port mapping) * is that we have to keep the state of the Host Control Register - * because of the interrupt enable & bus size flags. + *because of the interrupt enable & bus size flags. */ /*------------------------------------------------------------------*/ @@ -64,7 +64,7 @@ static int __init wv_psa_to_irq(u8 irqval) */ static inline u16 hasr_read(unsigned long ioaddr) { - return (inw(HASR(ioaddr))); + return inw(HASR(ioaddr)); } /* hasr_read */ /*------------------------------------------------------------------*/ @@ -132,11 +132,11 @@ static inline void wv_16_on(unsigned long ioaddr, u16 hacr) * Disable interrupts on the WaveLAN hardware. * (called by wv_82586_stop()) */ -static inline void wv_ints_off(struct net_device * dev) +static inline void wv_ints_off(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; - + lp->hacr &= ~HACR_INTRON; hacr_write(ioaddr, lp->hacr); } /* wv_ints_off */ @@ -146,7 +146,7 @@ static inline void wv_ints_off(struct net_device * dev) * Enable interrupts on the WaveLAN hardware. * (called by wv_hw_reset()) */ -static inline void wv_ints_on(struct net_device * dev) +static inline void wv_ints_on(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -167,9 +167,11 @@ static inline void wv_ints_on(struct net_device * dev) /* * Read bytes from the PSA. */ -static void psa_read(unsigned long ioaddr, u16 hacr, int o, /* offset in PSA */ - u8 * b, /* buffer to fill */ - int n) +static void psa_read(unsigned long ioaddr, + u16 hacr, + int o, /* offset in PSA */ + u8 *b, /*buffer to fill */ + int n) { /* size to read */ wv_16_off(ioaddr, hacr); @@ -186,9 +188,11 @@ static void psa_read(unsigned long ioaddr, u16 hacr, int o, /* offset in PSA */ /* * Write the Parameter Storage Area to the WaveLAN card's memory. */ -static void psa_write(unsigned long ioaddr, u16 hacr, int o, /* Offset in PSA */ - u8 * b, /* Buffer in memory */ - int n) +static void psa_write(unsigned long ioaddr, + u16 hacr, + int o, /* Offset in PSA */ + u8 *b, /*buffer in memory */ + int n) { /* Length of buffer */ int count = 0; @@ -203,8 +207,8 @@ static void psa_write(unsigned long ioaddr, u16 hacr, int o, /* Offset in PSA */ /* Wait for the memory to finish its write cycle */ count = 0; - while ((count++ < 100) && - (hasr_read(ioaddr) & HASR_PSA_BUSY)) mdelay(1); + while ((count++ < 100) && (hasr_read(ioaddr) & HASR_PSA_BUSY)) + mdelay(1); } wv_16_on(ioaddr, hacr); @@ -221,8 +225,8 @@ static void psa_write(unsigned long ioaddr, u16 hacr, int o, /* Offset in PSA */ * The Windows drivers don't use the CRC, but the AP and the PtP tool * depend on it. */ -static u16 psa_crc(u8 * psa, /* The PSA */ - int size) +static u16 psa_crc(u8 *psa, /* The PSA */ + int size) { /* Number of short for CRC */ int byte_cnt; /* Loop on the PSA */ u16 crc_bytes = 0; /* Data in the PSA */ @@ -247,7 +251,9 @@ static u16 psa_crc(u8 * psa, /* The PSA */ /* * update the checksum field in the Wavelan's PSA */ -static void update_psa_checksum(struct net_device * dev, unsigned long ioaddr, u16 hacr) +static void update_psa_checksum(struct net_device *dev, + unsigned long ioaddr, + u16 hacr) { #ifdef SET_PSA_CRC psa_t psa; @@ -279,7 +285,8 @@ static void update_psa_checksum(struct net_device * dev, unsigned long ioaddr, u if (crc != 0) printk(KERN_WARNING - "%s: update_psa_checksum(): CRC does not agree with PSA data (even after recalculating)\n", + "%s: update_psa_checksum(): CRC does not \ + agree with PSA data (even after recalculating)\n", dev->name); #endif /* DEBUG_IOCTL_INFO */ #endif /* SET_PSA_CRC */ @@ -305,7 +312,7 @@ static void mmc_out(unsigned long ioaddr, u16 o, u8 d) * Routine to write bytes to the Modem Management Controller. * We start at the end because it is the way it should be! */ -static void mmc_write(unsigned long ioaddr, u8 o, u8 * b, int n) +static void mmc_write(unsigned long ioaddr, u8 o, u8 *b, int n) { o += n; b += n; @@ -340,7 +347,7 @@ static u8 mmc_in(unsigned long ioaddr, u16 o) * (code has just been moved in the above function) * We start at the end because it is the way it should be! */ -static inline void mmc_read(unsigned long ioaddr, u8 o, u8 * b, int n) +static inline void mmc_read(unsigned long ioaddr, u8 o, u8 *b, int n) { o += n; b += n; @@ -369,15 +376,16 @@ static inline int mmc_encr(unsigned long ioaddr) * Wait for the frequency EEPROM to complete a command. * I hope this one will be optimally inlined. */ -static inline void fee_wait(unsigned long ioaddr, /* I/O port of the card */ - int delay, /* Base delay to wait for */ +static inline void fee_wait(unsigned long ioaddr, /* I/O port of the card */ + int delay, /*base delay to wait for */ int number) { /* Number of time to wait */ int count = 0; /* Wait only a limited time */ while ((count++ < number) && (mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & - MMR_FEE_STATUS_BUSY)) udelay(delay); + MMR_FEE_STATUS_BUSY)) + udelay(delay); } /*------------------------------------------------------------------*/ @@ -386,7 +394,7 @@ static inline void fee_wait(unsigned long ioaddr, /* I/O port of the card */ */ static void fee_read(unsigned long ioaddr, /* I/O port of the card */ u16 o, /* destination offset */ - u16 * b, /* data buffer */ + u16 *b, /* data buffer */ int n) { /* number of registers */ b += n; /* Position at the end of the area */ @@ -414,12 +422,12 @@ static void fee_read(unsigned long ioaddr, /* I/O port of the card */ /* * Write bytes from the Frequency EEPROM (frequency select cards). * This is a bit complicated, because the frequency EEPROM has to - * be unprotected and the write enabled. + *be unprotected and the write enabled. * Jean II */ static void fee_write(unsigned long ioaddr, /* I/O port of the card */ u16 o, /* destination offset */ - u16 * b, /* data buffer */ + u16 *b, /* data buffer */ int n) { /* number of registers */ b += n; /* Position at the end of the area. */ @@ -473,7 +481,9 @@ static void fee_write(unsigned long ioaddr, /* I/O port of the card */ mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WRITE); - /* WaveLAN documentation says to wait at least 10 ms for EEBUSY = 0 */ + /* WaveLAN documentation says to + * wait at least 10 ms for EEBUSY = 0 + */ mdelay(10); fee_wait(ioaddr, 10, 100); } @@ -504,7 +514,7 @@ static void fee_write(unsigned long ioaddr, /* I/O port of the card */ * Why does inlining this function make it fail? */ static /*inline */ void obram_read(unsigned long ioaddr, - u16 o, u8 * b, int n) + u16 o, u8 *b, int n) { outw(o, PIOR1(ioaddr)); insw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1); @@ -514,7 +524,7 @@ static /*inline */ void obram_read(unsigned long ioaddr, /* * Write bytes to the on-board RAM. */ -static inline void obram_write(unsigned long ioaddr, u16 o, u8 * b, int n) +static inline void obram_write(unsigned long ioaddr, u16 o, u8 *b, int n) { outw(o, PIOR1(ioaddr)); outsw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1); @@ -524,7 +534,7 @@ static inline void obram_write(unsigned long ioaddr, u16 o, u8 * b, int n) /* * Acknowledge the reading of the status issued by the i82586. */ -static void wv_ack(struct net_device * dev) +static void wv_ack(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -566,7 +576,7 @@ static void wv_ack(struct net_device * dev) * Set channel attention bit and busy wait until command has * completed, then acknowledge completion of the command. */ -static int wv_synchronous_cmd(struct net_device * dev, const char *str) +static int wv_synchronous_cmd(struct net_device *dev, const char *str) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -613,7 +623,7 @@ static int wv_synchronous_cmd(struct net_device * dev, const char *str) * Check if done, and if OK. */ static int -wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp) +wv_config_complete(struct net_device *dev, unsigned long ioaddr, net_local * lp) { unsigned short mcs_addr; unsigned short status; @@ -641,7 +651,8 @@ wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp /* Check mc_config command */ if ((status & AC_SFLD_OK) != AC_SFLD_OK) printk(KERN_INFO - "%s: wv_config_complete(): set_multicast_address failed; status = 0x%x\n", + "%s: wv_config_complete(): \ + set_multicast_address failed; status = 0x%x\n", dev->name, status); /* check ia-config command */ @@ -650,7 +661,8 @@ wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp (unsigned char *) &status, sizeof(status)); if ((status & AC_SFLD_OK) != AC_SFLD_OK) printk(KERN_INFO - "%s: wv_config_complete(): set_MAC_address failed; status = 0x%x\n", + "%s: wv_config_complete(): set_MAC_address \ + failed; status = 0x%x\n", dev->name, status); /* Check config command. */ @@ -659,7 +671,8 @@ wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp (unsigned char *) &status, sizeof(status)); if ((status & AC_SFLD_OK) != AC_SFLD_OK) printk(KERN_INFO - "%s: wv_config_complete(): configure failed; status = 0x%x\n", + "%s: wv_config_complete(): configure failed; \ + status = 0x%x\n", dev->name, status); #endif /* DEBUG_CONFIG_ERROR */ @@ -680,7 +693,9 @@ wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp * (called in wavelan_interrupt()). * Note : the spinlock is already grabbed for us. */ -static int wv_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp) +static int wv_complete(struct net_device *dev, + unsigned long ioaddr, + net_local *lp) { int nreaped = 0; @@ -722,9 +737,8 @@ if (lp->tx_n_in_use > 0) /* Next one in the chain */ lp->tx_first_in_use += TXBLOCKZ; if (lp->tx_first_in_use >= - OFFSET_CU + - NTXBLOCKS * TXBLOCKZ) lp->tx_first_in_use -= - NTXBLOCKS * TXBLOCKZ; + OFFSET_CU + NTXBLOCKS * TXBLOCKZ) + lp->tx_first_in_use -= NTXBLOCKS * TXBLOCKZ; } /* Hack for reconfiguration */ @@ -741,7 +755,8 @@ if (lp->tx_n_in_use > 0) #ifdef DEBUG_TX_INFO if (ncollisions > 0) printk(KERN_DEBUG - "%s: wv_complete(): tx completed after %d collisions.\n", + "%s: wv_complete(): tx completed after \ + %d collisions.\n", dev->name, ncollisions); #endif } else { @@ -758,7 +773,8 @@ if (lp->tx_n_in_use > 0) dev->stats.tx_carrier_errors++; #ifdef DEBUG_TX_FAIL printk(KERN_DEBUG - "%s: wv_complete(): tx error: lost CTS.\n", + "%s: wv_complete(): tx error: \ + lost CTS.\n", dev->name); #endif } @@ -766,7 +782,8 @@ if (lp->tx_n_in_use > 0) dev->stats.tx_fifo_errors++; #ifdef DEBUG_TX_FAIL printk(KERN_DEBUG - "%s: wv_complete(): tx error: slow DMA.\n", + "%s: wv_complete(): tx error: \ + slow DMA.\n", dev->name); #endif } @@ -774,7 +791,8 @@ if (lp->tx_n_in_use > 0) dev->stats.tx_heartbeat_errors++; #ifdef DEBUG_TX_FAIL printk(KERN_DEBUG - "%s: wv_complete(): tx error: heart beat.\n", + "%s: wv_complete(): tx error: \ + heart beat.\n", dev->name); #endif } @@ -782,7 +800,8 @@ if (lp->tx_n_in_use > 0) dev->stats.tx_aborted_errors++; #ifdef DEBUG_TX_FAIL printk(KERN_DEBUG - "%s: wv_complete(): tx error: too many collisions.\n", + "%s: wv_complete(): tx error: \ + too many collisions.\n", dev->name); #endif } @@ -804,9 +823,9 @@ if (lp->tx_n_in_use > 0) /* * Inform upper layers. */ - if (lp->tx_n_in_use < NTXBLOCKS - 1) { + if (lp->tx_n_in_use < NTXBLOCKS - 1) netif_wake_queue(dev); - } + #ifdef DEBUG_INTERRUPT_TRACE printk(KERN_DEBUG "%s: <-wv_complete()\n", dev->name); #endif @@ -816,13 +835,13 @@ if (lp->tx_n_in_use > 0) /*------------------------------------------------------------------*/ /* * Reconfigure the i82586, or at least ask for it. - * Because wv_82586_config uses a transmission buffer, we must do it + *because wv_82586_config uses a transmission buffer, we must do it * when we are sure that there is one left, so we do it now * or in wavelan_packet_xmit() (I can't find any better place, * wavelan_interrupt is not an option), so you may experience * delays sometimes. */ -static void wv_82586_reconfig(struct net_device * dev) +static void wv_82586_reconfig(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long flags; @@ -831,13 +850,12 @@ static void wv_82586_reconfig(struct net_device * dev) lp->reconfig_82586 = 1; /* Check if we can do it now ! */ - if((netif_running(dev)) && !(netif_queue_stopped(dev))) { + if ((netif_running(dev)) && !(netif_queue_stopped(dev))) { spin_lock_irqsave(&lp->spinlock, flags); /* May fail */ wv_82586_config(dev); spin_unlock_irqrestore(&lp->spinlock, flags); - } - else { + } else { #ifdef DEBUG_CONFIG_INFO printk(KERN_DEBUG "%s: wv_82586_reconfig(): delayed (state = %lX)\n", @@ -857,7 +875,7 @@ static void wv_82586_reconfig(struct net_device * dev) /* * Print the formatted contents of the Parameter Storage Area. */ -static void wv_psa_show(psa_t * p) +static void wv_psa_show(psa_t *p) { printk(KERN_DEBUG "##### WaveLAN PSA contents: #####\n"); printk(KERN_DEBUG "psa_io_base_addr_1: 0x%02X %02X %02X %02X\n", @@ -919,13 +937,13 @@ static void wv_psa_show(psa_t * p) * Print the formatted status of the Modem Management Controller. * This function needs to be completed. */ -static void wv_mmc_show(struct net_device * dev) +static void wv_mmc_show(struct net_device *dev) { unsigned long ioaddr = dev->base_addr; net_local *lp = netdev_priv(dev); mmr_t m; - /* Basic check */ + /*basic check */ if (hasr_read(ioaddr) & HASR_NO_CLK) { printk(KERN_WARNING "%s: wv_mmc_show: modem not connected\n", @@ -935,7 +953,7 @@ static void wv_mmc_show(struct net_device * dev) /* Read the mmc */ mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1); - mmc_read(ioaddr, 0, (u8 *) & m, sizeof(m)); + mmc_read(ioaddr, 0, (u8 *) &m, sizeof(m)); mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0); /* Don't forget to update statistics */ @@ -1100,7 +1118,7 @@ static void wv_scb_show(unsigned long ioaddr) /* * Print the formatted status of the i82586's receive unit. */ -static void wv_ru_show(struct net_device * dev) +static void wv_ru_show(struct net_device *dev) { printk(KERN_DEBUG "##### WaveLAN i82586 receiver unit status: #####\n"); @@ -1115,7 +1133,7 @@ static void wv_ru_show(struct net_device * dev) /* * Display info about one control block of the i82586 memory. */ -static void wv_cu_show_one(struct net_device * dev, net_local * lp, int i, u16 p) +static void wv_cu_show_one(struct net_device *dev, net_local * lp, int i, u16 p) { unsigned long ioaddr; ac_tx_t actx; @@ -1144,7 +1162,7 @@ static void wv_cu_show_one(struct net_device * dev, net_local * lp, int i, u16 p /* * Print status of the command unit of the i82586. */ -static void wv_cu_show(struct net_device * dev) +static void wv_cu_show(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned int i; @@ -1170,7 +1188,7 @@ static void wv_cu_show(struct net_device * dev) /* * Print the formatted status of the WaveLAN PCMCIA device driver. */ -static void wv_dev_show(struct net_device * dev) +static void wv_dev_show(struct net_device *dev) { printk(KERN_DEBUG "dev:"); printk(" state=%lX,", dev->state); @@ -1184,7 +1202,7 @@ static void wv_dev_show(struct net_device * dev) * Print the formatted status of the WaveLAN PCMCIA device driver's * private information. */ -static void wv_local_show(struct net_device * dev) +static void wv_local_show(struct net_device *dev) { net_local *lp; @@ -1245,7 +1263,7 @@ static inline void wv_packet_info(u8 * p, /* Packet to dump */ * This is the information which is displayed by the driver at startup. * There are lots of flags for configuring it to your liking. */ -static void wv_init_info(struct net_device * dev) +static void wv_init_info(struct net_device *dev) { short ioaddr = dev->base_addr; net_local *lp = netdev_priv(dev); @@ -1355,7 +1373,7 @@ static void wv_init_info(struct net_device * dev) * num_addrs > 0 Multicast mode, receive normal and MC packets, * and do best-effort filtering. */ -static void wavelan_set_multicast_list(struct net_device * dev) +static void wavelan_set_multicast_list(struct net_device *dev) { net_local *lp = netdev_priv(dev); @@ -1425,7 +1443,7 @@ static void wavelan_set_multicast_list(struct net_device * dev) * (Note : it was a nice way to test the reconfigure stuff...) */ #ifdef SET_MAC_ADDRESS -static int wavelan_set_mac_address(struct net_device * dev, void *addr) +static int wavelan_set_mac_address(struct net_device *dev, void *addr) { struct sockaddr *mac = addr; @@ -1614,7 +1632,7 @@ static int wv_set_frequency(unsigned long ioaddr, /* I/O port of the card */ return 0; } else - return -EINVAL; /* Bah, never get there... */ + return -EINVAL; /*bah, never get there... */ } /*------------------------------------------------------------------*/ @@ -1663,7 +1681,7 @@ static int wv_frequency_list(unsigned long ioaddr, /* I/O port of the card */ * address with our list, and if they match, get the statistics. * Sorry, but this function really needs the wireless extensions. */ -static inline void wl_spy_gather(struct net_device * dev, +static inline void wl_spy_gather(struct net_device *dev, u8 * mac, /* MAC address */ u8 * stats) /* Statistics to gather */ { @@ -1689,7 +1707,7 @@ static inline void wl_spy_gather(struct net_device * dev, * With this histogram you may detect if one WaveLAN is really weak, * or you may also calculate the mean and standard deviation of the level. */ -static inline void wl_his_gather(struct net_device * dev, u8 * stats) +static inline void wl_his_gather(struct net_device *dev, u8 * stats) { /* Statistics to gather */ net_local *lp = netdev_priv(dev); u8 level = stats[0] & MMR_SIGNAL_LVL; @@ -1981,7 +1999,7 @@ static int wavelan_set_encode(struct net_device *dev, } if(!ret) { - /* Basic checking... */ + /*basic checking... */ if (wrqu->encoding.length == 8) { /* Copy the key in the driver */ memcpy(psa.psa_encryption_key, extra, @@ -2319,7 +2337,7 @@ static const iw_handler wavelan_handler[] = NULL, /* SIOCGIWTXPOW */ NULL, /* SIOCSIWRETRY */ NULL, /* SIOCGIWRETRY */ - /* Bummer ! Why those are only at the end ??? */ + /*bummer ! Why those are only at the end ??? */ wavelan_set_encode, /* SIOCSIWENCODE */ wavelan_get_encode, /* SIOCGIWENCODE */ }; @@ -2358,7 +2376,7 @@ static const struct iw_handler_def wavelan_handler_def = * Get wireless statistics. * Called by /proc/net/wireless */ -static iw_stats *wavelan_get_wireless_stats(struct net_device * dev) +static iw_stats *wavelan_get_wireless_stats(struct net_device *dev) { unsigned long ioaddr = dev->base_addr; net_local *lp = netdev_priv(dev); @@ -2434,7 +2452,7 @@ static iw_stats *wavelan_get_wireless_stats(struct net_device * dev) * (called by wv_packet_rcv()) */ static void -wv_packet_read(struct net_device * dev, u16 buf_off, int sksize) +wv_packet_read(struct net_device *dev, u16 buf_off, int sksize) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -2527,7 +2545,7 @@ wv_packet_read(struct net_device * dev, u16 buf_off, int sksize) * (called in wavelan_interrupt()). * Note : the spinlock is already grabbed for us. */ -static void wv_receive(struct net_device * dev) +static void wv_receive(struct net_device *dev) { unsigned long ioaddr = dev->base_addr; net_local *lp = netdev_priv(dev); @@ -2710,7 +2728,7 @@ static void wv_receive(struct net_device * dev) * * (called in wavelan_packet_xmit()) */ -static int wv_packet_write(struct net_device * dev, void *buf, short length) +static int wv_packet_write(struct net_device *dev, void *buf, short length) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -2842,7 +2860,7 @@ static int wv_packet_write(struct net_device * dev, void *buf, short length) * to send the packet. */ static netdev_tx_t wavelan_packet_xmit(struct sk_buff *skb, - struct net_device * dev) + struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long flags; @@ -2854,7 +2872,7 @@ static netdev_tx_t wavelan_packet_xmit(struct sk_buff *skb, #endif /* - * Block a timer-based transmit from overlapping. + *block a timer-based transmit from overlapping. * In other words, prevent reentering this routine. */ netif_stop_queue(dev); @@ -2905,7 +2923,7 @@ static netdev_tx_t wavelan_packet_xmit(struct sk_buff *skb, * Routine to initialize the Modem Management Controller. * (called by wv_hw_reset()) */ -static int wv_mmc_init(struct net_device * dev) +static int wv_mmc_init(struct net_device *dev) { unsigned long ioaddr = dev->base_addr; net_local *lp = netdev_priv(dev); @@ -3077,7 +3095,7 @@ static int wv_mmc_init(struct net_device * dev) * Start the receive unit. * (called by wv_hw_reset()) */ -static int wv_ru_start(struct net_device * dev) +static int wv_ru_start(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -3159,8 +3177,8 @@ static int wv_ru_start(struct net_device * dev) * self-loop of the first transmit block. * * Here we create the list of send buffers used to transmit packets - * between the PC and the command unit. For each buffer, we create a - * buffer descriptor (pointing on the buffer), a transmit command + *between the PC and the command unit. For each buffer, we create a + *buffer descriptor (pointing on the buffer), a transmit command * (pointing to the buffer descriptor) and a NOP command. * The transmit command is linked to the NOP, and the NOP to itself. * When we will have finished executing the transmit command, we will @@ -3169,7 +3187,7 @@ static int wv_ru_start(struct net_device * dev) * * (called by wv_hw_reset()) */ -static int wv_cu_start(struct net_device * dev) +static int wv_cu_start(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -3270,7 +3288,7 @@ static int wv_cu_start(struct net_device * dev) * * (called by wv_hw_reset()) */ -static int wv_82586_start(struct net_device * dev) +static int wv_82586_start(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -3402,7 +3420,7 @@ static int wv_82586_start(struct net_device * dev) * * (called by wv_hw_reset(), wv_82586_reconfig(), wavelan_packet_xmit()) */ -static void wv_82586_config(struct net_device * dev) +static void wv_82586_config(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -3449,7 +3467,7 @@ static void wv_82586_config(struct net_device * dev) tx_addr = txblock; nop_addr = tx_addr + sizeof(tx); tbd_addr = nop_addr + sizeof(nop); - cfg_addr = tbd_addr + sizeof(tbd_t); /* beginning of the buffer */ + cfg_addr = tbd_addr + sizeof(tbd_t); /*beginning of the buffer */ ias_addr = cfg_addr + sizeof(cfg); mcs_addr = ias_addr + sizeof(ias); @@ -3578,7 +3596,7 @@ static void wv_82586_config(struct net_device * dev) * WaveLAN controller (i82586). * (called by wavelan_close()) */ -static void wv_82586_stop(struct net_device * dev) +static void wv_82586_stop(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -3615,7 +3633,7 @@ static void wv_82586_stop(struct net_device * dev) * 5. Start the LAN controller's receive unit * (called by wavelan_interrupt(), wavelan_watchdog() & wavelan_open()) */ -static int wv_hw_reset(struct net_device * dev) +static int wv_hw_reset(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long ioaddr = dev->base_addr; @@ -3939,7 +3957,7 @@ static void wavelan_watchdog(struct net_device * dev) * Configure and start up the WaveLAN PCMCIA adaptor. * Called by NET3 when it "opens" the device. */ -static int wavelan_open(struct net_device * dev) +static int wavelan_open(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long flags; @@ -3994,7 +4012,7 @@ static int wavelan_open(struct net_device * dev) * Shut down the WaveLAN ISA card. * Called by NET3 when it "closes" the device. */ -static int wavelan_close(struct net_device * dev) +static int wavelan_close(struct net_device *dev) { net_local *lp = netdev_priv(dev); unsigned long flags; @@ -4040,7 +4058,7 @@ static const struct net_device_ops wavelan_netdev_ops = { /*------------------------------------------------------------------*/ /* * Probe an I/O address, and if the WaveLAN is there configure the - * device structure + *device structure * (called by wavelan_probe() and via init_module()). */ static int __init wavelan_config(struct net_device *dev, unsigned short ioaddr) @@ -4114,7 +4132,7 @@ static int __init wavelan_config(struct net_device *dev, unsigned short ioaddr) memset(netdev_priv(dev), 0, sizeof(net_local)); lp = netdev_priv(dev); - /* Back link to the device structure. */ + /*back link to the device structure. */ lp->dev = dev; /* Add the device at the beginning of the linked list. */ lp->next = wavelan_list; @@ -4377,7 +4395,7 @@ MODULE_LICENSE("GPL"); * * Please send bug reports, updates, comments to: * - * Bruce Janson Email: bruce@cs.usyd.edu.au - * Basser Department of Computer Science Phone: +61-2-9351-3423 + *bruce Janson Email: bruce@cs.usyd.edu.au + *basser Department of Computer Science Phone: +61-2-9351-3423 * University of Sydney, N.S.W., 2006, AUSTRALIA Fax: +61-2-9351-3838 */ diff --git a/drivers/staging/winbond/README b/drivers/staging/winbond/README index cb944e4bf174..27710241fc14 100644 --- a/drivers/staging/winbond/README +++ b/drivers/staging/winbond/README @@ -2,6 +2,7 @@ TODO: - sparse cleanups - checkpatch cleanups - kerneldoc cleanups + - fix severeCamelCaseInfestation - remove typedefs - remove unused ioctls - use cfg80211 for regulatory stuff diff --git a/drivers/staging/winbond/mds.c b/drivers/staging/winbond/mds.c index 37e0c185d113..65063c33618d 100644 --- a/drivers/staging/winbond/mds.c +++ b/drivers/staging/winbond/mds.c @@ -43,53 +43,53 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor pT01 = (PT01_DESCRIPTOR)(buffer+4); pNextT00 = (PT00_DESCRIPTOR)(buffer+OffsetSize); - if( buffer[ DOT_11_DA_OFFSET+8 ] & 0x1 ) // +8 for USB hdr + if( buffer[ DOT_11_DA_OFFSET+8 ] & 0x1 ) /* +8 for USB hdr */ boGroupAddr = true; - //======================================== - // Set RTS/CTS mechanism - //======================================== + /****************************************** + * Set RTS/CTS mechanism + ******************************************/ if (!boGroupAddr) { - //NOTE : If the protection mode is enabled and the MSDU will be fragmented, - // the tx rates of MPDUs will all be DSSS rates. So it will not use - // CTS-to-self in this case. CTS-To-self will only be used when without - // fragmentation. -- 20050112 - BodyLen = (u16)pT00->T00_frame_length; //include 802.11 header - BodyLen += 4; //CRC + /* NOTE : If the protection mode is enabled and the MSDU will be fragmented, + * the tx rates of MPDUs will all be DSSS rates. So it will not use + * CTS-to-self in this case. CTS-To-self will only be used when without + * fragmentation. -- 20050112 */ + BodyLen = (u16)pT00->T00_frame_length; /* include 802.11 header */ + BodyLen += 4; /* CRC */ if( BodyLen >= CURRENT_RTS_THRESHOLD ) - RTS_on = true; // Using RTS + RTS_on = true; /* Using RTS */ else { - if( pT01->T01_modulation_type ) // Is using OFDM + if( pT01->T01_modulation_type ) /* Is using OFDM */ { - if( CURRENT_PROTECT_MECHANISM ) // Is using protect - CTS_on = true; // Using CTS + if( CURRENT_PROTECT_MECHANISM ) /* Is using protect */ + CTS_on = true; /* Using CTS */ } } } if( RTS_on || CTS_on ) { - if( pT01->T01_modulation_type) // Is using OFDM + if( pT01->T01_modulation_type) /* Is using OFDM */ { - //CTS duration - // 2 SIFS + DATA transmit time + 1 ACK - // ACK Rate : 24 Mega bps - // ACK frame length = 14 bytes + /* CTS duration + * 2 SIFS + DATA transmit time + 1 ACK + * ACK Rate : 24 Mega bps + * ACK frame length = 14 bytes */ Duration = 2*DEFAULT_SIFSTIME + 2*PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION + ((BodyLen*8 + 22 + Rate*4 - 1)/(Rate*4))*Tsym + ((112 + 22 + 95)/96)*Tsym; } - else //DSSS + else /* DSSS */ { - //CTS duration - // 2 SIFS + DATA transmit time + 1 ACK - // Rate : ?? Mega bps - // ACK frame length = 14 bytes - if( pT01->T01_plcp_header_length ) //long preamble + /* CTS duration + * 2 SIFS + DATA transmit time + 1 ACK + * Rate : ?? Mega bps + * ACK frame length = 14 bytes */ + if( pT01->T01_plcp_header_length ) /* long preamble */ Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME*2; else Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME*2; @@ -100,21 +100,21 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor if( RTS_on ) { - if( pT01->T01_modulation_type ) // Is using OFDM + if( pT01->T01_modulation_type ) /* Is using OFDM */ { - //CTS + 1 SIFS + CTS duration - //CTS Rate : 24 Mega bps - //CTS frame length = 14 bytes + /* CTS + 1 SIFS + CTS duration + * CTS Rate : 24 Mega bps + * CTS frame length = 14 bytes */ Duration += (DEFAULT_SIFSTIME + PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION + ((112 + 22 + 95)/96)*Tsym); } else { - //CTS + 1 SIFS + CTS duration - //CTS Rate : ?? Mega bps - //CTS frame length = 14 bytes - if( pT01->T01_plcp_header_length ) //long preamble + /* CTS + 1 SIFS + CTS duration + * CTS Rate : ?? Mega bps + * CTS frame length = 14 bytes */ + if( pT01->T01_plcp_header_length ) /* long preamble */ Duration += LONG_PREAMBLE_PLUS_PLCPHEADER_TIME; else Duration += SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME; @@ -123,15 +123,15 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor } } - // Set the value into USB descriptor + /* Set the value into USB descriptor */ pT01->T01_add_rts = RTS_on ? 1 : 0; pT01->T01_add_cts = CTS_on ? 1 : 0; pT01->T01_rts_cts_duration = Duration; } - //===================================== - // Fill the more fragment descriptor - //===================================== + /****************************************** + * Fill the more fragment descriptor + ******************************************/ if( boGroupAddr ) Duration = 0; else @@ -139,14 +139,14 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor for( i=pDes->FragmentCount-1; i>0; i-- ) { NextBodyLen = (u16)pNextT00->T00_frame_length; - NextBodyLen += 4; //CRC + NextBodyLen += 4; /* CRC */ if( pT01->T01_modulation_type ) { - //OFDM - // data transmit time + 3 SIFS + 2 ACK - // Rate : ??Mega bps - // ACK frame length = 14 bytes, tx rate = 24M + /* OFDM + * data transmit time + 3 SIFS + 2 ACK + * Rate : ??Mega bps + * ACK frame length = 14 bytes, tx rate = 24M */ Duration = PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION * 3; Duration += (((NextBodyLen*8 + 22 + Rate*4 - 1)/(Rate*4)) * Tsym + (((2*14)*8 + 22 + 95)/96)*Tsym + @@ -154,12 +154,12 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor } else { - //DSSS - // data transmit time + 2 ACK + 3 SIFS - // Rate : ??Mega bps - // ACK frame length = 14 bytes - //TODO : - if( pT01->T01_plcp_header_length ) //long preamble + /* DSSS + * data transmit time + 2 ACK + 3 SIFS + * Rate : ??Mega bps + * ACK frame length = 14 bytes + * TODO : */ + if( pT01->T01_plcp_header_length ) /* long preamble */ Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME*3; else Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME*3; @@ -168,39 +168,39 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor DEFAULT_SIFSTIME*3 ); } - ((u16 *)buffer)[5] = cpu_to_le16(Duration);// 4 USHOR for skip 8B USB, 2USHORT=FC + Duration + ((u16 *)buffer)[5] = cpu_to_le16(Duration); /* 4 USHOR for skip 8B USB, 2USHORT=FC + Duration */ - //----20061009 add by anson's endian + /* ----20061009 add by anson's endian */ pNextT00->value = cpu_to_le32(pNextT00->value); pT01->value = cpu_to_le32( pT01->value ); - //----end 20061009 add by anson's endian + /* ----end 20061009 add by anson's endian */ buffer += OffsetSize; pT01 = (PT01_DESCRIPTOR)(buffer+4); - if (i != 1) //The last fragment will not have the next fragment + if (i != 1) /* The last fragment will not have the next fragment */ pNextT00 = (PT00_DESCRIPTOR)(buffer+OffsetSize); } - //===================================== - // Fill the last fragment descriptor - //===================================== + /******************************************* + * Fill the last fragment descriptor + *******************************************/ if( pT01->T01_modulation_type ) { - //OFDM - // 1 SIFS + 1 ACK - // Rate : 24 Mega bps - // ACK frame length = 14 bytes + /* OFDM + * 1 SIFS + 1 ACK + * Rate : 24 Mega bps + * ACK frame length = 14 bytes */ Duration = PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION; - //The Tx rate of ACK use 24M + /* The Tx rate of ACK use 24M */ Duration += (((112 + 22 + 95)/96)*Tsym + DEFAULT_SIFSTIME ); } else { - // DSSS - // 1 ACK + 1 SIFS - // Rate : ?? Mega bps - // ACK frame length = 14 bytes(112 bits) - if( pT01->T01_plcp_header_length ) //long preamble + /* DSSS + * 1 ACK + 1 SIFS + * Rate : ?? Mega bps + * ACK frame length = 14 bytes(112 bits) */ + if( pT01->T01_plcp_header_length ) /* long preamble */ Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME; else Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME; @@ -209,14 +209,14 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor } } - ((u16 *)buffer)[5] = cpu_to_le16(Duration);// 4 USHOR for skip 8B USB, 2USHORT=FC + Duration + ((u16 *)buffer)[5] = cpu_to_le16(Duration); /* 4 USHOR for skip 8B USB, 2USHORT=FC + Duration */ pT00->value = cpu_to_le32(pT00->value); pT01->value = cpu_to_le32(pT01->value); - //--end 20061009 add + /* --end 20061009 add */ } -// The function return the 4n size of usb pk +/* The function return the 4n size of usb pk */ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDes, u8 *TargetBuffer) { PT00_DESCRIPTOR pT00; @@ -229,8 +229,8 @@ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDe u8 buf_index, FragmentCount = 0; - // Copy fragment body - buffer = TargetBuffer; // shift 8B usb + 24B 802.11 + /* Copy fragment body */ + buffer = TargetBuffer; /* shift 8B usb + 24B 802.11 */ SizeLeft = pDes->buffer_total_size; buf_index = pDes->buffer_start_index; @@ -240,35 +240,35 @@ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDe CopySize = SizeLeft; if (SizeLeft > pDes->FragmentThreshold) { CopySize = pDes->FragmentThreshold; - pT00->T00_frame_length = 24 + CopySize;//Set USB length + pT00->T00_frame_length = 24 + CopySize; /* Set USB length */ } else - pT00->T00_frame_length = 24 + SizeLeft;//Set USB length + pT00->T00_frame_length = 24 + SizeLeft; /* Set USB length */ SizeLeft -= CopySize; - // 1 Byte operation + /* 1 Byte operation */ pctmp = (u8 *)( buffer + 8 + DOT_11_SEQUENCE_OFFSET ); *pctmp &= 0xf0; - *pctmp |= FragmentCount;//931130.5.m + *pctmp |= FragmentCount; /* 931130.5.m */ if( !FragmentCount ) pT00->T00_first_mpdu = 1; - buffer += 32; // 8B usb + 24B 802.11 header + buffer += 32; /* 8B usb + 24B 802.11 header */ Size += 32; - // Copy into buffer + /* Copy into buffer */ stmp = CopySize + 3; - stmp &= ~0x03;//4n Alignment - Size += stmp;// Current 4n offset of mpdu + stmp &= ~0x03; /* 4n Alignment */ + Size += stmp; /* Current 4n offset of mpdu */ while (CopySize) { - // Copy body + /* Copy body */ src_buffer = pDes->buffer_address[buf_index]; CopyLeft = CopySize; if (CopySize >= pDes->buffer_size[buf_index]) { CopyLeft = pDes->buffer_size[buf_index]; - // Get the next buffer of descriptor + /* Get the next buffer of descriptor */ buf_index++; buf_index %= MAX_DESCRIPTOR_BUFFER_INDEX; } else { @@ -283,14 +283,14 @@ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDe CopySize -= CopyLeft; } - // 931130.5.n + /* 931130.5.n */ if (pMds->MicAdd) { if (!SizeLeft) { pMds->MicWriteAddress[ pMds->MicWriteIndex ] = buffer - pMds->MicAdd; pMds->MicWriteSize[ pMds->MicWriteIndex ] = pMds->MicAdd; pMds->MicAdd = 0; } - else if( SizeLeft < 8 ) //931130.5.p + else if( SizeLeft < 8 ) /* 931130.5.p */ { pMds->MicAdd = SizeLeft; pMds->MicWriteAddress[ pMds->MicWriteIndex ] = buffer - ( 8 - SizeLeft ); @@ -299,10 +299,10 @@ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDe } } - // Does it need to generate the new header for next mpdu? + /* Does it need to generate the new header for next mpdu? */ if (SizeLeft) { - buffer = TargetBuffer + Size; // Get the next 4n start address - memcpy( buffer, TargetBuffer, 32 );//Copy 8B USB +24B 802.11 + buffer = TargetBuffer + Size; /* Get the next 4n start address */ + memcpy( buffer, TargetBuffer, 32 ); /* Copy 8B USB +24B 802.11 */ pT00 = (PT00_DESCRIPTOR)buffer; pT00->T00_first_mpdu = 0; } @@ -312,16 +312,16 @@ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDe pT00->T00_last_mpdu = 1; pT00->T00_IsLastMpdu = 1; - buffer = (u8 *)pT00 + 8; // +8 for USB hdr - buffer[1] &= ~0x04; // Clear more frag bit of 802.11 frame control - pDes->FragmentCount = FragmentCount; // Update the correct fragment number + buffer = (u8 *)pT00 + 8; /* +8 for USB hdr */ + buffer[1] &= ~0x04; /* Clear more frag bit of 802.11 frame control */ + pDes->FragmentCount = FragmentCount; /* Update the correct fragment number */ return Size; } static void Mds_HeaderCopy(struct wbsoft_priv * adapter, struct wb35_descriptor *pDes, u8 *TargetBuffer) { struct wb35_mds *pMds = &adapter->Mds; - u8 *src_buffer = pDes->buffer_address[0];//931130.5.g + u8 *src_buffer = pDes->buffer_address[0]; /* 931130.5.g */ PT00_DESCRIPTOR pT00; PT01_DESCRIPTOR pT01; u16 stmp; @@ -330,44 +330,44 @@ static void Mds_HeaderCopy(struct wbsoft_priv * adapter, struct wb35_descriptor stmp = pDes->buffer_total_size; - // - // Set USB header 8 byte - // + /* + * Set USB header 8 byte + */ pT00 = (PT00_DESCRIPTOR)TargetBuffer; TargetBuffer += 4; pT01 = (PT01_DESCRIPTOR)TargetBuffer; TargetBuffer += 4; - pT00->value = 0;// Clear - pT01->value = 0;// Clear + pT00->value = 0; /* Clear */ + pT01->value = 0; /* Clear */ - pT00->T00_tx_packet_id = pDes->Descriptor_ID;// Set packet ID - pT00->T00_header_length = 24;// Set header length - pT01->T01_retry_abort_ebable = 1;//921013 931130.5.h + pT00->T00_tx_packet_id = pDes->Descriptor_ID; /* Set packet ID */ + pT00->T00_header_length = 24; /* Set header length */ + pT01->T01_retry_abort_ebable = 1; /* 921013 931130.5.h */ - // Key ID setup + /* Key ID setup */ pT01->T01_wep_id = 0; - FragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD; //Do not fragment - // Copy full data, the 1'st buffer contain all the data 931130.5.j - memcpy( TargetBuffer, src_buffer, DOT_11_MAC_HEADER_SIZE );// Copy header + FragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD; /* Do not fragment */ + /* Copy full data, the 1'st buffer contain all the data 931130.5.j */ + memcpy( TargetBuffer, src_buffer, DOT_11_MAC_HEADER_SIZE ); /* Copy header */ pDes->buffer_address[0] = src_buffer + DOT_11_MAC_HEADER_SIZE; pDes->buffer_total_size -= DOT_11_MAC_HEADER_SIZE; pDes->buffer_size[0] = pDes->buffer_total_size; - // Set fragment threshold + /* Set fragment threshold */ FragmentThreshold -= (DOT_11_MAC_HEADER_SIZE + 4); pDes->FragmentThreshold = FragmentThreshold; - // Set more frag bit - TargetBuffer[1] |= 0x04;// Set more frag bit + /* Set more frag bit */ + TargetBuffer[1] |= 0x04; /* Set more frag bit */ - // - // Set tx rate - // - stmp = *(u16 *)(TargetBuffer+30); // 2n alignment address + /* + * Set tx rate + */ + stmp = *(u16 *)(TargetBuffer+30); /* 2n alignment address */ - //Use basic rate + /* Use basic rate */ ctmp1 = ctmpf = CURRENT_TX_RATE_FOR_MNG; pDes->TxRate = ctmp1; @@ -381,10 +381,10 @@ static void Mds_HeaderCopy(struct wbsoft_priv * adapter, struct wb35_descriptor if( i == 1 ) ctmp1 = ctmpf; - pMds->TxRate[pDes->Descriptor_ID][i] = ctmp1; // backup the ta rate and fall back rate + pMds->TxRate[pDes->Descriptor_ID][i] = ctmp1; /* backup the ta rate and fall back rate */ if( ctmp1 == 108) ctmp2 = 7; - else if( ctmp1 == 96 ) ctmp2 = 6; // Rate convert for USB + else if( ctmp1 == 96 ) ctmp2 = 6; /* Rate convert for USB */ else if( ctmp1 == 72 ) ctmp2 = 5; else if( ctmp1 == 48 ) ctmp2 = 4; else if( ctmp1 == 36 ) ctmp2 = 3; @@ -394,7 +394,7 @@ static void Mds_HeaderCopy(struct wbsoft_priv * adapter, struct wb35_descriptor else if( ctmp1 == 22 ) ctmp2 = 3; else if( ctmp1 == 11 ) ctmp2 = 2; else if( ctmp1 == 4 ) ctmp2 = 1; - else ctmp2 = 0; // if( ctmp1 == 2 ) or default + else ctmp2 = 0; /* if( ctmp1 == 2 ) or default */ if( i == 0 ) pT01->T01_transmit_rate = ctmp2; @@ -402,14 +402,14 @@ static void Mds_HeaderCopy(struct wbsoft_priv * adapter, struct wb35_descriptor pT01->T01_fall_back_rate = ctmp2; } - // - // Set preamble type - // - if ((pT01->T01_modulation_type == 0) && (pT01->T01_transmit_rate == 0)) // RATE_1M + /* + * Set preamble type + */ + if ((pT01->T01_modulation_type == 0) && (pT01->T01_transmit_rate == 0)) /* RATE_1M */ pDes->PreambleMode = WLAN_PREAMBLE_TYPE_LONG; else pDes->PreambleMode = CURRENT_PREAMBLE_MODE; - pT01->T01_plcp_header_length = pDes->PreambleMode; // Set preamble + pT01->T01_plcp_header_length = pDes->PreambleMode; /* Set preamble */ } @@ -431,21 +431,21 @@ Mds_Tx(struct wbsoft_priv * adapter) if (!hal_driver_init_OK(pHwData)) return; - //Only one thread can be run here + /* Only one thread can be run here */ if (atomic_inc_return(&pMds->TxThreadCount) != 1) goto cleanup; - // Start to fill the data + /* Start to fill the data */ do { FillIndex = pMds->TxFillIndex; - if (pMds->TxOwner[FillIndex]) { // Is owned by software 0:Yes 1:No + if (pMds->TxOwner[FillIndex]) { /* Is owned by software 0:Yes 1:No */ #ifdef _PE_TX_DUMP_ printk("[Mds_Tx] Tx Owner is H/W.\n"); #endif break; } - XmitBufAddress = pMds->pTxBuffer + (MAX_USB_TX_BUFFER * FillIndex); //Get buffer + XmitBufAddress = pMds->pTxBuffer + (MAX_USB_TX_BUFFER * FillIndex); /* Get buffer */ XmitBufSize = 0; FillCount = 0; do { @@ -453,37 +453,37 @@ Mds_Tx(struct wbsoft_priv * adapter) if (!PacketSize) break; - //For Check the buffer resource + /* For Check the buffer resource */ FragmentThreshold = CURRENT_FRAGMENT_THRESHOLD; - //931130.5.b + /* 931130.5.b */ FragmentCount = PacketSize/FragmentThreshold + 1; - stmp = PacketSize + FragmentCount*32 + 8;//931130.5.c 8:MIC + stmp = PacketSize + FragmentCount*32 + 8; /* 931130.5.c 8:MIC */ if ((XmitBufSize + stmp) >= MAX_USB_TX_BUFFER) { printk("[Mds_Tx] Excess max tx buffer.\n"); - break; // buffer is not enough + break; /* buffer is not enough */ } - // - // Start transmitting - // + /* + * Start transmitting + */ BufferFilled = true; /* Leaves first u8 intact */ memset((u8 *)pTxDes + 1, 0, sizeof(struct wb35_descriptor) - 1); - TxDesIndex = pMds->TxDesIndex;//Get the current ID + TxDesIndex = pMds->TxDesIndex; /* Get the current ID */ pTxDes->Descriptor_ID = TxDesIndex; - pMds->TxDesFrom[ TxDesIndex ] = 2;//Storing the information of source comming from + pMds->TxDesFrom[ TxDesIndex ] = 2; /* Storing the information of source comming from */ pMds->TxDesIndex++; pMds->TxDesIndex %= MAX_USB_TX_DESCRIPTOR; MLME_GetNextPacket( adapter, pTxDes ); - // Copy header. 8byte USB + 24byte 802.11Hdr. Set TxRate, Preamble type + /* Copy header. 8byte USB + 24byte 802.11Hdr. Set TxRate, Preamble type */ Mds_HeaderCopy( adapter, pTxDes, XmitBufAddress ); - // For speed up Key setting + /* For speed up Key setting */ if (pTxDes->EapFix) { #ifdef _PE_TX_DUMP_ printk("35: EPA 4th frame detected. Size = %d\n", PacketSize); @@ -491,41 +491,41 @@ Mds_Tx(struct wbsoft_priv * adapter) pHwData->IsKeyPreSet = 1; } - // Copy (fragment) frame body, and set USB, 802.11 hdr flag + /* Copy (fragment) frame body, and set USB, 802.11 hdr flag */ CurrentSize = Mds_BodyCopy(adapter, pTxDes, XmitBufAddress); - // Set RTS/CTS and Normal duration field into buffer + /* Set RTS/CTS and Normal duration field into buffer */ Mds_DurationSet(adapter, pTxDes, XmitBufAddress); - //Shift to the next address + /* Shift to the next address */ XmitBufSize += CurrentSize; XmitBufAddress += CurrentSize; #ifdef _IBSS_BEACON_SEQ_STICK_ - if ((XmitBufAddress[ DOT_11_DA_OFFSET+8 ] & 0xfc) != MAC_SUBTYPE_MNGMNT_PROBE_REQUEST) // +8 for USB hdr + if ((XmitBufAddress[ DOT_11_DA_OFFSET+8 ] & 0xfc) != MAC_SUBTYPE_MNGMNT_PROBE_REQUEST) /* +8 for USB hdr */ #endif pMds->TxToggle = true; - // Get packet to transmit completed, 1:TESTSTA 2:MLME 3: Ndis data + /* Get packet to transmit completed, 1:TESTSTA 2:MLME 3: Ndis data */ MLME_SendComplete(adapter, 0, true); - // Software TSC count 20060214 + /* Software TSC count 20060214 */ pMds->TxTsc++; if (pMds->TxTsc == 0) pMds->TxTsc_2++; - FillCount++; // 20060928 - } while (HAL_USB_MODE_BURST(pHwData)); // End of multiple MSDU copy loop. false = single true = multiple sending + FillCount++; /* 20060928 */ + } while (HAL_USB_MODE_BURST(pHwData)); /* End of multiple MSDU copy loop. false = single true = multiple sending */ - // Move to the next one, if necessary + /* Move to the next one, if necessary */ if (BufferFilled) { - // size setting + /* size setting */ pMds->TxBufferSize[ FillIndex ] = XmitBufSize; - // 20060928 set Tx count + /* 20060928 set Tx count */ pMds->TxCountInBuffer[FillIndex] = FillCount; - // Set owner flag + /* Set owner flag */ pMds->TxOwner[FillIndex] = 1; pMds->TxFillIndex++; @@ -534,14 +534,14 @@ Mds_Tx(struct wbsoft_priv * adapter) } else break; - if (!PacketSize) // No more pk for transmitting + if (!PacketSize) /* No more pk for transmitting */ break; } while(true); - // - // Start to send by lower module - // + /* + * Start to send by lower module + */ if (!pHwData->IsKeyPreSet) Wb35Tx_start(adapter); @@ -558,20 +558,20 @@ Mds_SendComplete(struct wbsoft_priv * adapter, PT02_DESCRIPTOR pT02) unsigned char SendOK = true; u8 RetryCount, TxRate; - if (pT02->T02_IgnoreResult) // Don't care the result + if (pT02->T02_IgnoreResult) /* Don't care the result */ return; if (pT02->T02_IsLastMpdu) { - //TODO: DTO -- get the retry count and fragment count - // Tx rate + /* TODO: DTO -- get the retry count and fragment count */ + /* Tx rate */ TxRate = pMds->TxRate[ PacketId ][ 0 ]; RetryCount = (u8)pT02->T02_MPDU_Cnt; if (pT02->value & FLAG_ERROR_TX_MASK) { SendOK = false; if (pT02->T02_transmit_abort || pT02->T02_out_of_MaxTxMSDULiftTime) { - //retry error + /* retry error */ pHwData->dto_tx_retry_count += (RetryCount+1); - //[for tx debug] + /* [for tx debug] */ if (RetryCount<7) pHwData->tx_retry_count[RetryCount] += RetryCount; else @@ -583,7 +583,7 @@ Mds_SendComplete(struct wbsoft_priv * adapter, PT02_DESCRIPTOR pT02) } pHwData->dto_tx_frag_count += (RetryCount+1); - //[for tx debug] + /* [for tx debug] */ if (pT02->T02_transmit_abort_due_to_TBTT) pHwData->tx_TBTT_start_count++; if (pT02->T02_transmit_without_encryption_due_to_wep_on_false) @@ -596,7 +596,7 @@ Mds_SendComplete(struct wbsoft_priv * adapter, PT02_DESCRIPTOR pT02) MTO_SetTxCount(adapter, TxRate, RetryCount); } - // Clear send result buffer + /* Clear send result buffer */ pMds->TxResult[ PacketId ] = 0; } else pMds->TxResult[ PacketId ] |= ((u16)(pT02->value & 0x0ffff)); diff --git a/drivers/staging/wlan-ng/hfa384x_usb.c b/drivers/staging/wlan-ng/hfa384x_usb.c index 5df56f0238d6..2400242e2d87 100644 --- a/drivers/staging/wlan-ng/hfa384x_usb.c +++ b/drivers/staging/wlan-ng/hfa384x_usb.c @@ -62,9 +62,9 @@ * * hfa384x_drvr_xxxconfig An example of the drvr level abstraction. These * functions are wrappers for the RID get/set -* sequence. They call copy_[to|from]_bap() and -* cmd_access(). These functions operate on the -* RIDs and buffers without validation. The caller +* sequence. They call copy_[to|from]_bap() and +* cmd_access(). These functions operate on the +* RIDs and buffers without validation. The caller * is responsible for that. * * API wrapper functions: @@ -144,7 +144,6 @@ enum cmd_mode { DOWAIT = 0, DOASYNC }; -typedef enum cmd_mode CMD_MODE; #define THROTTLE_JIFFIES (HZ/8) #define URB_ASYNC_UNLINK 0 @@ -206,12 +205,11 @@ static void unlocked_usbctlx_complete(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx); struct usbctlx_completor { int (*complete) (struct usbctlx_completor *); }; -typedef struct usbctlx_completor usbctlx_completor_t; static int hfa384x_usbctlx_complete_sync(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx, - usbctlx_completor_t *completor); + struct usbctlx_completor *completor); static int unlocked_usbctlx_cancel_async(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx); @@ -232,13 +230,13 @@ usbctlx_get_rridresult(const hfa384x_usb_rridresp_t *rridresp, /* Low level req/resp CTLX formatters and submitters */ static int hfa384x_docmd(hfa384x_t *hw, - CMD_MODE mode, + enum cmd_mode mode, hfa384x_metacmd_t *cmd, ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data); static int hfa384x_dorrid(hfa384x_t *hw, - CMD_MODE mode, + enum cmd_mode mode, u16 rid, void *riddata, unsigned int riddatalen, @@ -246,7 +244,7 @@ hfa384x_dorrid(hfa384x_t *hw, static int hfa384x_dowrid(hfa384x_t *hw, - CMD_MODE mode, + enum cmd_mode mode, u16 rid, void *riddata, unsigned int riddatalen, @@ -254,7 +252,7 @@ hfa384x_dowrid(hfa384x_t *hw, static int hfa384x_dormem(hfa384x_t *hw, - CMD_MODE mode, + enum cmd_mode mode, u16 page, u16 offset, void *data, @@ -263,7 +261,7 @@ hfa384x_dormem(hfa384x_t *hw, static int hfa384x_dowmem(hfa384x_t *hw, - CMD_MODE mode, + enum cmd_mode mode, u16 page, u16 offset, void *data, @@ -351,7 +349,8 @@ static int submit_rx_urb(hfa384x_t *hw, gfp_t memflags) hw->rx_urb_skb = skb; result = -ENOLINK; - if (!hw->wlandev->hwremoved && !test_bit(WORK_RX_HALT, &hw->usb_flags)) { + if (!hw->wlandev->hwremoved && + !test_bit(WORK_RX_HALT, &hw->usb_flags)) { result = SUBMIT_URB(&hw->rx_urb, memflags); /* Check whether we need to reset the RX pipe */ @@ -451,7 +450,7 @@ static void hfa384x_usb_defer(struct work_struct *data) if (test_bit(WORK_RX_HALT, &hw->usb_flags)) { int ret; - usb_kill_urb(&hw->rx_urb); /* Cannot be holding spinlock! */ + usb_kill_urb(&hw->rx_urb); /* Cannot be holding spinlock! */ ret = usb_clear_halt(hw->usb, hw->endp_in); if (ret != 0) { @@ -668,26 +667,26 @@ usbctlx_get_rridresult(const hfa384x_usb_rridresp_t *rridresp, * when processing a CTLX that returns a hfa384x_cmdresult_t structure. ----------------------------------------------------------------*/ struct usbctlx_cmd_completor { - usbctlx_completor_t head; + struct usbctlx_completor head; const hfa384x_usb_cmdresp_t *cmdresp; hfa384x_cmdresult_t *result; }; -typedef struct usbctlx_cmd_completor usbctlx_cmd_completor_t; -static int usbctlx_cmd_completor_fn(usbctlx_completor_t *head) +static inline int usbctlx_cmd_completor_fn(struct usbctlx_completor *head) { - usbctlx_cmd_completor_t *complete = (usbctlx_cmd_completor_t *) head; + struct usbctlx_cmd_completor *complete; + + complete = (struct usbctlx_cmd_completor *) head; return usbctlx_get_status(complete->cmdresp, complete->result); } -static inline usbctlx_completor_t *init_cmd_completor(usbctlx_cmd_completor_t * - completor, - const - hfa384x_usb_cmdresp_t * - cmdresp, - hfa384x_cmdresult_t * - result) +static inline struct usbctlx_completor *init_cmd_completor( + struct usbctlx_cmd_completor + *completor, + const hfa384x_usb_cmdresp_t + *cmdresp, + hfa384x_cmdresult_t *result) { completor->head.complete = usbctlx_cmd_completor_fn; completor->cmdresp = cmdresp; @@ -701,19 +700,19 @@ static inline usbctlx_completor_t *init_cmd_completor(usbctlx_cmd_completor_t * * when processing a CTLX that reads a RID. ----------------------------------------------------------------*/ struct usbctlx_rrid_completor { - usbctlx_completor_t head; + struct usbctlx_completor head; const hfa384x_usb_rridresp_t *rridresp; void *riddata; unsigned int riddatalen; }; -typedef struct usbctlx_rrid_completor usbctlx_rrid_completor_t; -static int usbctlx_rrid_completor_fn(usbctlx_completor_t *head) +static int usbctlx_rrid_completor_fn(struct usbctlx_completor *head) { - usbctlx_rrid_completor_t *complete = (usbctlx_rrid_completor_t *) head; + struct usbctlx_rrid_completor *complete; hfa384x_rridresult_t rridresult; + complete = (struct usbctlx_rrid_completor *) head; usbctlx_get_rridresult(complete->rridresp, &rridresult); /* Validate the length, note body len calculation in bytes */ @@ -729,12 +728,13 @@ static int usbctlx_rrid_completor_fn(usbctlx_completor_t *head) return 0; } -static inline usbctlx_completor_t *init_rrid_completor(usbctlx_rrid_completor_t - *completor, - const - hfa384x_usb_rridresp_t * - rridresp, void *riddata, - unsigned int riddatalen) +static inline struct usbctlx_completor *init_rrid_completor( + struct usbctlx_rrid_completor + *completor, + const hfa384x_usb_rridresp_t + *rridresp, + void *riddata, + unsigned int riddatalen) { completor->head.complete = usbctlx_rrid_completor_fn; completor->rridresp = rridresp; @@ -747,14 +747,14 @@ static inline usbctlx_completor_t *init_rrid_completor(usbctlx_rrid_completor_t * Completor object: * Interprets the results of a synchronous RID-write ----------------------------------------------------------------*/ -typedef usbctlx_cmd_completor_t usbctlx_wrid_completor_t; +typedef struct usbctlx_cmd_completor usbctlx_wrid_completor_t; #define init_wrid_completor init_cmd_completor /*---------------------------------------------------------------- * Completor object: * Interprets the results of a synchronous memory-write ----------------------------------------------------------------*/ -typedef usbctlx_cmd_completor_t usbctlx_wmem_completor_t; +typedef struct usbctlx_cmd_completor usbctlx_wmem_completor_t; #define init_wmem_completor init_cmd_completor /*---------------------------------------------------------------- @@ -762,7 +762,7 @@ typedef usbctlx_cmd_completor_t usbctlx_wmem_completor_t; * Interprets the results of a synchronous memory-read ----------------------------------------------------------------*/ struct usbctlx_rmem_completor { - usbctlx_completor_t head; + struct usbctlx_completor head; const hfa384x_usb_rmemresp_t *rmemresp; void *data; @@ -770,7 +770,7 @@ struct usbctlx_rmem_completor { }; typedef struct usbctlx_rmem_completor usbctlx_rmem_completor_t; -static int usbctlx_rmem_completor_fn(usbctlx_completor_t *head) +static int usbctlx_rmem_completor_fn(struct usbctlx_completor *head) { usbctlx_rmem_completor_t *complete = (usbctlx_rmem_completor_t *) head; @@ -779,11 +779,13 @@ static int usbctlx_rmem_completor_fn(usbctlx_completor_t *head) return 0; } -static inline usbctlx_completor_t *init_rmem_completor(usbctlx_rmem_completor_t - *completor, - hfa384x_usb_rmemresp_t - *rmemresp, void *data, - unsigned int len) +static inline struct usbctlx_completor *init_rmem_completor( + usbctlx_rmem_completor_t + *completor, + hfa384x_usb_rmemresp_t + *rmemresp, + void *data, + unsigned int len) { completor->head.complete = usbctlx_rmem_completor_fn; completor->rmemresp = rmemresp; @@ -1226,7 +1228,7 @@ int hfa384x_corereset(hfa384x_t *hw, int holdtime, int settletime, int genesis) * * Arguments: * hw device structure -* ctlx CTLX ptr +* ctlx CTLX ptr * completor functor object to decide what to * do with the CTLX's result. * @@ -1244,7 +1246,7 @@ int hfa384x_corereset(hfa384x_t *hw, int holdtime, int settletime, int genesis) ----------------------------------------------------------------*/ static int hfa384x_usbctlx_complete_sync(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx, - usbctlx_completor_t *completor) + struct usbctlx_completor *completor) { unsigned long flags; int result; @@ -1359,7 +1361,7 @@ cleanup: ----------------------------------------------------------------*/ static int hfa384x_docmd(hfa384x_t *hw, - CMD_MODE mode, + enum cmd_mode mode, hfa384x_metacmd_t *cmd, ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data) { @@ -1394,7 +1396,7 @@ hfa384x_docmd(hfa384x_t *hw, if (result != 0) { kfree(ctlx); } else if (mode == DOWAIT) { - usbctlx_cmd_completor_t completor; + struct usbctlx_cmd_completor completor; result = hfa384x_usbctlx_complete_sync(hw, ctlx, @@ -1448,7 +1450,7 @@ done: ----------------------------------------------------------------*/ static int hfa384x_dorrid(hfa384x_t *hw, - CMD_MODE mode, + enum cmd_mode mode, u16 rid, void *riddata, unsigned int riddatalen, @@ -1481,7 +1483,7 @@ hfa384x_dorrid(hfa384x_t *hw, if (result != 0) { kfree(ctlx); } else if (mode == DOWAIT) { - usbctlx_rrid_completor_t completor; + struct usbctlx_rrid_completor completor; result = hfa384x_usbctlx_complete_sync(hw, ctlx, @@ -1506,7 +1508,7 @@ done: * * Arguments: * hw device structure -* CMD_MODE DOWAIT or DOASYNC +* enum cmd_mode DOWAIT or DOASYNC * rid RID code * riddata Data portion of RID formatted for MAC * riddatalen Length of the data portion in bytes @@ -1529,7 +1531,7 @@ done: ----------------------------------------------------------------*/ static int hfa384x_dowrid(hfa384x_t *hw, - CMD_MODE mode, + enum cmd_mode mode, u16 rid, void *riddata, unsigned int riddatalen, @@ -1616,7 +1618,7 @@ done: ----------------------------------------------------------------*/ static int hfa384x_dormem(hfa384x_t *hw, - CMD_MODE mode, + enum cmd_mode mode, u16 page, u16 offset, void *data, @@ -1707,7 +1709,7 @@ done: ----------------------------------------------------------------*/ static int hfa384x_dowmem(hfa384x_t *hw, - CMD_MODE mode, + enum cmd_mode mode, u16 page, u16 offset, void *data, @@ -2075,12 +2077,9 @@ int hfa384x_drvr_flashdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len) (j * HFA384x_USB_RWMEM_MAXLEN); writepage = HFA384x_ADDR_CMD_MKPAGE(dlbufaddr + - (j * - HFA384x_USB_RWMEM_MAXLEN)); - writeoffset = - HFA384x_ADDR_CMD_MKOFF(dlbufaddr + - (j * - HFA384x_USB_RWMEM_MAXLEN)); + (j * HFA384x_USB_RWMEM_MAXLEN)); + writeoffset = HFA384x_ADDR_CMD_MKOFF(dlbufaddr + + (j * HFA384x_USB_RWMEM_MAXLEN)); writelen = burnlen - (j * HFA384x_USB_RWMEM_MAXLEN); writelen = writelen > HFA384x_USB_RWMEM_MAXLEN ? @@ -2133,7 +2132,7 @@ exit_proc: * 0 success * >0 f/w reported error - f/w status code * <0 driver reported error -* -ENODATA length mismatch between argument and retrieved +* -ENODATA length mismatch between argument and retrieved * record. * * Side effects: @@ -2451,7 +2450,9 @@ int hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, unsigned int len) currpage = HFA384x_ADDR_CMD_MKPAGE(pdaloc[i].cardaddr); curroffset = HFA384x_ADDR_CMD_MKOFF(pdaloc[i].cardaddr); - result = hfa384x_dormem_wait(hw, currpage, curroffset, buf, len); /* units of bytes */ + /* units of bytes */ + result = hfa384x_dormem_wait(hw, currpage, curroffset, buf, + len); if (result) { printk(KERN_WARNING @@ -2611,20 +2612,19 @@ int hfa384x_drvr_start(hfa384x_t *hw) if (result1 != 0) { if (result2 != 0) { printk(KERN_ERR - "cmd_initialize() failed on two attempts, results %d and %d\n", - result1, result2); + "cmd_initialize() failed on two attempts," + " results %d and %d\n", result1, result2); usb_kill_urb(&hw->rx_urb); goto done; } else { pr_debug("First cmd_initialize() failed (result %d),\n", result1); - pr_debug - ("but second attempt succeeded. All should be ok\n"); + pr_debug("but second attempt succeeded." + " All should be ok\n"); } } else if (result2 != 0) { - printk(KERN_WARNING - "First cmd_initialize() succeeded, but second attempt failed (result=%d)\n", - result2); + printk(KERN_WARNING "First cmd_initialize() succeeded," + " but second attempt failed (result=%d)\n", result2); printk(KERN_WARNING "Most likely the card will be functional\n"); goto done; @@ -3382,8 +3382,9 @@ retry: * our request has been acknowledged. Odd, * but our OUT URB is still alive... */ - pr_debug - ("Causality violation: please reboot Universe, or email linux-wlan-devel@lists.linux-wlan.com\n"); + pr_debug("Causality violation: " + "please reboot Universe, or email " + "linux-wlan-devel@lists.linux-wlan.com\n"); ctlx->state = CTLX_RESP_COMPLETE; break; @@ -3442,7 +3443,7 @@ static void hfa384x_usbin_txcompl(wlandevice_t *wlandev, { u16 status; - status = le16_to_cpu(usbin->type); /* yeah I know it says type... */ + status = le16_to_cpu(usbin->type); /* yeah I know it says type... */ /* Was there an error? */ if (HFA384x_TXSTATUS_ISERROR(status)) @@ -3583,7 +3584,7 @@ static void hfa384x_int_rxmonitor(wlandevice_t *wlandev, struct sk_buff *skb; hfa384x_t *hw = wlandev->priv; - /* Don't forget the status, time, and data_len fields are in host order */ + /* Remember the status, time, and data_len fields are in host order */ /* Figure out how big the frame is */ fc = le16_to_cpu(rxdesc->frame_control); hdrlen = p80211_headerlen(fc); @@ -3632,7 +3633,8 @@ static void hfa384x_int_rxmonitor(wlandevice_t *wlandev, caphdr->encoding = htonl(1); /* cck */ } - /* Copy the 802.11 header to the skb (ctl frames may be less than a full header) */ + /* Copy the 802.11 header to the skb + (ctl frames may be less than a full header) */ datap = skb_put(skb, hdrlen); memcpy(datap, &(rxdesc->frame_control), hdrlen); @@ -3644,7 +3646,8 @@ static void hfa384x_int_rxmonitor(wlandevice_t *wlandev, /* check for unencrypted stuff if WEP bit set. */ if (*(datap - hdrlen + 1) & 0x40) /* wep set */ if ((*(datap) == 0xaa) && (*(datap + 1) == 0xaa)) - *(datap - hdrlen + 1) &= 0xbf; /* clear wep; it's the 802.2 header! */ + /* clear wep; it's the 802.2 header! */ + *(datap - hdrlen + 1) &= 0xbf; } if (hw->sniff_fcs) { @@ -3845,10 +3848,10 @@ retry: default: /* This is NOT a valid CTLX "success" state! */ - printk(KERN_ERR - "Illegal CTLX[%d] success state(%s, %d) in OUT URB\n", - le16_to_cpu(ctlx->outbuf.type), - ctlxstr(ctlx->state), urb->status); + printk(KERN_ERR "Illegal CTLX[%d]" + " success state(%s, %d) in OUT URB\n", + le16_to_cpu(ctlx->outbuf.type), + ctlxstr(ctlx->state), urb->status); break; } /* switch */ } else { diff --git a/drivers/staging/wlan-ng/p80211req.c b/drivers/staging/wlan-ng/p80211req.c index e1e7bf1bf27c..207f080cfc9e 100644 --- a/drivers/staging/wlan-ng/p80211req.c +++ b/drivers/staging/wlan-ng/p80211req.c @@ -107,7 +107,8 @@ int p80211req_dorequest(wlandevice_t *wlandev, u8 *msgbuf) } /* Check Permissions */ - if (!capable(CAP_NET_ADMIN) && (msg->msgcode != DIDmsg_dot11req_mibget)) { + if (!capable(CAP_NET_ADMIN) && + (msg->msgcode != DIDmsg_dot11req_mibget)) { printk(KERN_ERR "%s: only dot11req_mibget allowed for non-root.\n", wlandev->name); @@ -128,7 +129,7 @@ int p80211req_dorequest(wlandevice_t *wlandev, u8 *msgbuf) wlandev->mlmerequest(wlandev, msg); clear_bit(1, &(wlandev->request_pending)); - return result; /* if result==0, msg->status still may contain an err */ + return result; /* if result==0, msg->status still may contain an err */ } /*---------------------------------------------------------------- diff --git a/drivers/staging/wlan-ng/p80211wext.c b/drivers/staging/wlan-ng/p80211wext.c index 83f1d6cd7991..dc72661f0661 100644 --- a/drivers/staging/wlan-ng/p80211wext.c +++ b/drivers/staging/wlan-ng/p80211wext.c @@ -49,7 +49,6 @@ #include <linux/uaccess.h> #include <asm/byteorder.h> #include <linux/if_ether.h> -#include <linux/bitops.h> #include "p80211types.h" #include "p80211hdr.h" |