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authorH Hartley Sweeten <hartleys@visionengravers.com>2010-06-25 10:33:34 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2010-06-25 11:18:34 -0700
commit12513b76a021e5b41a9d5d5981da75dfd6480890 (patch)
tree5caf2011ae543eeb5fd4005d20e5a11565527bb8
parent7d0f940ee0de7dc6355473e428335a4d74de43ad (diff)
Staging: dt3155: remove unused 32-bit and 8-bit global registers
All of the board 32-bit registers and 8-bit i2c registers are either read before writing to them or they are just written to with a new value. There is no reason to keep a 'local' copy of any of them. As a first step to removing them, get rid of all the ones that are not used in the driver. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Scott Smedley <ss@aao.gov.au> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--drivers/staging/dt3155/dt3155_io.c25
-rw-r--r--drivers/staging/dt3155/dt3155_io.h25
2 files changed, 0 insertions, 50 deletions
diff --git a/drivers/staging/dt3155/dt3155_io.c b/drivers/staging/dt3155/dt3155_io.c
index 485cc5e7b16b..b2f2f1e74110 100644
--- a/drivers/staging/dt3155/dt3155_io.c
+++ b/drivers/staging/dt3155/dt3155_io.c
@@ -33,25 +33,12 @@ u32 even_dma_start_r; /* bit 0 should always be 0 */
u32 odd_dma_start_r; /* .. */
u32 even_dma_stride_r; /* bits 0&1 should always be 0 */
u32 odd_dma_stride_r; /* .. */
-u32 even_pixel_fmt_r;
-u32 odd_pixel_fmt_r;
-FIFO_TRIGGER_R fifo_trigger_r;
-XFER_MODE_R xfer_mode_r;
CSR1_R csr1_r;
-RETRY_WAIT_CNT_R retry_wait_cnt_r;
INT_CSR_R int_csr_r;
-u32 even_fld_mask_r;
-u32 odd_fld_mask_r;
-
-MASK_LENGTH_R mask_length_r;
-FIFO_FLAG_CNT_R fifo_flag_cnt_r;
-IIC_CLK_DUR_R iic_clk_dur_r;
IIC_CSR1_R iic_csr1_r;
IIC_CSR2_R iic_csr2_r;
-DMA_UPPER_LMT_R even_dma_upper_lmt_r;
-DMA_UPPER_LMT_R odd_dma_upper_lmt_r;
@@ -59,18 +46,6 @@ DMA_UPPER_LMT_R odd_dma_upper_lmt_r;
I2C_CSR2 i2c_csr2;
I2C_EVEN_CSR i2c_even_csr;
I2C_ODD_CSR i2c_odd_csr;
-I2C_CONFIG i2c_config;
-u8 i2c_dt_id;
-u8 i2c_x_clip_start;
-u8 i2c_y_clip_start;
-u8 i2c_x_clip_end;
-u8 i2c_y_clip_end;
-u8 i2c_ad_addr;
-u8 i2c_ad_lut;
-I2C_AD_CMD i2c_ad_cmd;
-u8 i2c_dig_out;
-u8 i2c_pm_lut_addr;
-u8 i2c_pm_lut_data;
/*
* wait_ibsyclr()
diff --git a/drivers/staging/dt3155/dt3155_io.h b/drivers/staging/dt3155/dt3155_io.h
index a9aa75405dfc..730e30a70cb8 100644
--- a/drivers/staging/dt3155/dt3155_io.h
+++ b/drivers/staging/dt3155/dt3155_io.h
@@ -213,25 +213,12 @@ extern u32 even_dma_start_r; /* bit 0 should always be 0 */
extern u32 odd_dma_start_r; /* .. */
extern u32 even_dma_stride_r; /* bits 0&1 should always be 0 */
extern u32 odd_dma_stride_r; /* .. */
-extern u32 even_pixel_fmt_r;
-extern u32 odd_pixel_fmt_r;
-extern FIFO_TRIGGER_R fifo_trigger_r;
-extern XFER_MODE_R xfer_mode_r;
extern CSR1_R csr1_r;
-extern RETRY_WAIT_CNT_R retry_wait_cnt_r;
extern INT_CSR_R int_csr_r;
-extern u32 even_fld_mask_r;
-extern u32 odd_fld_mask_r;
-
-extern MASK_LENGTH_R mask_length_r;
-extern FIFO_FLAG_CNT_R fifo_flag_cnt_r;
-extern IIC_CLK_DUR_R iic_clk_dur_r;
extern IIC_CSR1_R iic_csr1_r;
extern IIC_CSR2_R iic_csr2_r;
-extern DMA_UPPER_LMT_R even_dma_upper_lmt_r;
-extern DMA_UPPER_LMT_R odd_dma_upper_lmt_r;
@@ -330,18 +317,6 @@ typedef union i2c_ad_cmd_tag {
extern I2C_CSR2 i2c_csr2;
extern I2C_EVEN_CSR i2c_even_csr;
extern I2C_ODD_CSR i2c_odd_csr;
-extern I2C_CONFIG i2c_config;
-extern u8 i2c_dt_id;
-extern u8 i2c_x_clip_start;
-extern u8 i2c_y_clip_start;
-extern u8 i2c_x_clip_end;
-extern u8 i2c_y_clip_end;
-extern u8 i2c_ad_addr;
-extern u8 i2c_ad_lut;
-extern I2C_AD_CMD i2c_ad_cmd;
-extern u8 i2c_dig_out;
-extern u8 i2c_pm_lut_addr;
-extern u8 i2c_pm_lut_data;
/* Functions for Global use */