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authorJaiprakash Singh <b44839@freescale.com>2015-05-20 21:17:11 -0500
committerScott Wood <scottwood@freescale.com>2015-08-07 22:59:34 -0500
commitcf184dc2dd33847f4b211b01d8c7ec0526e6c5e4 (patch)
treefc8bfced6f839edc21c9548d81697f7de17cdf86 /Documentation/devicetree/bindings/memory-controllers
parent3fa647bff31fe7b8818a40742506d47d0dc7f8f5 (diff)
fsl_ifc: Change IO accessor based on endianness
IFC IO accressor are set at run time based on IFC IP registers endianness.IFC node in DTS file contains information about endianness. Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/memory-controllers')
-rw-r--r--Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
index d5e370450ac0..89427b018ba7 100644
--- a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
@@ -18,6 +18,8 @@ Properties:
interrupt (NAND_EVTER_STAT). If there is only one,
that interrupt reports both types of event.
+- little-endian : If this property is absent, the big-endian mode will
+ be in use as default for registers.
- ranges : Each range corresponds to a single chipselect, and covers
the entire access window as configured.
@@ -34,6 +36,7 @@ Example:
#size-cells = <1>;
reg = <0x0 0xffe1e000 0 0x2000>;
interrupts = <16 2 19 2>;
+ little-endian;
/* NOR, NAND Flashes and CPLD on board */
ranges = <0x0 0x0 0x0 0xee000000 0x02000000