Merge branch 'remotes/lorenzo/pci/dwc'

- Add qcom ipq806x support (Ansuel Smith)

- Support max-link-speed DT property for qcom (Sham Muthayyan)

- Use PCI core #defines instead of adding qcom-specific ones (Ansuel Smith)

- Convert to devm_platform_ioremap_resource_byname() instead of open-coding
  platform_get_resource_byname() and devm_ioremap_resource() for dra7xx,
  keystone, artpec6, designware-plat, histb, intel-gw, kirin, qcom,
  uniphier (Dejin Zheng)

- Remove non-ECAM HiSilicon hip05/hip06 driver (Rob Herring)

* remotes/lorenzo/pci/dwc:
  PCI: dwc: hisi: Remove non-ECAM HiSilicon hip05/hip06 driver
  PCI: dwc: Convert to devm_platform_ioremap_resource_byname()
  PCI: qcom: Replace define with standard value
  PCI: qcom: Support pci speed set for ipq806x
  dt-bindings: PCI: qcom: Add ipq8064 rev 2 variant
  PCI: qcom: Add ipq8064 rev2 variant
  PCI: qcom: Add support for tx term offset for rev 2.1.0
  PCI: qcom: Define some PARF params needed for ipq8064 SoC
  PCI: qcom: Use bulk clk api and assert on error
  dt-bindings: PCI: qcom: Add ext reset
  PCI: qcom: Add missing reset for ipq806x
  PCI: qcom: Change duplicate PCI reset to phy reset
  dt-bindings: PCI: qcom: Add missing clks
  PCI: qcom: Add missing ipq806x clocks in PCIe driver

1 files changed, 11 insertions, 4 deletions

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
index 981b4de12807..02bc81bb8b2d 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
@@ -5,6 +5,7 @@
 	Value type: <stringlist>
 	Definition: Value should contain
 			- "qcom,pcie-ipq8064" for ipq8064
+			- "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
 			- "qcom,pcie-apq8064" for apq8064
 			- "qcom,pcie-apq8084" for apq8084
 			- "qcom,pcie-msm8996" for msm8996 or apq8096
@@ -90,6 +91,8 @@
 	Definition: Should contain the following entries
 			- "core"	Clocks the pcie hw block
 			- "phy"		Clocks the pcie PHY block
+			- "aux" 	Clocks the pcie AUX block
+			- "ref" 	Clocks the pcie ref block
 - clock-names:
 	Usage: required for apq8084/ipq4019
 	Value type: <stringlist>
@@ -177,6 +180,7 @@
 			- "pwr"			PWR reset
 			- "ahb"			AHB reset
 			- "phy_ahb"		PHY AHB reset
+			- "ext"			EXT reset
 
 - reset-names:
 	Usage: required for ipq8074
@@ -277,14 +281,17 @@
 				<0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
 		clocks = <&gcc PCIE_A_CLK>,
 			 <&gcc PCIE_H_CLK>,
-			 <&gcc PCIE_PHY_CLK>;
-		clock-names = "core", "iface", "phy";
+			 <&gcc PCIE_PHY_CLK>,
+			 <&gcc PCIE_AUX_CLK>,
+			 <&gcc PCIE_ALT_REF_CLK>;
+		clock-names = "core", "iface", "phy", "aux", "ref";
 		resets = <&gcc PCIE_ACLK_RESET>,
 			 <&gcc PCIE_HCLK_RESET>,
 			 <&gcc PCIE_POR_RESET>,
 			 <&gcc PCIE_PCI_RESET>,
-			 <&gcc PCIE_PHY_RESET>;
-		reset-names = "axi", "ahb", "por", "pci", "phy";
+			 <&gcc PCIE_PHY_RESET>,
+			 <&gcc PCIE_EXT_RESET>;
+		reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
 		pinctrl-0 = <&pcie_pins_default>;
 		pinctrl-names = "default";
 	};