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author | Beata Michalska <beata.michalska@arm.com> | 2021-06-03 15:06:27 +0100 |
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committer | Peter Zijlstra <peterz@infradead.org> | 2021-06-24 09:07:51 +0200 |
commit | adf3c31e18b765ea24eba7b0c1efc076b8ee3d55 (patch) | |
tree | 097810c605920c329f9549d0dc595b2e46f67b85 /Documentation/scheduler/sched-capacity.rst | |
parent | c744dc4ab58d1c09624ca3397cf15b142a0e0cb7 (diff) |
sched/doc: Update the CPU capacity asymmetry bits
Update the documentation bits referring to capacity aware scheduling
with regards to newly introduced SD_ASYM_CPUCAPACITY_FULL sched_domain
flag.
Signed-off-by: Beata Michalska <beata.michalska@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Valentin Schneider <valentin.schneider@arm.com>
Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Link: https://lore.kernel.org/r/20210603140627.8409-4-beata.michalska@arm.com
Diffstat (limited to 'Documentation/scheduler/sched-capacity.rst')
-rw-r--r-- | Documentation/scheduler/sched-capacity.rst | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/Documentation/scheduler/sched-capacity.rst b/Documentation/scheduler/sched-capacity.rst index 9b7cbe43b2d1..805f85f330b5 100644 --- a/Documentation/scheduler/sched-capacity.rst +++ b/Documentation/scheduler/sched-capacity.rst @@ -284,8 +284,10 @@ whether the system exhibits asymmetric CPU capacities. Should that be the case: - The sched_asym_cpucapacity static key will be enabled. -- The SD_ASYM_CPUCAPACITY flag will be set at the lowest sched_domain level that - spans all unique CPU capacity values. +- The SD_ASYM_CPUCAPACITY_FULL flag will be set at the lowest sched_domain + level that spans all unique CPU capacity values. +- The SD_ASYM_CPUCAPACITY flag will be set for any sched_domain that spans + CPUs with any range of asymmetry. The sched_asym_cpucapacity static key is intended to guard sections of code that cater to asymmetric CPU capacity systems. Do note however that said key is |