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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-12-14 12:55:35 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-12-14 12:55:35 -0800 |
| commit | 9e7f25886bdf16679d3d72624003bef5ef7dc785 (patch) | |
| tree | 2915503966897e32787a1654f85ad2217708a3ae /Documentation | |
| parent | 9e4b0d55d84a66dbfede56890501dc96e696059c (diff) | |
| parent | f84b799996e29ad3b37e83f7871e79023f29979d (diff) | |
Merge tag 'edac_updates_for_v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC updates from Borislav Petkov:
"Somewhat busier than usual this cycle:
- Add support for AST2400 and AST2600 hw to aspeed_edac (Troy Lee)
- Remove an orphaned mv64x60_edac driver. Good riddance (Michael
Ellerman)
- Add a new igen6 driver for Intel client SoCs with an integrated
memory controller and using in-band ECC (Qiuxu Zhuo and Tony Luck)
- The usual smattering of fixes and cleanups all over"
* tag 'edac_updates_for_v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
EDAC/mv64x60: Remove orphan mv64x60 driver
EDAC/aspeed: Add support for AST2400 and AST2600
ARM: dts: aspeed: Add AST2600 EDAC into common devicetree
dt-bindings: edac: aspeed-sdram-edac: Add ast2400/ast2600 support
EDAC/amd64: Fix PCI component registration
EDAC/igen6: ecclog_llist can be static
EDAC/i10nm: Add Intel Sapphire Rapids server support
EDAC: Add DDR5 new memory type
EDAC/i10nm: Use readl() to access MMIO registers
MAINTAINERS: Add entry for Intel IGEN6 EDAC driver
EDAC/igen6: Add debugfs interface for Intel client SoC EDAC driver
EDAC/igen6: Add EDAC driver for Intel client SoCs using IBECC
EDAC/synopsys: Return the correct value in mc_probe()
MAINTAINERS: Clean up the F: entries for some EDAC drivers
EDAC: Add three new memory types
EDAC: Fix some kernel-doc markups
EDAC: Do not issue useless debug statements in the polling routine
EDAC/amd64: Remove unneeded breaks
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt index 6a0f3d90d682..8ca9e0a049d8 100644 --- a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt +++ b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt @@ -1,6 +1,6 @@ -Aspeed AST2500 SoC EDAC node +Aspeed BMC SoC EDAC node -The Aspeed AST2500 SoC supports DDR3 and DDR4 memory with and without ECC (error +The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error correction check). The memory controller supports SECDED (single bit error correction, double bit @@ -11,7 +11,10 @@ Note, the bootloader must configure ECC mode in the memory controller. Required properties: -- compatible: should be "aspeed,ast2500-sdram-edac" +- compatible: should be one of + - "aspeed,ast2400-sdram-edac" + - "aspeed,ast2500-sdram-edac" + - "aspeed,ast2600-sdram-edac" - reg: sdram controller register set should be <0x1e6e0000 0x174> - interrupts: should be AVIC interrupt #0 |