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| author | Stephen Rothwell <sfr@canb.auug.org.au> | 2013-11-05 15:22:38 +1100 |
|---|---|---|
| committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2013-11-05 15:22:38 +1100 |
| commit | 810774257bd5de75115ad9148c85348c1b29827d (patch) | |
| tree | 7835ceeb585f965fa4580145a206637472ac6db0 /Documentation | |
| parent | 8e1c98f7c35c565d56edd32b8531f16b90c2a669 (diff) | |
| parent | 9b415b3a3c4e146564a92381c4ddcbd9337469ce (diff) | |
Merge remote-tracking branch 'oprofile/for-next'
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt b/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt index f770ac0893d4..049675944b78 100644 --- a/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt +++ b/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt @@ -1,7 +1,9 @@ Calxeda DDR memory controller Properties: -- compatible : Should be "calxeda,hb-ddr-ctrl" +- compatible : Should be: + - "calxeda,hb-ddr-ctrl" for ECX-1000 + - "calxeda,ecx-2000-ddr-ctrl" for ECX-2000 - reg : Address and size for DDR controller registers. - interrupts : Interrupt for DDR controller. |