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authorChristoph Hellwig <hch@lst.de>2019-10-28 13:10:32 +0100
committerPaul Walmsley <paul.walmsley@sifive.com>2019-11-05 09:20:42 -0800
commita4c3733d32a72f11dee86d0731d7565aa6ebe22d (patch)
tree45a8cdbf56325f37ad1b04c015aa8f9a5c646e9a /README
parent0c3ac28931d578324e93afab6ee7b740dfdaff6f (diff)
riscv: abstract out CSR names for supervisor vs machine mode
Many of the privileged CSRs exist in a supervisor and machine version that are used very similarly. Provide versions of the CSR names and fields that map to either the S-mode or M-mode variant depending on a new CONFIG_RISCV_M_MODE kconfig symbol. Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com> and Paul Walmsley <paul.walmsley@sifive.com>. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> # for drivers/clocksource, drivers/irqchip [paul.walmsley@sifive.com: updated to apply] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
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