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authorMiguel Vadillo <vadillo@ti.com>2010-09-24 12:15:19 -0500
committerRicardo Perez Olivares <x0081762@ti.com>2010-09-27 17:10:29 -0500
commit7932474f6363a60a7102dec3a9d51003c0aebb8a (patch)
treeac06255c6020a4c63399dc1b50c3aac7aa20dae4 /TI_OMAP4_Kernel_Release_Notes_L24.x.txt
parent8783e4e98dc368e1d03d44c767cde66e78c073ba (diff)
syslink:ipu_pm: DFVS support for freq
Fix bug in error message string referencing Signed-off-by: Paul Hunt <hunt@ti.com> Add platform data for DSP resource and fix attributes for MPU and L3 interconnect. Signed-off-by: Paul Hunt <hunt@ti.com> Provide internal APIs for performance and latency constraint frameworks to use to assert these constraints into the system power management. Signed-off-by: Paul Hunt <hunt@ti.com> MPU and CORE freq/lat cstrs Add special handling for MPU and CORE frequency and latency constraints. To specify a constraint to MPU or CORE the api needs to be called passing the following to the api: - IPUPM_SELF - IPUPM_MPU - IPUPM_CORE Signed-off-by: Paul Hunt <hunt@ti.com> DVFS support in ipu_pm Calling the dvfs apis per resource. Included: - ipu[perf|lat] - iss[perf|lat] - ivahd[perf|lat] - L3 bus[lat] - mpu[perf|lat] Pending: - fdif - dsp Note: Latency calls are working but hasnt been tested. Perf/rate calls are working. Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> (cherry picked from commit 3c1cdb45bb67d11eda14420a7b8eaacff0c24173)
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