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authorThomas Gleixner <tglx@linutronix.de>2014-09-14 15:34:38 +0200
committerThomas Gleixner <tglx@linutronix.de>2014-09-14 15:35:36 +0200
commitdb985cbd67c45f875ef43cb5febfaa8cbd203c27 (patch)
tree63542d05b1c0f730ec1ad5f915dc4eb3c015e616 /arch/arm/mach-omap2/dpll44xx.c
parentc6f1224573c3b609bd8073b39f496637a16cc06f (diff)
parent468a903c0e5147e3f93187f0b808a3ef957fd00e (diff)
Merge tag 'irqchip-core-3.18' of git://git.infradead.org/users/jcooper/linux into irq/core
irqchip core changes for v3.18 - renesas: suspend to RAM, runtime PM, cleanups and DT binding docs - keystone: add new driver - hip04: add Hisilicon HiP04 driver (without touching irq-gic.c) - gic: Use defines instead of magic number, preserve v2 bybass bits - handle_domain_irq: common low level interrupt entry handler
Diffstat (limited to 'arch/arm/mach-omap2/dpll44xx.c')
-rw-r--r--arch/arm/mach-omap2/dpll44xx.c19
1 files changed, 13 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 52f9438b92f2..4613f1e86988 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -15,10 +15,7 @@
#include <linux/io.h>
#include <linux/bitops.h>
-#include "soc.h"
#include "clock.h"
-#include "clock44xx.h"
-#include "cm-regbits-44xx.h"
/*
* Maximum DPLL input frequency (FINT) and output frequency (FOUT) that
@@ -29,13 +26,23 @@
#define OMAP4_DPLL_LP_FINT_MAX 1000000
#define OMAP4_DPLL_LP_FOUT_MAX 100000000
+/*
+ * Bitfield declarations
+ */
+#define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK (1 << 8)
+#define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK (1 << 10)
+#define OMAP4430_DPLL_REGM4XEN_MASK (1 << 11)
+
+/* Static rate multiplier for OMAP4 REGM4XEN clocks */
+#define OMAP4430_REGM4XEN_MULT 4
+
/* Supported only on OMAP4 */
int omap4_dpllmx_gatectrl_read(struct clk_hw_omap *clk)
{
u32 v;
u32 mask;
- if (!clk || !clk->clksel_reg || !cpu_is_omap44xx())
+ if (!clk || !clk->clksel_reg)
return -EINVAL;
mask = clk->flags & CLOCK_CLKOUTX2 ?
@@ -54,7 +61,7 @@ void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk)
u32 v;
u32 mask;
- if (!clk || !clk->clksel_reg || !cpu_is_omap44xx())
+ if (!clk || !clk->clksel_reg)
return;
mask = clk->flags & CLOCK_CLKOUTX2 ?
@@ -72,7 +79,7 @@ void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk)
u32 v;
u32 mask;
- if (!clk || !clk->clksel_reg || !cpu_is_omap44xx())
+ if (!clk || !clk->clksel_reg)
return;
mask = clk->flags & CLOCK_CLKOUTX2 ?