diff options
| author | Maulik Mankad <x0082077@ti.com> | 2009-10-29 11:34:41 +0530 |
|---|---|---|
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2009-10-31 19:29:36 +0530 |
| commit | 39a64fb46bc27f1f91ae3b0feb3bc21dbd35c642 (patch) | |
| tree | 2eea4c3241ef901c24d7ab2c18f5dbaadf8f29c7 /arch/arm/mach-omap2 | |
| parent | 28eb9a494239cb9527b0ada83be29c8ea2621ebb (diff) | |
OMAP4: Adds MUX settings for EHCI PHY port 1
Signed-off-by: Maulik Mankad <x0082077@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
| -rw-r--r-- | arch/arm/mach-omap2/mux.c | 27 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/usb-ehci.c | 73 |
2 files changed, 71 insertions, 29 deletions
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index ce8d0495f97e..4049693704df 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -686,7 +686,34 @@ MUX_CFG_34XX("PAD1_4430_SYS_NIRQ1", 0x019E, OMAP34XX_MUX_MODE0 | OMAP2_PULL_ENA | OMAP2_PULL_UP | OMAP3_INPUT_EN) MUX_CFG_34XX("PAD0_4430_SYS_NIRQ2", 0x01A0, OMAP34XX_MUX_MODE0 | OMAP2_PULL_ENA | OMAP2_PULL_UP | OMAP3_INPUT_EN) + +/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/ +MUX_CFG_34XX("AE_4430_USB1HS_PHY_CLK", 0x0C2, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) +MUX_CFG_34XX("AG_4430_USB1HS_PHY_STP", 0x0C4, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) +MUX_CFG_34XX("AF_4430_USB1HS_PHY_DIR", 0x0C6, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AE_4430_USB1HS_PHY_NXT", 0x0C8, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AF_4430_USB1HS_PHY_D0", 0x0CA, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AG_4430_USB1HS_PHY_D1", 0x0CC, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AE_4430_USB1HS_PHY_D2", 0x0CE, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AF_4430_USB1HS_PHY_D3", 0x0D0, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AH_4430_USB1HS_PHY_D4", 0x0D2, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AE_4430_USB1HS_PHY_D5", 0x0D4, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AF_4430_USB1HS_PHY_D6", 0x0D6, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AG_4430_USB1HS_PHY_D7", 0x0D8, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN) }; + #define OMAP44XX_PINS_SZ ARRAY_SIZE(omap44xx_pins) #else diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c index 438fa49a18f4..800d8c03f06c 100644 --- a/arch/arm/mach-omap2/usb-ehci.c +++ b/arch/arm/mach-omap2/usb-ehci.c @@ -112,34 +112,50 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode) * ISP1504 connected to Port1 and Port2 * Do Func Mux setting for 12-pin ULPI PHY mode */ - /* Port1 */ - omap_cfg_reg(Y9_3430_USB1HS_PHY_STP); - omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK); - omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR); - omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT); - omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0); - omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1); - omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2); - omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3); - omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4); - omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5); - omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6); - omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7); - - /* Port2 */ - omap_cfg_reg(AA10_3430_USB2HS_PHY_STP); - omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK); - omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR); - omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT); - omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0); - omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1); - omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2); - omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3); - omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4); - omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5); - omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6); - omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7); + if (cpu_is_omap34xx()) { + /* Port1 */ + omap_cfg_reg(Y9_3430_USB1HS_PHY_STP); + omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK); + omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR); + omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT); + omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0); + omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1); + omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2); + omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3); + omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4); + omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5); + omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6); + omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7); + + /* Port2 */ + omap_cfg_reg(AA10_3430_USB2HS_PHY_STP); + omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK); + omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR); + omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT); + omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0); + omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1); + omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2); + omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3); + omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4); + omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5); + omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6); + omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7); + } else if (cpu_is_omap44xx()) { + /* Port 1 */ + omap_cfg_reg(AE_4430_USB1HS_PHY_CLK); + omap_cfg_reg(AG_4430_USB1HS_PHY_STP); + omap_cfg_reg(AF_4430_USB1HS_PHY_DIR); + omap_cfg_reg(AE_4430_USB1HS_PHY_NXT); + omap_cfg_reg(AF_4430_USB1HS_PHY_D0); + omap_cfg_reg(AG_4430_USB1HS_PHY_D1); + omap_cfg_reg(AE_4430_USB1HS_PHY_D2); + omap_cfg_reg(AF_4430_USB1HS_PHY_D3); + omap_cfg_reg(AH_4430_USB1HS_PHY_D4); + omap_cfg_reg(AE_4430_USB1HS_PHY_D5); + omap_cfg_reg(AF_4430_USB1HS_PHY_D6); + omap_cfg_reg(AG_4430_USB1HS_PHY_D7); + } } else { /* Set Func mux for : * TLL mode of operation @@ -385,8 +401,7 @@ void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode, platform_device_add_data(&ehci_device, &pdata, sizeof(pdata)); /* Setup Pin IO MUX for EHCI */ - if (cpu_is_omap34xx()) - setup_ehci_io_mux(phy_mode); + setup_ehci_io_mux(phy_mode); #define USBHOST_PORT1_GPIO 57 #define USBHOST_PORT2_GPIO 61 |