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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-08-27 21:03:07 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-08-28 23:57:28 +0900
commit555861fb4859e3debe96e19172f157d54abb7056 (patch)
treeb3b2c39551a094f6bc427ea6ade57371585bd722 /arch/arm64
parent3dfc6e982910c9fef4a924477b5f41a1257dd90f (diff)
arm64: dts: uniphier: fix size of sdctrl node
All registers are located within 0x400 size from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index f4948d0aa348..a29c279b6e8e 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -320,7 +320,7 @@
sdctrl@59810000 {
compatible = "socionext,uniphier-ld20-sdctrl",
"simple-mfd", "syscon";
- reg = <0x59810000 0x800>;
+ reg = <0x59810000 0x400>;
sd_clk: clock {
compatible = "socionext,uniphier-ld20-sd-clock";