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authorRichard Kuo <rkuo@codeaurora.org>2013-03-01 13:16:15 -0600
committerRichard Kuo <rkuo@codeaurora.org>2013-04-30 19:40:25 -0500
commit1ce81f4f8727f42c052fe814f3df20bc92fdb168 (patch)
tree225549486d81dbf948df6d388da8e3328faa4df6 /arch/hexagon/include
parentf167063a0c4e97dfbd8e42df76e71022bb2bdb7f (diff)
Hexagon: add IOMEM and _relaxed IO macros
Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
Diffstat (limited to 'arch/hexagon/include')
-rw-r--r--arch/hexagon/include/asm/io.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/hexagon/include/asm/io.h b/arch/hexagon/include/asm/io.h
index e527cfeff5ba..6199ed5f064b 100644
--- a/arch/hexagon/include/asm/io.h
+++ b/arch/hexagon/include/asm/io.h
@@ -40,6 +40,8 @@
#define IO_SPACE_LIMIT 0xffff
#define _IO_BASE ((void __iomem *)0xfe000000)
+#define IOMEM(x) ((void __force __iomem *)(x))
+
extern int remap_area_pages(unsigned long start, unsigned long phys_addr,
unsigned long end, unsigned long flags);
@@ -176,6 +178,18 @@ static inline void writel(u32 data, volatile void __iomem *addr)
#define __raw_readl readl
/*
+ * http://comments.gmane.org/gmane.linux.ports.arm.kernel/117626
+ */
+
+#define readb_relaxed __raw_readb
+#define readw_relaxed __raw_readw
+#define readl_relaxed __raw_readl
+
+#define writeb_relaxed __raw_writeb
+#define writew_relaxed __raw_writew
+#define writel_relaxed __raw_writel
+
+/*
* Need an mtype somewhere in here, for cache type deals?
* This is probably too long for an inline.
*/