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authorChris Metcalf <cmetcalf@ezchip.com>2015-07-09 16:38:17 -0400
committerThomas Gleixner <tglx@linutronix.de>2015-07-27 14:06:24 +0200
commit2957c035395e492463d7f589af9dd32388967bbb (patch)
tree012c7882af09f225a45bc0a2d71bb61620cc5303 /arch/ia64
parent73ada3700bbb0a4c7cc06ea8d74e93c689f90cdb (diff)
tile: Provide atomic_{or,xor,and}
Implement atomic logic ops -- atomic_{or,xor,and}. For tilegx, these are relatively straightforward; the architecture provides atomic "or" and "and", both 32-bit and 64-bit. To support xor we provide a loop using "cmpexch". For the older 32-bit tilepro architecture, we have to extend the set of low-level assembly routines to include 32-bit "and", as well as all three 64-bit routines. Somewhat confusingly, some 32-bit versions are already used by the bitops inlines, with parameter types appropriate for bitops, so we have to do a bit of casting to match "int" to "unsigned long". Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: http://lkml.kernel.org/r/1436474297-32187-1-git-send-email-cmetcalf@ezchip.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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