summaryrefslogtreecommitdiff
path: root/arch/mips/alchemy/devboards/db1235.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-14 14:39:05 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-14 14:39:05 -0700
commita5ef3f7dcba17e79c21afec38188c4c6a0baf995 (patch)
tree1961e2e8c2d30dd7a21b93fa7e70dc62f892651d /arch/mips/alchemy/devboards/db1235.c
parentd25282d1c9b9bc4cda7f9d3c0205108e99aa7a9d (diff)
parent35bafbee4b4732a2820bbd0ef141c8192ff29731 (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS update from Ralf Baechle: "Cleanups and fixes for breakage that occured earlier during this merge phase. Also a few patches that didn't make the first pull request. Of those is the Alchemy work that merges code for many of the SOCs and evaluation boards thus among other code shrinkage, reduces the number of MIPS defconfigs by 5." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (22 commits) MIPS: SNI: Switch RM400 serial to SCCNXP driver MIPS: Remove unused empty_bad_pmd_table[] declaration. MIPS: MT: Remove kspd. MIPS: Malta: Fix section mismatch. MIPS: asm-offset.c: Delete unused irq_cpustat_t struct offsets. MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code. MIPS: Alchemy: merge PB1550 support into DB1550 code MIPS: Alchemy: Single kernel for DB1200/1300/1550 MIPS: Optimize TLB refill for RI/XI configurations. MIPS: proc: Cleanup printing of ASEs. MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required. MIPS: Add detection of DSP ASE Revision 2. MIPS: Optimize pgd_init and pmd_init MIPS: perf: Add perf functionality for BMIPS5000 MIPS: perf: Split the Kconfig option CONFIG_MIPS_MT_SMP MIPS: perf: Remove unnecessary #ifdef MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt) MIPS: perf: Change the "mips_perf_event" table unsupported indicator. MIPS: Align swapper_pg_dir to 64K for better TLB Refill code. vmlinux.lds.h: Allow architectures to add sections to the front of .bss ...
Diffstat (limited to 'arch/mips/alchemy/devboards/db1235.c')
-rw-r--r--arch/mips/alchemy/devboards/db1235.c94
1 files changed, 94 insertions, 0 deletions
diff --git a/arch/mips/alchemy/devboards/db1235.c b/arch/mips/alchemy/devboards/db1235.c
new file mode 100644
index 000000000000..c76a90f78664
--- /dev/null
+++ b/arch/mips/alchemy/devboards/db1235.c
@@ -0,0 +1,94 @@
+/*
+ * DB1200/PB1200 / DB1550 / DB1300 board support.
+ *
+ * These 4 boards can reliably be supported in a single kernel image.
+ */
+
+#include <asm/mach-au1x00/au1000.h>
+#include <asm/mach-db1x00/bcsr.h>
+
+int __init db1200_board_setup(void);
+int __init db1200_dev_setup(void);
+int __init db1300_board_setup(void);
+int __init db1300_dev_setup(void);
+int __init db1550_board_setup(void);
+int __init db1550_dev_setup(void);
+int __init db1550_pci_setup(int);
+
+static const char *board_type_str(void)
+{
+ switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
+ case BCSR_WHOAMI_PB1200_DDR1:
+ case BCSR_WHOAMI_PB1200_DDR2:
+ return "PB1200";
+ case BCSR_WHOAMI_DB1200:
+ return "DB1200";
+ case BCSR_WHOAMI_DB1300:
+ return "DB1300";
+ case BCSR_WHOAMI_DB1550:
+ return "DB1550";
+ case BCSR_WHOAMI_PB1550_SDR:
+ case BCSR_WHOAMI_PB1550_DDR:
+ return "PB1550";
+ default:
+ return "(unknown)";
+ }
+}
+
+const char *get_system_type(void)
+{
+ return board_type_str();
+}
+
+void __init board_setup(void)
+{
+ int ret;
+
+ switch (alchemy_get_cputype()) {
+ case ALCHEMY_CPU_AU1550:
+ ret = db1550_board_setup();
+ break;
+ case ALCHEMY_CPU_AU1200:
+ ret = db1200_board_setup();
+ break;
+ case ALCHEMY_CPU_AU1300:
+ ret = db1300_board_setup();
+ break;
+ default:
+ pr_err("unsupported CPU on board\n");
+ ret = -ENODEV;
+ }
+ if (ret)
+ panic("cannot initialize board support\n");
+}
+
+int __init db1235_arch_init(void)
+{
+ int id = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
+ if (id == BCSR_WHOAMI_DB1550)
+ return db1550_pci_setup(0);
+ else if ((id == BCSR_WHOAMI_PB1550_SDR) ||
+ (id == BCSR_WHOAMI_PB1550_DDR))
+ return db1550_pci_setup(1);
+
+ return 0;
+}
+arch_initcall(db1235_arch_init);
+
+int __init db1235_dev_init(void)
+{
+ switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
+ case BCSR_WHOAMI_PB1200_DDR1:
+ case BCSR_WHOAMI_PB1200_DDR2:
+ case BCSR_WHOAMI_DB1200:
+ return db1200_dev_setup();
+ case BCSR_WHOAMI_DB1300:
+ return db1300_dev_setup();
+ case BCSR_WHOAMI_DB1550:
+ case BCSR_WHOAMI_PB1550_SDR:
+ case BCSR_WHOAMI_PB1550_DDR:
+ return db1550_dev_setup();
+ }
+ return 0;
+}
+device_initcall(db1235_dev_init);