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author谢致邦 (XIE Zhibang) <Yeking@Red54.com>2017-01-04 21:30:58 +0800
committerPaul Burton <paul.burton@mips.com>2018-07-30 18:59:01 -0700
commit60bc84e227d24fdb1ac2211c574a88ecd7c836a0 (patch)
tree22a4bace0305a2901f87130100cbe923ee484b37 /arch/mips/loongson32
parent968dc5a0eaca707f8eb2fbad57d9fbbf3284541e (diff)
MIPS: Loongson: Merge load addresses
Systems based upon the Loongson 1B & 1C CPUs share the same load address, as do those based upon Loongson 1A. Unify the definition of this load address to reduce duplication & avoid the need for an extra Loongson 1A case in future. [paul.burton@mips.com: Rewrite commit message.] Signed-off-by: 谢致邦 (XIE Zhibang) <Yeking@Red54.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/14927/ Cc: linux-mips@linux-mips.org
Diffstat (limited to 'arch/mips/loongson32')
-rw-r--r--arch/mips/loongson32/Platform3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/loongson32/Platform b/arch/mips/loongson32/Platform
index 90ac8f3158d3..a0dbb3b2f2de 100644
--- a/arch/mips/loongson32/Platform
+++ b/arch/mips/loongson32/Platform
@@ -1,5 +1,4 @@
cflags-$(CONFIG_CPU_LOONGSON1) += -march=mips32 -Wa,--trap
platform-$(CONFIG_MACH_LOONGSON32) += loongson32/
cflags-$(CONFIG_MACH_LOONGSON32) += -I$(srctree)/arch/mips/include/asm/mach-loongson32
-load-$(CONFIG_LOONGSON1_LS1B) += 0xffffffff80100000
-load-$(CONFIG_LOONGSON1_LS1C) += 0xffffffff80100000
+load-$(CONFIG_CPU_LOONGSON1) += 0xffffffff80100000