summaryrefslogtreecommitdiff
path: root/arch/mips/loongson64
diff options
context:
space:
mode:
authorQing Zhang <zhangqing@loongson.cn>2021-03-15 15:50:01 +0800
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2021-03-25 10:44:01 +0100
commit44151ea08978cea536fa9e7b95efca336994048d (patch)
treecce29d8ab2f7b1bab948cae66e1dcc115ab5f7fe /arch/mips/loongson64
parent95b56e884a50c8e935b4e9f8b289251cc913795e (diff)
MIPS: Loongson64: Add Loongson-2K1000 early_printk_port
Distinguish between Loongson-3A series CPU and Loongson-2K1000 CPU UART0. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Tested-by: Ming Wang <wangming01@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/loongson64')
-rw-r--r--arch/mips/loongson64/init.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c
index ed280b73bf89..d5a1eddb8202 100644
--- a/arch/mips/loongson64/init.c
+++ b/arch/mips/loongson64/init.c
@@ -120,7 +120,10 @@ void __init prom_init(void)
#endif
/* Hardcode to CPU UART 0 */
- setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE + 0x1e0), 0, 1024);
+ if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R)
+ setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE), 0, 1024);
+ else
+ setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE + 0x1e0), 0, 1024);
register_smp_ops(&loongson3_smp_ops);
board_nmi_handler_setup = mips_nmi_setup;