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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2007-03-01 01:53:13 +0900
committerRalf Baechle <ralf@linux-mips.org>2007-03-04 19:02:35 +0000
commit12e4396bf0b1cd62c9d71a06596914c7efa7dbaf (patch)
tree5cac3c54cbd025c9e382b0aec0a39ea8bcfd4a6f /arch/mips/tx4927
parenta0574e04807608998d4d115c07b7bc12bb499a44 (diff)
[MIPS] No need to write c0_compare in plat_timer_setup
If R4k counter was used for hpt_timer and interrupt source, c0_hpt_timer_init() initializes the c0_compare register. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/tx4927')
-rw-r--r--arch/mips/tx4927/common/tx4927_setup.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 941c441729b0..c8e49feb345b 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -81,18 +81,8 @@ void __init tx4927_time_init(void)
void __init plat_timer_setup(struct irqaction *irq)
{
- u32 count;
- u32 c1;
- u32 c2;
-
setup_irq(TX4927_IRQ_CPU_TIMER, irq);
- /* to generate the first timer interrupt */
- c1 = read_c0_count();
- count = c1 + (mips_hpt_frequency / HZ);
- write_c0_compare(count);
- c2 = read_c0_count();
-
#ifdef CONFIG_TOSHIBA_RBTX4927
{
extern void toshiba_rbtx4927_timer_setup(struct irqaction