summaryrefslogtreecommitdiff
path: root/arch/powerpc/boot/dts/mpc8610_hpcd.dts
diff options
context:
space:
mode:
authorThomas Gleixner <tglx@linutronix.de>2008-05-17 17:12:20 +0200
committerThomas Gleixner <tglx@linutronix.de>2008-05-17 17:12:20 +0200
commit3856aa0c642dc34af7939e30f93e81eefbe0b935 (patch)
treee55e69097c7f3186e38dc1d3b3d4a05f4e68b1e2 /arch/powerpc/boot/dts/mpc8610_hpcd.dts
parentaaaf92ba88d5a2664185ba20fd34308c8581d59f (diff)
parentf26a3988917913b3d11b2bd741601a2c64ab9204 (diff)
Merge branch 'linus' into x86/cpatip-x86-cpa-2008-05-17-15-12-20
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8610_hpcd.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts60
1 files changed, 57 insertions, 3 deletions
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index bba234eb14a9..08a780d89807 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -46,9 +46,63 @@
reg = <0x00000000 0x20000000>; // 512M at 0x0
};
- board-control@e8000000 {
- compatible = "fsl,fpga-pixis";
- reg = <0xe8000000 32>; // pixis at 0xe8000000
+ localbus@e0005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8610-elbc", "fsl,elbc", "simple-bus";
+ reg = <0xe0005000 0x1000>;
+ interrupts = <19 2>;
+ interrupt-parent = <&mpic>;
+ ranges = <0 0 0xf8000000 0x08000000
+ 1 0 0xf0000000 0x08000000
+ 2 0 0xe8400000 0x00008000
+ 4 0 0xe8440000 0x00008000
+ 5 0 0xe8480000 0x00008000
+ 6 0 0xe84c0000 0x00008000
+ 3 0 0xe8000000 0x00000020>;
+
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ flash@1,0 {
+ compatible = "cfi-flash";
+ reg = <1 0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ flash@2,0 {
+ compatible = "fsl,mpc8610-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <2 0 0x8000>;
+ };
+
+ flash@4,0 {
+ compatible = "fsl,mpc8610-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <4 0 0x8000>;
+ };
+
+ flash@5,0 {
+ compatible = "fsl,mpc8610-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <5 0 0x8000>;
+ };
+
+ flash@6,0 {
+ compatible = "fsl,mpc8610-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <6 0 0x8000>;
+ };
+
+ board-control@3,0 {
+ compatible = "fsl,fpga-pixis";
+ reg = <3 0 0x20>;
+ };
};
soc@e0000000 {