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authorshaom Deng <dengshaomin@cdjrlc.com>2022-07-17 00:56:33 +0800
committerHerbert Xu <herbert@gondor.apana.org.au>2022-07-22 16:22:04 +0800
commit647c952eac5d27569365e9407c96db3c6915e08f (patch)
treea41a992e80dbd69c06d008a20110ad794f907dc7 /arch/powerpc/crypto
parent85796a9b7583a0b00ee9e69b932daafb41515a76 (diff)
cyrpto: powerpc/aes - delete the rebundant word "block" in comments
there is rebundant word "block" in comments, so remove it Signed-off-by: shaom Deng <dengshaomin@cdjrlc.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'arch/powerpc/crypto')
-rw-r--r--arch/powerpc/crypto/aes-spe-glue.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/crypto/aes-spe-glue.c b/arch/powerpc/crypto/aes-spe-glue.c
index e8dfe9fb0266..efab78a3a8f6 100644
--- a/arch/powerpc/crypto/aes-spe-glue.c
+++ b/arch/powerpc/crypto/aes-spe-glue.c
@@ -28,7 +28,7 @@
* instructions per clock cycle using one 32/64 bit unit (SU1) and one 32
* bit unit (SU2). One of these can be a memory access that is executed via
* a single load and store unit (LSU). XTS-AES-256 takes ~780 operations per
- * 16 byte block block or 25 cycles per byte. Thus 768 bytes of input data
+ * 16 byte block or 25 cycles per byte. Thus 768 bytes of input data
* will need an estimated maximum of 20,000 cycles. Headroom for cache misses
* included. Even with the low end model clocked at 667 MHz this equals to a
* critical time window of less than 30us. The value has been chosen to