diff options
| author | Vincent Chen <vincent.chen@sifive.com> | 2020-04-16 10:38:07 +0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2020-05-18 11:38:11 -0700 |
| commit | d96575709cc7056f34fdd5cdc16bcffe5bdb573d (patch) | |
| tree | 73935f4d016aa0de26ce4276e2715ae84bd5c731 /arch/riscv/Kconfig | |
| parent | fe89bd2be8667d4d876329dd534dd59158e33b1f (diff) | |
riscv: Use the XML target descriptions to report 3 system registers
The $status, $badaddr, and $cause registers belong to the thread context,
so KGDB can obtain their contents from pt_regs in each trap. However, the
sequential number of these registers in the gdb register list is far from
the general-purpose registers. If riscv port uses the existing method to
report these three registers, many trivial registers with sequence numbers
in the middle of them will also be packaged to the reply packets. To solve
this problem, the riscv port wants to introduce the GDB target description
mechanism to customize the reported register list. By the list, the KGDB
can ignore the intermediate registers and just reports the general-purpose
registers and these three system registers.
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv/Kconfig')
| -rw-r--r-- | arch/riscv/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 51ad2ab4219c..f7144354938f 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -69,6 +69,7 @@ config RISCV select HAVE_COPY_THREAD_TLS select HAVE_ARCH_KASAN if MMU && 64BIT select HAVE_ARCH_KGDB + select HAVE_ARCH_KGDB_QXFER_PKT config ARCH_MMAP_RND_BITS_MIN default 18 if 64BIT |