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authorJisheng Zhang <jszhang@kernel.org>2023-10-06 20:14:49 +0800
committerConor Dooley <conor.dooley@microchip.com>2023-10-07 14:17:18 +0100
commit27df2ed3b145080b3c9c21420e797cc35099b154 (patch)
tree5f2a5faf1a1619080a3efcd55e3cd2a703b9ae9c /arch/riscv/boot
parentc3dffa879ccad5f0b08deedc2c428f4f7ae7f8e6 (diff)
riscv: dts: sophgo: add Milk-V Duo board device tree
Milk-V Duo[1] board is an embedded development platform based on the CV1800B chip. Add minimal device tree files for the development board. Support basic uart drivers, so supports booting to a basic shell. Link: https://milkv.io/duo [1] Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'arch/riscv/boot')
-rw-r--r--arch/riscv/boot/dts/sophgo/Makefile1
-rw-r--r--arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts38
2 files changed, 39 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile
index 73af15f42ec2..3fb65512c631 100644
--- a/arch/riscv/boot/dts/sophgo/Makefile
+++ b/arch/riscv/boot/dts/sophgo/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb
dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
new file mode 100644
index 000000000000..3af9e34b3bc7
--- /dev/null
+++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
+ */
+
+/dts-v1/;
+
+#include "cv1800b.dtsi"
+
+/ {
+ model = "Milk-V Duo";
+ compatible = "milkv,duo", "sophgo,cv1800b";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x3f40000>;
+ };
+};
+
+&osc {
+ clock-frequency = <25000000>;
+};
+
+&uart0 {
+ status = "okay";
+};