diff options
| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2020-01-27 17:48:30 +0100 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2020-01-27 17:48:30 +0100 |
| commit | 701ddf0bbfc761b8bdc974ce9c4e05f9833683e3 (patch) | |
| tree | 1009975aacf14d36cc280dfeef1a9a816fa16ef8 /arch/riscv/net/bpf_jit_comp.c | |
| parent | 0dcf2572710d68c305e58946c435ddf67ea16bf3 (diff) | |
| parent | ccfb9299a0b63da4fde607c822e1470472a46177 (diff) | |
Merge tag 'spi-nor/for-5.6' into mtd/next
SPI NOR core changes:
- Add support for TB selection using SR bit 6,
- Add support for few flashes.
Diffstat (limited to 'arch/riscv/net/bpf_jit_comp.c')
| -rw-r--r-- | arch/riscv/net/bpf_jit_comp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/riscv/net/bpf_jit_comp.c b/arch/riscv/net/bpf_jit_comp.c index 5451ef3845f2..7fbf56aab661 100644 --- a/arch/riscv/net/bpf_jit_comp.c +++ b/arch/riscv/net/bpf_jit_comp.c @@ -631,14 +631,14 @@ static int emit_bpf_tail_call(int insn, struct rv_jit_context *ctx) return -1; emit(rv_bgeu(RV_REG_A2, RV_REG_T1, off >> 1), ctx); - /* if (--TCC < 0) + /* if (TCC-- < 0) * goto out; */ emit(rv_addi(RV_REG_T1, tcc, -1), ctx); off = (tc_ninsn - (ctx->ninsns - start_insn)) << 2; if (is_13b_check(off, insn)) return -1; - emit(rv_blt(RV_REG_T1, RV_REG_ZERO, off >> 1), ctx); + emit(rv_blt(tcc, RV_REG_ZERO, off >> 1), ctx); /* prog = array->ptrs[index]; * if (!prog) |