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authorMax Filippov <jcmvbkbc@gmail.com>2019-08-12 15:01:30 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-08-25 10:47:47 +0200
commit61f6ecb758453d51f25c4cd991cfcc52c41e709a (patch)
tree85cb51ec72802fbbc62a41d309e5b86d6209ddad /arch/xtensa
parent7c001e5aab6dcf4883d67fe3154ce73725251f47 (diff)
xtensa: add missing isync to the cpu_reset TLB code
commit cd8869f4cb257f22b89495ca40f5281e58ba359c upstream. ITLB entry modifications must be followed by the isync instruction before the new entries are possibly used. cpu_reset lacks one isync between ITLB way 6 initialization and jump to the identity mapping. Add missing isync to xtensa cpu_reset. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/xtensa')
-rw-r--r--arch/xtensa/kernel/setup.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index a285fbd0fd9b..15580e4fc766 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -515,6 +515,7 @@ void cpu_reset(void)
"add %2, %2, %7\n\t"
"addi %0, %0, -1\n\t"
"bnez %0, 1b\n\t"
+ "isync\n\t"
/* Jump to identity mapping */
"jx %3\n"
"2:\n\t"