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| author | Stephen Rothwell <sfr@canb.auug.org.au> | 2019-02-19 13:17:16 +1100 |
|---|---|---|
| committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2019-02-19 13:17:16 +1100 |
| commit | cf9fea1ba2e1198dea8bd3a367e3c43b307db9ac (patch) | |
| tree | 5af15a4301ef90766f1d4c22ef3cdd7557ed3b28 /arch | |
| parent | 57dc32a3d06e7d273455a2133da39d9c69d962f1 (diff) | |
| parent | f1fc9f79bf1a45428f1169ebc1d8686451a72a82 (diff) | |
Merge remote-tracking branch 'iommu/next'
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index dcad6d6128cf..8c942e60703e 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -616,17 +616,14 @@ }; mc: memory-controller@7000f000 { - compatible = "nvidia,tegra20-mc"; - reg = <0x7000f000 0x024 - 0x7000f03c 0x3c4>; + compatible = "nvidia,tegra20-mc-gart"; + reg = <0x7000f000 0x400 /* controller registers */ + 0x58000000 0x02000000>; /* GART aperture */ + clocks = <&tegra_car TEGRA20_CLK_MC>; + clock-names = "mc"; interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; #reset-cells = <1>; - }; - - iommu@7000f024 { - compatible = "nvidia,tegra20-gart"; - reg = <0x7000f024 0x00000018 /* controller registers */ - 0x58000000 0x02000000>; /* GART aperture */ + #iommu-cells = <0>; }; memory-controller@7000f400 { |