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authorVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>2016-11-17 03:30:51 +0200
committerJiri Slaby <jslaby@suse.cz>2017-01-26 17:41:00 +0100
commitad6d6b82e6e37a37ffd48107f891fd70b823d68b (patch)
treef3a522de96e9c277fc781377fc4784fefeec5f06 /arch
parent8e449442c0300cb92df149d01515a11cc5ff08d6 (diff)
ARM: dts: imx31: fix AVIC base address
commit af92305e567b7f4c9cf48b9e46c1f48ec9ffb1fb upstream. On i.MX31 AVIC interrupt controller base address is at 0x68000000. The problem was shadowed by the AVIC driver, which takes the correct base address from a SoC specific header file. Fixes: d2a37b3d91f4 ("ARM i.MX31: Add devicetree support") Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx31.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi
index 8ec20b49db7e..626e5e374572 100644
--- a/arch/arm/boot/dts/imx31.dtsi
+++ b/arch/arm/boot/dts/imx31.dtsi
@@ -30,11 +30,11 @@
};
};
- avic: avic-interrupt-controller@60000000 {
+ avic: interrupt-controller@68000000 {
compatible = "fsl,imx31-avic", "fsl,avic";
interrupt-controller;
#interrupt-cells = <1>;
- reg = <0x60000000 0x100000>;
+ reg = <0x68000000 0x100000>;
};
soc {