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| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2010-05-19 19:08:23 +0530 |
|---|---|---|
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2010-05-19 19:08:23 +0530 |
| commit | 1cfb5572d4500e6b2e262a81e504110b7fb3eedc (patch) | |
| tree | 3769c89867674afc32a038b4e847e3919fe55017 /arch | |
| parent | 81a2ca3034f1bc22cafb7980eb09052ae4aed8c8 (diff) | |
ARMv7: Fix typo in commit 8f4d29bc
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mm/cache-v7.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 5009635a3a17..37c8157e116e 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S @@ -93,7 +93,7 @@ ENTRY(v7_flush_kern_cache_all) mov r0, #0 #ifdef CONFIG_SMP mcr p15, 0, r0, c7, c1, 0 @ invalidate I-cache inner shareable -#elese +#else mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate #endif ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) |