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authorRoger Quadros <rogerq@ti.com>2015-07-17 16:47:23 +0300
committerKishon Vijay Abraham I <kishon@ti.com>2015-08-04 21:11:50 +0530
commit257d5d9a9f19ee6c6801589c74791d5422c374e9 (patch)
treec65af98b697c028f93cb024db2bd3500f5c85faa /arch
parentc934b3612747bde6c81cf10c2bbde956c6690aec (diff)
ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY
This register is required to be passed to the SATA PHY driver to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock). Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/dra7.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 8f1e25bcecbd..4a0718ccf68e 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1140,6 +1140,7 @@
ctrl-module = <&omap_control_sata>;
clocks = <&sys_clkin1>, <&sata_ref_clk>;
clock-names = "sysclk", "refclk";
+ syscon-pllreset = <&scm_conf 0x3fc>;
#phy-cells = <0>;
};