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authorArnd Bergmann <arnd@arndb.de>2021-04-08 17:41:52 +0200
committerArnd Bergmann <arnd@arndb.de>2021-04-08 17:41:53 +0200
commit207481077b07d53cb378bc5dc71ae5379c91e8a8 (patch)
tree1e58c95366eb635b878c137cb93b45f94fff1374 /drivers/bus
parent4be3f47e1bd5c9be4c4b95de5f3531f062a28a66 (diff)
parentac6ad7c2a862d682bb584a4bc904d89fa7721af8 (diff)
Merge tag 'qcom-drivers-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for 5.13 This introduces SC7280 and SM8350 support in the RPMH power-domain driver, SC7280 support to the LLCC driver, SC7280 support tot he AOSS QMP driver, cleanups to the RPMH driver and a few smaller fixes to the SMEM, QMI and EBI2 drivers. * tag 'qcom-drivers-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: bus: qcom: Put child node before return dt-bindings: firmware: scm: Add sc7280 support soc: qcom: rpmh-rsc: Fold WARN_ON() into if condition soc: qcom: rpmh-rsc: Loop over fewer bits in irq handler soc: qcom: rpmh-rsc: Remove tcs_is_free() API soc: qcom: smem: Update max processor count soc: qcom: aoss: Add AOSS QMP support for SC7280 dt-bindings: soc: qcom: aoss: Add SC7280 compatible soc: qcom: llcc: Add configuration data for SC7280 dt-bindings: arm: msm: Add LLCC for SC7280 soc: qcom: Fix typos in the file qmi_encdec.c soc: qcom: rpmhpd: Add sc7280 powerdomains dt-bindings: power: rpmpd: Add sc7280 to rpmpd binding soc: qcom: rpmhpd: Add SM8350 power domains dt-bindings: power: Add rpm power domain bindings for SM8350 Link: https://lore.kernel.org/r/20210404164951.713045-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/bus')
-rw-r--r--drivers/bus/qcom-ebi2.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/bus/qcom-ebi2.c b/drivers/bus/qcom-ebi2.c
index 03ddcf426887..0b8f53a688b8 100644
--- a/drivers/bus/qcom-ebi2.c
+++ b/drivers/bus/qcom-ebi2.c
@@ -353,8 +353,10 @@ static int qcom_ebi2_probe(struct platform_device *pdev)
/* Figure out the chipselect */
ret = of_property_read_u32(child, "reg", &csindex);
- if (ret)
+ if (ret) {
+ of_node_put(child);
return ret;
+ }
if (csindex > 5) {
dev_err(dev,