diff options
| author | C A Subramaniam <subramaniam.ca@ti.com> | 2009-10-14 19:16:26 +0530 |
|---|---|---|
| committer | Hari Kanigeri <h-kanigeri2@ti.com> | 2009-11-06 17:55:32 -0600 |
| commit | 6db977717725cf08692aee6606c10cc7983945d8 (patch) | |
| tree | 8a38c0a98eedc11fb2838ab04d29c872fbfc8f68 /drivers/dsp | |
| parent | 94abed074944da3dc5eb855495aa7e106b35e70f (diff) | |
SYSLINK: sysmgr - changes to update to new memory map
This patch modifies the memory addresses in sysmgr to be in
line with the new memory map changes required to use the
TLB entries for Ducati.
Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Diffstat (limited to 'drivers/dsp')
| -rw-r--r-- | drivers/dsp/syslink/multicore_ipc/platform.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/drivers/dsp/syslink/multicore_ipc/platform.c b/drivers/dsp/syslink/multicore_ipc/platform.c index c02c56390744..3e410779d16d 100644 --- a/drivers/dsp/syslink/multicore_ipc/platform.c +++ b/drivers/dsp/syslink/multicore_ipc/platform.c @@ -113,40 +113,40 @@ /*! @brief Start of shared memory */ -#define SHAREDMEMORY_PHY_BASEADDR 0x87B00000 +#define SHAREDMEMORY_PHY_BASEADDR 0x8B000000 #define SHAREDMEMORY_PHY_BASESIZE 0x00100000 /*! @brief Start of shared memory for SysM3 */ -#define SHAREDMEMORY_PHY_BASEADDR_SYSM3 0x87B00000 -#define SHAREDMEMORY_PHY_BASESIZE_SYSM3 0x0007F000 +#define SHAREDMEMORY_PHY_BASEADDR_SYSM3 0x8B000000 +#define SHAREDMEMORY_PHY_BASESIZE_SYSM3 0x00054000 /*! @brief Start of shared memory AppM3 */ -#define SHAREDMEMORY_PHY_BASEADDR_APPM3 0x87B80000 -#define SHAREDMEMORY_PHY_BASESIZE_APPM3 0x0007F000 +#define SHAREDMEMORY_PHY_BASEADDR_APPM3 0x8B055000 +#define SHAREDMEMORY_PHY_BASESIZE_APPM3 0x00054000 /*! @brief Start of SHM for SysM3 */ -#define SHAREDMEMORY_SLV_VRT_BASEADDR_SYSM3 0x98000000 -#define SHAREDMEMORY_SLV_VRT_BASESIZE_SYSM3 0x00080000 +#define SHAREDMEMORY_SLV_VRT_BASEADDR_SYSM3 0xA0000000 +#define SHAREDMEMORY_SLV_VRT_BASESIZE_SYSM3 0x00055000 /*! @brief Start of SHM for AppM3 */ -#define SHAREDMEMORY_SLV_VRT_BASEADDR_APPM3 0x98080000 -#define SHAREDMEMORY_SLV_VRT_BASESIZE_APPM3 0x00080000 +#define SHAREDMEMORY_SLV_VRT_BASEADDR_APPM3 0xA0055000 +#define SHAREDMEMORY_SLV_VRT_BASESIZE_APPM3 0x00055000 /*! @brief Start of Boot load page for SysM3 */ -#define BOOTLOADPAGE_SLV_VRT_BASEADDR_SYSM3 0x9807F000 +#define BOOTLOADPAGE_SLV_VRT_BASEADDR_SYSM3 0xA0054000 #define BOOTLOADPAGE_SLV_VRT_BASESIZE_SYSM3 0x00001000 /*! @brief Start of Boot load page for AppM3 */ -#define BOOTLOADPAGE_SLV_VRT_BASEADDR_APPM3 0x980FF000 +#define BOOTLOADPAGE_SLV_VRT_BASEADDR_APPM3 0xA00A9000 #define BOOTLOADPAGE_SLV_VRT_BASESIZE_APPM3 0x00001000 /*! @brief Start of shared memory */ -#define SHAREDMEMORY_SWDMM_PHY_BASEADDR 0x87C00000 -#define SHAREDMEMORY_SWDMM_PHY_BASESIZE 0x00400000 +#define SHAREDMEMORY_SWDMM_PHY_BASEADDR 0x8A300000 +#define SHAREDMEMORY_SWDMM_PHY_BASESIZE 0x00C00000 /*! @brief Start of SHM SW DMMfor Ducati */ -#define SHAREDMEMORY_SWDMM_SLV_VRT_BASEADDR 0x80000000 -#define SHAREDMEMORY_SWDMM_SLV_VRT_BASESIZE 0x00400000 +#define SHAREDMEMORY_SWDMM_SLV_VRT_BASEADDR 0x81300000 +#define SHAREDMEMORY_SWDMM_SLV_VRT_BASESIZE 0x00C00000 /*! * @brief Size of the shared memory heap, this heap is used for providing |