diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-11-25 10:58:56 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-11-25 13:17:18 +0000 |
| commit | de5825beae9a0ae51f14a92859c6ec916235cd4d (patch) | |
| tree | 1b3c488c44960edddf75b7b7823839b806e0be01 /drivers/gpu/drm/i915/gt/selftest_engine_cs.c | |
| parent | da0ef77e1e0ccff703efee82406c629d5c4f4bbb (diff) | |
drm/i915: Serialise with engine-pm around requests on the kernel_context
As the engine->kernel_context is used within the engine-pm barrier, we
have to be careful when emitting requests outside of the barrier, as the
strict timeline locking rules do not apply. Instead, we must ensure the
engine_park() cannot be entered as we build the request, which is
simplest by taking an explicit engine-pm wakeref around the request
construction.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191125105858.1718307-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/selftest_engine_cs.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c index 5981a7b71ec9..761d81f4bd68 100644 --- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c @@ -132,14 +132,18 @@ static int perf_mi_bb_start(void *arg) u32 cycles[COUNT]; int i; + intel_engine_pm_get(engine); + batch = create_empty_batch(ce); if (IS_ERR(batch)) { err = PTR_ERR(batch); + intel_engine_pm_put(engine); break; } err = i915_vma_sync(batch); if (err) { + intel_engine_pm_put(engine); i915_vma_put(batch); break; } @@ -180,6 +184,7 @@ out: cycles[i] = rq->hwsp_seqno[3] - rq->hwsp_seqno[2]; } i915_vma_put(batch); + intel_engine_pm_put(engine); if (err) break; @@ -251,15 +256,19 @@ static int perf_mi_noop(void *arg) u32 cycles[COUNT]; int i; + intel_engine_pm_get(engine); + base = create_empty_batch(ce); if (IS_ERR(base)) { err = PTR_ERR(base); + intel_engine_pm_put(engine); break; } err = i915_vma_sync(base); if (err) { i915_vma_put(base); + intel_engine_pm_put(engine); break; } @@ -267,6 +276,7 @@ static int perf_mi_noop(void *arg) if (IS_ERR(nop)) { err = PTR_ERR(nop); i915_vma_put(base); + intel_engine_pm_put(engine); break; } @@ -274,6 +284,7 @@ static int perf_mi_noop(void *arg) if (err) { i915_vma_put(nop); i915_vma_put(base); + intel_engine_pm_put(engine); break; } @@ -327,6 +338,7 @@ out: } i915_vma_put(nop); i915_vma_put(base); + intel_engine_pm_put(engine); if (err) break; |