summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_debugfs.c
diff options
context:
space:
mode:
authorC, Ramalingam <ramalingam.c@intel.com>2017-11-08 00:08:23 +0530
committerRodrigo Vivi <rodrigo.vivi@intel.com>2017-12-28 08:55:03 -0800
commit35954e88bc5091ef82134e8c99c5bcc3b4c6772a (patch)
tree812d24fd8141b3be119e8d1ffb7d7265d79371ff /drivers/gpu/drm/i915/i915_debugfs.c
parentc8dae55a8ced625038d52d26e48273707fab2688 (diff)
drm/i915: Runtime disable for eDP DRRS
Debugfs called i915_drrs_ctl is added to enable and disable the eDP DRRS. Writing 0 will disable the feature, whereas non-zero will enable the feature. Possibility of disabling the DRRS, enables the testing of the frontbuffer tracking based features (FBC, DRRS and PSR) as standalone or any combination of the set. [v2]: ctl interface is moved from module parameter to debugfs [Rodrigo] Signed-off-by: C, Ramalingam <ramalingam.c@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1510079903-29441-1-git-send-email-ramalingam.c@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c43
1 files changed, 42 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index e968aeae1d84..ffa5f3f8222d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4606,6 +4606,46 @@ static const struct file_operations i915_hpd_storm_ctl_fops = {
.write = i915_hpd_storm_ctl_write
};
+static int i915_drrs_ctl_set(void *data, u64 val)
+{
+ struct drm_i915_private *dev_priv = data;
+ struct drm_device *dev = &dev_priv->drm;
+ struct intel_crtc *intel_crtc;
+ struct intel_encoder *encoder;
+ struct intel_dp *intel_dp;
+
+ if (INTEL_GEN(dev_priv) < 7)
+ return -ENODEV;
+
+ drm_modeset_lock_all(dev);
+ for_each_intel_crtc(dev, intel_crtc) {
+ if (!intel_crtc->base.state->active ||
+ !intel_crtc->config->has_drrs)
+ continue;
+
+ for_each_encoder_on_crtc(dev, &intel_crtc->base, encoder) {
+ if (encoder->type != INTEL_OUTPUT_EDP)
+ continue;
+
+ DRM_DEBUG_DRIVER("Manually %sabling DRRS. %llu\n",
+ val ? "en" : "dis", val);
+
+ intel_dp = enc_to_intel_dp(&encoder->base);
+ if (val)
+ intel_edp_drrs_enable(intel_dp,
+ intel_crtc->config);
+ else
+ intel_edp_drrs_disable(intel_dp,
+ intel_crtc->config);
+ }
+ }
+ drm_modeset_unlock_all(dev);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(i915_drrs_ctl_fops, NULL, i915_drrs_ctl_set, "%llu\n");
+
static const struct drm_info_list i915_debugfs_list[] = {
{"i915_capabilities", i915_capabilities, 0},
{"i915_gem_objects", i915_gem_object_info, 0},
@@ -4683,7 +4723,8 @@ static const struct i915_debugfs_files {
{"i915_dp_test_active", &i915_displayport_test_active_fops},
{"i915_guc_log_control", &i915_guc_log_control_fops},
{"i915_hpd_storm_ctl", &i915_hpd_storm_ctl_fops},
- {"i915_ipc_status", &i915_ipc_status_fops}
+ {"i915_ipc_status", &i915_ipc_status_fops},
+ {"i915_drrs_ctl", &i915_drrs_ctl_fops}
};
int i915_debugfs_register(struct drm_i915_private *dev_priv)