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authorSinan Kaya <okaya@codeaurora.org>2017-11-14 09:55:01 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-03-19 08:42:56 +0100
commite09475d698268ac1eb401b20c825dbc153b4cbf6 (patch)
tree04aa3c92f7faa7c622b80052f7ebd7c138fb61c3 /drivers/gpu/drm/i915/intel_guc_loader.c
parent4f33fcc68abe7c95f2682b660e2a1d983e24d64f (diff)
dmaengine: qcom_hidma: check pending interrupts
[ Upstream commit 38680bc6b1e3592bc9e18adc1d6e259667df27ce ] Driver is missing the interrupts if two requests are queued up at the same time as the interrupt handler is servicing a request that was just delivered. The ISR clears the interrupt at the end but it could be clearing the interrupt for an outstanding event. Therefore, second interrupt never arrives. Clear the interrupt first and then check for completions. Also, make sure that request start and interrupt clear do not overlap in time by using a spinlock. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc_loader.c')
0 files changed, 0 insertions, 0 deletions