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| author | Joerg Roedel <jroedel@suse.de> | 2019-06-24 10:23:16 +0200 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2019-06-24 10:23:16 +0200 |
| commit | ceedd5f74d8cfe34db4e654a7808e3c5de40d6f5 (patch) | |
| tree | e19c18292231202e9cd8d484ee43f46b2c9c9ad1 /drivers/gpu/drm/meson/meson_vclk.c | |
| parent | 1b961423158caaae49d3900b7c9c37477bbfa9b3 (diff) | |
| parent | 4b972a01a7da614b4796475f933094751a295a2f (diff) | |
Merge tag 'v5.2-rc6' into generic-dma-ops
Linux 5.2-rc6
Diffstat (limited to 'drivers/gpu/drm/meson/meson_vclk.c')
| -rw-r--r-- | drivers/gpu/drm/meson/meson_vclk.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c index 58b4af5fbb6d..26732f038d19 100644 --- a/drivers/gpu/drm/meson/meson_vclk.c +++ b/drivers/gpu/drm/meson/meson_vclk.c @@ -503,8 +503,17 @@ void meson_hdmi_pll_set_params(struct meson_drm *priv, unsigned int m, /* G12A HDMI PLL Needs specific parameters for 5.4GHz */ if (m >= 0xf7) { - regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0xea68dc00); - regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x65771290); + if (frac < 0x10000) { + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, + 0x6a685c00); + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, + 0x11551293); + } else { + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, + 0xea68dc00); + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, + 0x65771290); + } regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x39272000); regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL7, 0x55540000); } else { |