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authorLinus Torvalds <torvalds@linux-foundation.org>2017-05-03 11:44:24 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2017-05-03 11:44:24 -0700
commit2f34c1231bfc9f2550f934acb268ac7315fb3837 (patch)
treeff8114b3b4ec4723a11b041c6b74c389e9f0eeb9 /drivers/gpu/drm/omapdrm/omap_crtc.c
parenta3719f34fdb664ffcfaec2160ef20fca7becf2ee (diff)
parent8b03d1ed2c43a2ba5ef3381322ee4515b97381bf (diff)
Merge tag 'drm-for-v4.12' of git://people.freedesktop.org/~airlied/linux
Pull drm u pdates from Dave Airlie: "This is the main drm pull request for v4.12. Apart from two fixes pulls, everything should have been in drm-next for at least 2 weeks. The biggest thing in here is AMD released the public headers for their upcoming VEGA GPUs. These as always are quite a sizeable chunk of header files. They've also added initial non-display support for those GPUs, though they aren't available in production yet. Otherwise it's pretty much normal. New bridge drivers: - megachips-stdpxxxx-ge-b850v3-fw LVDS->DP++ - generic LVDS bridge support. Core: - Displayport link train failure reporting to userspace - debugfs interface cleaned up - subsystem TODO in kerneldoc now - Extended fbdev support (flipping and vblank wait) - drm_platform removed - EDP CRC support in helper - HF-VSDB SCDC support in EDID parser - Lots of code cleanups and header extraction - Thunderbolt external GPU awareness - Atomic helper improvements - Documentation improvements panel: - Sitronix and Samsung new panel support amdgpu: - Preliminary vega10 support - Multi-level page table support - GPU sensor support for userspace - PRT support for sparse buffers - SR-IOV improvements - Non-contig VRAM CPU mapping i915: - Atomic modesetting enabled by default on Gen5+ - LSPCON improvements - Atomic state handling for cdclk - GPU reset improvements - In-kernel unit tests - Geminilake improvements and color manager support - Designware i2c fixes - vblank evasion improvements - Hotplug safe connector iterators - GVT scheduler QoS support - GVT Kabylake support nouveau: - Acceleration support for Pascal (GP10x). - Rearchitecture of code handling proprietary signed firmware - Fix GTX 970 with odd MMU configuration - GP10B support - GP107 acceleration support vmwgfx: - Atomic modesetting support for vmwgfx omapdrm: - Support for render nodes - Refactor omapdss code - Fix some probe ordering issues - Fix too dark RGB565 rendering sunxi: - prelim rework for multiple pipes. mali-dp: - Color management support - Plane scaling - Power management improvements imx-drm: - Prefetch Resolve Engine/Gasket on i.MX6QP - Deferred plane disabling - Separate alpha support mediatek: - Mediatek SoC MT2701 support rcar-du: - Gen3 HDMI support msm: - 4k support for newer chips - OPP bindings for gpu - prep work for per-process pagetables vc4: - HDMI audio support - fixes qxl: - minor fixes. dw-hdmi: - PHY improvements - CSC fixes - Amlogic GX SoC support" * tag 'drm-for-v4.12' of git://people.freedesktop.org/~airlied/linux: (1778 commits) drm/nouveau/fb/gf100-: Fix 32 bit wraparound in new ram detection drm/nouveau/secboot/gm20b: fix the error return code in gm20b_secboot_tegra_read_wpr() drm/nouveau/kms: Increase max retries in scanout position queries. drm/nouveau/bios/bitP: check that table is long enough for optional pointers drm/nouveau/fifo/nv40: no ctxsw for pre-nv44 mpeg engine drm: mali-dp: use div_u64 for expensive 64-bit divisions drm/i915: Confirm the request is still active before adding it to the await drm/i915: Avoid busy-spinning on VLV_GLTC_PW_STATUS mmio drm/i915/selftests: Allocate inode/file dynamically drm/i915: Fix system hang with EI UP masked on Haswell drm/i915: checking for NULL instead of IS_ERR() in mock selftests drm/i915: Perform link quality check unconditionally during long pulse drm/i915: Fix use after free in lpe_audio_platdev_destroy() drm/i915: Use the right mapping_gfp_mask for final shmem allocation drm/i915: Make legacy cursor updates more unsynced drm/i915: Apply a cond_resched() to the saturated signaler drm/i915: Park the signaler before sleeping drm: mali-dp: Check the mclk rate and allow up/down scaling drm: mali-dp: Enable image enhancement when scaling drm: mali-dp: Add plane upscaling support ...
Diffstat (limited to 'drivers/gpu/drm/omapdrm/omap_crtc.c')
-rw-r--r--drivers/gpu/drm/omapdrm/omap_crtc.c121
1 files changed, 95 insertions, 26 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c
index b68c70eb395f..dccd03726796 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -107,10 +107,12 @@ static struct omap_dss_device *omap_crtc_output[8];
static int omap_crtc_dss_connect(enum omap_channel channel,
struct omap_dss_device *dst)
{
+ const struct dispc_ops *dispc_ops = dispc_get_ops();
+
if (omap_crtc_output[channel])
return -EINVAL;
- if ((dispc_mgr_get_supported_outputs(channel) & dst->id) == 0)
+ if ((dispc_ops->mgr_get_supported_outputs(channel) & dst->id) == 0)
return -EINVAL;
omap_crtc_output[channel] = dst;
@@ -134,6 +136,7 @@ static void omap_crtc_dss_start_update(enum omap_channel channel)
static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
{
struct drm_device *dev = crtc->dev;
+ struct omap_drm_private *priv = dev->dev_private;
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
enum omap_channel channel = omap_crtc->channel;
struct omap_irq_wait *wait;
@@ -144,7 +147,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
return;
if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) {
- dispc_mgr_enable(channel, enable);
+ priv->dispc_ops->mgr_enable(channel, enable);
omap_crtc->enabled = enable;
return;
}
@@ -157,8 +160,8 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
omap_crtc->ignore_digit_sync_lost = true;
}
- framedone_irq = dispc_mgr_get_framedone_irq(channel);
- vsync_irq = dispc_mgr_get_vsync_irq(channel);
+ framedone_irq = priv->dispc_ops->mgr_get_framedone_irq(channel);
+ vsync_irq = priv->dispc_ops->mgr_get_vsync_irq(channel);
if (enable) {
wait = omap_irq_wait_init(dev, vsync_irq, 1);
@@ -178,7 +181,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
wait = omap_irq_wait_init(dev, vsync_irq, 2);
}
- dispc_mgr_enable(channel, enable);
+ priv->dispc_ops->mgr_enable(channel, enable);
omap_crtc->enabled = enable;
ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
@@ -198,17 +201,9 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
static int omap_crtc_dss_enable(enum omap_channel channel)
{
struct omap_crtc *omap_crtc = omap_crtcs[channel];
- struct omap_overlay_manager_info info;
+ struct omap_drm_private *priv = omap_crtc->base.dev->dev_private;
- memset(&info, 0, sizeof(info));
- info.default_color = 0x00000000;
- info.trans_key = 0x00000000;
- info.trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
- info.trans_enabled = false;
-
- dispc_mgr_setup(omap_crtc->channel, &info);
- dispc_mgr_set_timings(omap_crtc->channel,
- &omap_crtc->vm);
+ priv->dispc_ops->mgr_set_timings(omap_crtc->channel, &omap_crtc->vm);
omap_crtc_set_enabled(&omap_crtc->base, true);
return 0;
@@ -233,8 +228,10 @@ static void omap_crtc_dss_set_lcd_config(enum omap_channel channel,
const struct dss_lcd_mgr_config *config)
{
struct omap_crtc *omap_crtc = omap_crtcs[channel];
+ struct omap_drm_private *priv = omap_crtc->base.dev->dev_private;
+
DBG("%s", omap_crtc->name);
- dispc_mgr_set_lcd_config(omap_crtc->channel, config);
+ priv->dispc_ops->mgr_set_lcd_config(omap_crtc->channel, config);
}
static int omap_crtc_dss_register_framedone(
@@ -282,6 +279,8 @@ void omap_crtc_error_irq(struct drm_crtc *crtc, uint32_t irqstatus)
void omap_crtc_vblank_irq(struct drm_crtc *crtc)
{
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
+ struct drm_device *dev = omap_crtc->base.dev;
+ struct omap_drm_private *priv = dev->dev_private;
bool pending;
spin_lock(&crtc->dev->event_lock);
@@ -289,7 +288,7 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc)
* If the dispc is busy we're racing the flush operation. Try again on
* the next vblank interrupt.
*/
- if (dispc_mgr_go_busy(omap_crtc->channel)) {
+ if (priv->dispc_ops->mgr_go_busy(omap_crtc->channel)) {
spin_unlock(&crtc->dev->event_lock);
return;
}
@@ -313,6 +312,22 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc)
DBG("%s: apply done", omap_crtc->name);
}
+static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc)
+{
+ struct omap_drm_private *priv = crtc->dev->dev_private;
+ struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
+ struct omap_overlay_manager_info info;
+
+ memset(&info, 0, sizeof(info));
+
+ info.default_color = 0x000000;
+ info.trans_enabled = false;
+ info.partial_alpha_enabled = false;
+ info.cpr_enable = false;
+
+ priv->dispc_ops->mgr_setup(omap_crtc->channel, &info);
+}
+
/* -----------------------------------------------------------------------------
* CRTC Functions
*/
@@ -358,6 +373,11 @@ static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
struct drm_display_mode *mode = &crtc->state->adjusted_mode;
+ struct omap_drm_private *priv = crtc->dev->dev_private;
+ const u32 flags_mask = DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_DE_LOW |
+ DISPLAY_FLAGS_PIXDATA_POSEDGE | DISPLAY_FLAGS_PIXDATA_NEGEDGE |
+ DISPLAY_FLAGS_SYNC_POSEDGE | DISPLAY_FLAGS_SYNC_NEGEDGE;
+ unsigned int i;
DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
omap_crtc->name, mode->base.id, mode->name,
@@ -367,9 +387,38 @@ static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)
mode->type, mode->flags);
drm_display_mode_to_videomode(mode, &omap_crtc->vm);
- omap_crtc->vm.flags |= DISPLAY_FLAGS_DE_HIGH |
- DISPLAY_FLAGS_PIXDATA_POSEDGE |
- DISPLAY_FLAGS_SYNC_NEGEDGE;
+
+ /*
+ * HACK: This fixes the vm flags.
+ * struct drm_display_mode does not contain the VSYNC/HSYNC/DE flags
+ * and they get lost when converting back and forth between
+ * struct drm_display_mode and struct videomode. The hack below
+ * goes and fetches the missing flags from the panel drivers.
+ *
+ * Correct solution would be to use DRM's bus-flags, but that's not
+ * easily possible before the omapdrm's panel/encoder driver model
+ * has been changed to the DRM model.
+ */
+
+ for (i = 0; i < priv->num_encoders; ++i) {
+ struct drm_encoder *encoder = priv->encoders[i];
+
+ if (encoder->crtc == crtc) {
+ struct omap_dss_device *dssdev;
+
+ dssdev = omap_encoder_get_dssdev(encoder);
+
+ if (dssdev) {
+ struct videomode vm = {0};
+
+ dssdev->driver->get_timings(dssdev, &vm);
+
+ omap_crtc->vm.flags |= vm.flags & flags_mask;
+ }
+
+ break;
+ }
+ }
}
static int omap_crtc_atomic_check(struct drm_crtc *crtc,
@@ -394,6 +443,7 @@ static void omap_crtc_atomic_begin(struct drm_crtc *crtc,
static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
struct drm_crtc_state *old_crtc_state)
{
+ struct omap_drm_private *priv = crtc->dev->dev_private;
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
int ret;
@@ -407,9 +457,11 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
length = crtc->state->gamma_lut->length /
sizeof(*lut);
}
- dispc_mgr_set_gamma(omap_crtc->channel, lut, length);
+ priv->dispc_ops->mgr_set_gamma(omap_crtc->channel, lut, length);
}
+ omap_crtc_write_crtc_properties(crtc);
+
/* Only flush the CRTC if it is currently enabled. */
if (!omap_crtc->enabled)
return;
@@ -420,7 +472,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
WARN_ON(ret != 0);
spin_lock_irq(&crtc->dev->event_lock);
- dispc_mgr_go(omap_crtc->channel);
+ priv->dispc_ops->mgr_go(omap_crtc->channel);
WARN_ON(omap_crtc->pending);
omap_crtc->pending = true;
@@ -495,6 +547,8 @@ static const struct drm_crtc_funcs omap_crtc_funcs = {
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
.atomic_set_property = omap_crtc_atomic_set_property,
.atomic_get_property = omap_crtc_atomic_get_property,
+ .enable_vblank = omap_irq_enable_vblank,
+ .disable_vblank = omap_irq_disable_vblank,
};
static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
@@ -519,6 +573,8 @@ static const char *channel_names[] = {
void omap_crtc_pre_init(void)
{
+ memset(omap_crtcs, 0, sizeof(omap_crtcs));
+
dss_install_mgr_ops(&mgr_ops);
}
@@ -529,17 +585,28 @@ void omap_crtc_pre_uninit(void)
/* initialize crtc */
struct drm_crtc *omap_crtc_init(struct drm_device *dev,
- struct drm_plane *plane, enum omap_channel channel, int id)
+ struct drm_plane *plane, struct omap_dss_device *dssdev)
{
+ struct omap_drm_private *priv = dev->dev_private;
struct drm_crtc *crtc = NULL;
struct omap_crtc *omap_crtc;
+ enum omap_channel channel;
+ struct omap_dss_device *out;
int ret;
+ out = omapdss_find_output_from_display(dssdev);
+ channel = out->dispc_channel;
+ omap_dss_put_device(out);
+
DBG("%s", channel_names[channel]);
+ /* Multiple displays on same channel is not allowed */
+ if (WARN_ON(omap_crtcs[channel] != NULL))
+ return ERR_PTR(-EINVAL);
+
omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
if (!omap_crtc)
- return NULL;
+ return ERR_PTR(-ENOMEM);
crtc = &omap_crtc->base;
@@ -551,8 +618,10 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,
ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,
&omap_crtc_funcs, NULL);
if (ret < 0) {
+ dev_err(dev->dev, "%s(): could not init crtc for: %s\n",
+ __func__, dssdev->name);
kfree(omap_crtc);
- return NULL;
+ return ERR_PTR(ret);
}
drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
@@ -564,7 +633,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,
* extracted with dispc_mgr_gamma_size(). If it returns 0
* gamma table is not supprted.
*/
- if (dispc_mgr_gamma_size(channel)) {
+ if (priv->dispc_ops->mgr_gamma_size(channel)) {
uint gamma_lut_size = 256;
drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size);