diff options
| author | Matthew Brost <matthew.brost@intel.com> | 2024-01-09 17:24:38 -0800 |
|---|---|---|
| committer | Matthew Brost <matthew.brost@intel.com> | 2024-01-10 15:11:22 -0800 |
| commit | d0ca70c0339838198a704b15b7e6c3318f887536 (patch) | |
| tree | 62af61368d7e0156bb6885c713b85cccaf411878 /drivers/gpu/drm/xe/xe_gt_pagefault.c | |
| parent | 1fd77ceaf0d843af2b7fde83e447b0738d0404cb (diff) | |
drm/xe: Add build on bug to assert access counter queue works
If ACC_QUEUE_NUM_DW % ACC_MSG_LEN_DW != 0 then the access counter queue
logic does not work when wrapping occurs. Add a build bug on to assert
ACC_QUEUE_NUM_DW % ACC_MSG_LEN_DW == 0 to enforce this restriction and
document the code.
v2:
- s/NUM_ACC_QUEUE/ACC_QUEUE_NUM_DW (Brian)
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_gt_pagefault.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_gt_pagefault.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c index 3ca715e2ec19..13183088401f 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c @@ -629,6 +629,11 @@ int xe_guc_access_counter_notify_handler(struct xe_guc *guc, u32 *msg, u32 len) u32 asid; bool full; + /* + * The below logic doesn't work unless ACC_QUEUE_NUM_DW % ACC_MSG_LEN_DW == 0 + */ + BUILD_BUG_ON(ACC_QUEUE_NUM_DW % ACC_MSG_LEN_DW); + if (unlikely(len != ACC_MSG_LEN_DW)) return -EPROTO; |