diff options
| author | Wei Huang <wei.huang2@amd.com> | 2020-08-27 00:42:42 -0500 |
|---|---|---|
| committer | Guenter Roeck <linux@roeck-us.net> | 2020-09-23 09:42:41 -0700 |
| commit | d6144a40041a70ecce410a07d3a2b6906f6e7da9 (patch) | |
| tree | b41c87a460f7acf208fe7dd370662833cd0a0277 /drivers/hwmon/k10temp.c | |
| parent | 1782241704239fb7215871bd670e0ae6eefe36b0 (diff) | |
hwmon: (k10temp) Define SVI telemetry and current factors for Zen2 CPUs
The voltage telemetry registers for Zen2 are different from Zen1. Also
the factors of CPU current values are changed on Zen2. Add new definitions
for these register.
Signed-off-by: Wei Huang <wei.huang2@amd.com>
Link: https://lore.kernel.org/r/20200827054242.2347-2-wei.huang2@amd.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'drivers/hwmon/k10temp.c')
| -rw-r--r-- | drivers/hwmon/k10temp.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index f3addb97b021..de9f68570a4f 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c @@ -88,9 +88,13 @@ static DEFINE_MUTEX(nb_smu_ind_mutex); /* F17h thermal registers through SMN */ #define F17H_M01H_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0xc) #define F17H_M01H_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0x10) +#define F17H_M31H_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0x14) +#define F17H_M31H_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0x10) -#define F17H_CFACTOR_ICORE 1000000 /* 1A / LSB */ -#define F17H_CFACTOR_ISOC 250000 /* 0.25A / LSB */ +#define F17H_M01H_CFACTOR_ICORE 1000000 /* 1A / LSB */ +#define F17H_M01H_CFACTOR_ISOC 250000 /* 0.25A / LSB */ +#define F17H_M31H_CFACTOR_ICORE 1000000 /* 1A / LSB */ +#define F17H_M31H_CFACTOR_ISOC 310000 /* 0.31A / LSB */ struct k10temp_data { struct pci_dev *pdev; @@ -580,17 +584,17 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id) data->show_current = !is_threadripper() && !is_epyc(); data->svi_addr[0] = F17H_M01H_SVI_TEL_PLANE0; data->svi_addr[1] = F17H_M01H_SVI_TEL_PLANE1; - data->cfactor[0] = F17H_CFACTOR_ICORE; - data->cfactor[1] = F17H_CFACTOR_ISOC; + data->cfactor[0] = F17H_M01H_CFACTOR_ICORE; + data->cfactor[1] = F17H_M01H_CFACTOR_ISOC; k10temp_get_ccd_support(pdev, data, 4); break; case 0x31: /* Zen2 Threadripper */ case 0x71: /* Zen2 */ data->show_current = !is_threadripper() && !is_epyc(); - data->cfactor[0] = F17H_CFACTOR_ICORE; - data->cfactor[1] = F17H_CFACTOR_ISOC; - data->svi_addr[0] = F17H_M01H_SVI_TEL_PLANE1; - data->svi_addr[1] = F17H_M01H_SVI_TEL_PLANE0; + data->cfactor[0] = F17H_M31H_CFACTOR_ICORE; + data->cfactor[1] = F17H_M31H_CFACTOR_ISOC; + data->svi_addr[0] = F17H_M31H_SVI_TEL_PLANE0; + data->svi_addr[1] = F17H_M31H_SVI_TEL_PLANE1; k10temp_get_ccd_support(pdev, data, 8); break; } |