diff options
| author | Bryan O'Sullivan <bos@pathscale.com> | 2006-09-28 09:00:13 -0700 |
|---|---|---|
| committer | Roland Dreier <rolandd@cisco.com> | 2006-09-28 11:16:53 -0700 |
| commit | 1fd3b40fde3bfacdf742cadfe99cfd47ffd05219 (patch) | |
| tree | 5f08e8046319dc31d5abdec16764b7889feb9b74 /drivers/infiniband/hw/ipath/ipath_wc_ppc64.c | |
| parent | 076fafcdee37c87564abd1ad993e17d77fc32daa (diff) | |
IB/ipath: Improved support for PowerPC
Signed-off-by: Bryan O'Sullivan <bryan.osullivan@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/ipath/ipath_wc_ppc64.c')
| -rw-r--r-- | drivers/infiniband/hw/ipath/ipath_wc_ppc64.c | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_wc_ppc64.c b/drivers/infiniband/hw/ipath/ipath_wc_ppc64.c index 036fde662aa9..0095bb70f34e 100644 --- a/drivers/infiniband/hw/ipath/ipath_wc_ppc64.c +++ b/drivers/infiniband/hw/ipath/ipath_wc_ppc64.c @@ -38,13 +38,23 @@ #include "ipath_kernel.h" /** - * ipath_unordered_wc - indicate whether write combining is ordered + * ipath_enable_wc - enable write combining for MMIO writes to the device + * @dd: infinipath device * - * PowerPC systems (at least those in the 970 processor family) - * write partially filled store buffers in address order, but will write - * completely filled store buffers in "random" order, and therefore must - * have serialization for correctness with current InfiniPath chips. + * Nothing to do on PowerPC, so just return without error. + */ +int ipath_enable_wc(struct ipath_devdata *dd) +{ + return 0; +} + +/** + * ipath_unordered_wc - indicate whether write combining is unordered * + * Because our performance depends on our ability to do write + * combining mmio writes in the most efficient way, we need to + * know if we are on a processor that may reorder stores when + * write combining. */ int ipath_unordered_wc(void) { |