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authorjason-jh.lin <jason-jh.lin@mediatek.com>2021-12-10 14:11:38 +0800
committerJassi Brar <jaswinder.singh@linaro.org>2022-01-11 23:47:32 -0600
commit9388501fbb99a1b6a23f28634d125567a3b45a3d (patch)
tree6feb2f9dfb67457ccd9b824cc0504fa96216828b /drivers/mailbox
parent99867e5a87502a3e636059f39b2f668931767868 (diff)
mailbox: add control_by_sw for mt8195
To make sure the GCE request signal to SPM is not trigger by other HW modules and cause suspend premature wake. Set 0x7 (the bit 0~2 as 1) to GCE_GCTL_VALUE, to configure the request signal control by SW and release the request to SPM. Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> Reviewed-by: Tzung-Bi Shih <tzungbi@google.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Diffstat (limited to 'drivers/mailbox')
-rw-r--r--drivers/mailbox/mtk-cmdq-mailbox.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index e83bca84753b..bd986ab2f384 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -666,7 +666,7 @@ static const struct gce_plat gce_plat_v5 = {
static const struct gce_plat gce_plat_v6 = {
.thread_nr = 24,
.shift = 3,
- .control_by_sw = false,
+ .control_by_sw = true,
.gce_num = 2
};