diff options
| author | Pratyush Yadav <p.yadav@ti.com> | 2020-12-01 15:57:11 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2020-12-07 22:57:29 +0530 |
| commit | 294cca6ce5cf5b15ce4ebda4c266b4a849735c65 (patch) | |
| tree | f78932854dcc7be9f965b8dcbb4ed9e06536f9ab /drivers/mtd/spi-nor | |
| parent | afd473e8582702e89aed89a4be957ffd37423009 (diff) | |
mtd: spi-nor: spansion: Set ECC block size
The S28 flash family uses 2-bit ECC by default with each ECC block being
16 bytes. Under this scheme multi-pass programming to an ECC block is
not allowed. Set the writesize to make sure multi-pass programming is
not attempted on the flash.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20201201102711.8727-4-p.yadav@ti.com
Diffstat (limited to 'drivers/mtd/spi-nor')
| -rw-r--r-- | drivers/mtd/spi-nor/spansion.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index e487fd341a56..b0c5521c1e27 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -109,6 +109,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable) static void s28hs512t_default_init(struct spi_nor *nor) { nor->params->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable; + nor->params->writesize = 16; } static void s28hs512t_post_sfdp_fixup(struct spi_nor *nor) |