diff options
author | Dirk Buchwalder <buchwalder@posteo.de> | 2022-02-10 18:31:00 +0100 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-04-08 14:40:24 +0200 |
commit | 80805f555e22baf5245204fff428974711537364 (patch) | |
tree | 4da3a3208f1551ec49fd77c742c8c2508adfe16e /drivers/phy/phy-core-mipi-dphy.c | |
parent | fd2601e3665e642d0887243e0fbe7bad69a088a6 (diff) |
clk: qcom: ipq8074: Use floor ops for SDCC1 clock
[ Upstream commit b77d8306d84f83d1da68028a68c91da9c867b6f6 ]
Use floor ops on SDCC1 APPS clock in order to round down selected clock
frequency and avoid overclocking SD/eMMC cards.
For example, currently HS200 cards were failling tuning as they were
actually being clocked at 384MHz instead of 192MHz.
This caused some boards to disable 1.8V I/O and force the eMMC into the
standard HS mode (50MHz) and that appeared to work despite the eMMC being
overclocked to 96Mhz in that case.
There was a previous commit to use floor ops on SDCC clocks, but it looks
to have only covered SDCC2 clock.
Fixes: 9607f6224b39 ("clk: qcom: ipq8074: add PCIE, USB and SDCC clocks")
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220210173100.505128-1-robimarko@gmail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/phy/phy-core-mipi-dphy.c')
0 files changed, 0 insertions, 0 deletions