summaryrefslogtreecommitdiff
path: root/drivers/pinctrl/qcom/pinctrl-sc8180x.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2023-06-30 14:57:19 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2023-06-30 14:57:19 -0700
commit28968f384be3c064d66954aac4c534a5e76bf973 (patch)
treec15f02f9dae60e8e198bd1873e6a2d3c2f80a175 /drivers/pinctrl/qcom/pinctrl-sc8180x.c
parent9c3255a8f3946a4c8844f1e2e093313f3b71cb30 (diff)
parent9f0648f13e34a01f2e1a7a0d5801988a7bca6988 (diff)
Merge tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "No core changes this time New drivers: - Tegra234 support - Qualcomm IPQ5018 support - Intel Meteor Lake-S support - Qualcomm SDX75 subdriver - Qualcomm SPMI-based PM8953 support Improvements: - Fix up support for GPIO3 on the AXP209 - Push-pull drive configuration support for the AT91 PIO4 - Fix misc non-urgent bugs in the AMD driver - Misc non-urgent improved error handling - Misc janitorial and minor improvements" * tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: cherryview: Drop goto label pinctrl: baytrail: invert if condition pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook pinctrl: tegra: avoid duplicate field initializers dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function pinctrl: mlxbf3: remove broken Kconfig 'select' pinctrl: spear: Remove unused of_gpio.h inclusion pinctrl: lantiq: Remove unused of_gpio.h inclusion pinctrl: at91-pio4: check return value of devm_kasprintf() pinctrl: microchip-sgpio: check return value of devm_kasprintf() pinctrl: freescale: Fix a memory out of bounds when num_configs is 1 pinctrl: intel: refine ->irq_set_type() hook pinctrl: intel: refine ->set_mux() hook pinctrl: baytrail: Use str_hi_lo() helper lib/string_choices: Add str_high_low() helper lib/string_helpers: Split out string_choices.h lib/string_helpers: Add missing header files to MAINTAINERS database pinctrl: npcm7xx: Add missing check for ioremap pinctrl:sunplus: Add check for kmalloc ...
Diffstat (limited to 'drivers/pinctrl/qcom/pinctrl-sc8180x.c')
-rw-r--r--drivers/pinctrl/qcom/pinctrl-sc8180x.c292
1 files changed, 144 insertions, 148 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-sc8180x.c b/drivers/pinctrl/qcom/pinctrl-sc8180x.c
index 704a99d2f93c..d6a79ad41a40 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc8180x.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc8180x.c
@@ -7,7 +7,6 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
-#include <linux/pinctrl/pinctrl.h>
#include "pinctrl-msm.h"
@@ -38,19 +37,12 @@ static const struct tile_info sc8180x_tile_info[] = {
{ 0x00100000, 0x00300000, },
};
-#define FUNCTION(fname) \
- [msm_mux_##fname] = { \
- .name = #fname, \
- .groups = fname##_groups, \
- .ngroups = ARRAY_SIZE(fname##_groups), \
- }
-
#define REG_SIZE 0x1000
#define PINGROUP_OFFSET(id, _tile, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
{ \
- .name = "gpio" #id, \
- .pins = gpio##id##_pins, \
- .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
+ .grp = PINCTRL_PINGROUP("gpio" #id, \
+ gpio##id##_pins, \
+ ARRAY_SIZE(gpio##id##_pins)), \
.funcs = (int[]){ \
msm_mux_gpio, /* gpio mode */ \
msm_mux_##f1, \
@@ -91,9 +83,9 @@ static const struct tile_info sc8180x_tile_info[] = {
#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
{ \
- .name = #pg_name, \
- .pins = pg_name##_pins, \
- .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
+ .grp = PINCTRL_PINGROUP(#pg_name, \
+ pg_name##_pins, \
+ ARRAY_SIZE(pg_name##_pins)), \
.ctl_reg = ctl, \
.io_reg = 0, \
.intr_cfg_reg = 0, \
@@ -117,9 +109,9 @@ static const struct tile_info sc8180x_tile_info[] = {
#define UFS_RESET(pg_name) \
{ \
- .name = #pg_name, \
- .pins = pg_name##_pins, \
- .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
+ .grp = PINCTRL_PINGROUP(#pg_name, \
+ pg_name##_pins, \
+ ARRAY_SIZE(pg_name##_pins)), \
.ctl_reg = 0xb6000, \
.io_reg = 0xb6004, \
.intr_cfg_reg = 0, \
@@ -1238,136 +1230,136 @@ static const char * const wmss_reset_groups[] = {
"gpio63",
};
-static const struct msm_function sc8180x_functions[] = {
- FUNCTION(adsp_ext),
- FUNCTION(agera_pll),
- FUNCTION(aoss_cti),
- FUNCTION(atest_char),
- FUNCTION(atest_tsens),
- FUNCTION(atest_tsens2),
- FUNCTION(atest_usb0),
- FUNCTION(atest_usb1),
- FUNCTION(atest_usb2),
- FUNCTION(atest_usb3),
- FUNCTION(atest_usb4),
- FUNCTION(audio_ref),
- FUNCTION(btfm_slimbus),
- FUNCTION(cam_mclk),
- FUNCTION(cci_async),
- FUNCTION(cci_i2c),
- FUNCTION(cci_timer0),
- FUNCTION(cci_timer1),
- FUNCTION(cci_timer2),
- FUNCTION(cci_timer3),
- FUNCTION(cci_timer4),
- FUNCTION(cci_timer5),
- FUNCTION(cci_timer6),
- FUNCTION(cci_timer7),
- FUNCTION(cci_timer8),
- FUNCTION(cci_timer9),
- FUNCTION(cri_trng),
- FUNCTION(dbg_out),
- FUNCTION(ddr_bist),
- FUNCTION(ddr_pxi),
- FUNCTION(debug_hot),
- FUNCTION(dp_hot),
- FUNCTION(edp_hot),
- FUNCTION(edp_lcd),
- FUNCTION(emac_phy),
- FUNCTION(emac_pps),
- FUNCTION(gcc_gp1),
- FUNCTION(gcc_gp2),
- FUNCTION(gcc_gp3),
- FUNCTION(gcc_gp4),
- FUNCTION(gcc_gp5),
- FUNCTION(gpio),
- FUNCTION(gps),
- FUNCTION(grfc),
- FUNCTION(hs1_mi2s),
- FUNCTION(hs2_mi2s),
- FUNCTION(hs3_mi2s),
- FUNCTION(jitter_bist),
- FUNCTION(lpass_slimbus),
- FUNCTION(m_voc),
- FUNCTION(mdp_vsync),
- FUNCTION(mdp_vsync0),
- FUNCTION(mdp_vsync1),
- FUNCTION(mdp_vsync2),
- FUNCTION(mdp_vsync3),
- FUNCTION(mdp_vsync4),
- FUNCTION(mdp_vsync5),
- FUNCTION(mss_lte),
- FUNCTION(nav_pps),
- FUNCTION(pa_indicator),
- FUNCTION(pci_e0),
- FUNCTION(pci_e1),
- FUNCTION(pci_e2),
- FUNCTION(pci_e3),
- FUNCTION(phase_flag),
- FUNCTION(pll_bist),
- FUNCTION(pll_bypassnl),
- FUNCTION(pll_reset),
- FUNCTION(pri_mi2s),
- FUNCTION(pri_mi2s_ws),
- FUNCTION(prng_rosc),
- FUNCTION(qdss_cti),
- FUNCTION(qdss_gpio),
- FUNCTION(qlink),
- FUNCTION(qspi0),
- FUNCTION(qspi0_clk),
- FUNCTION(qspi0_cs),
- FUNCTION(qspi1),
- FUNCTION(qspi1_clk),
- FUNCTION(qspi1_cs),
- FUNCTION(qua_mi2s),
- FUNCTION(qup0),
- FUNCTION(qup1),
- FUNCTION(qup2),
- FUNCTION(qup3),
- FUNCTION(qup4),
- FUNCTION(qup5),
- FUNCTION(qup6),
- FUNCTION(qup7),
- FUNCTION(qup8),
- FUNCTION(qup9),
- FUNCTION(qup10),
- FUNCTION(qup11),
- FUNCTION(qup12),
- FUNCTION(qup13),
- FUNCTION(qup14),
- FUNCTION(qup15),
- FUNCTION(qup16),
- FUNCTION(qup17),
- FUNCTION(qup18),
- FUNCTION(qup19),
- FUNCTION(qup_l4),
- FUNCTION(qup_l5),
- FUNCTION(qup_l6),
- FUNCTION(rgmii),
- FUNCTION(sd_write),
- FUNCTION(sdc4),
- FUNCTION(sdc4_clk),
- FUNCTION(sdc4_cmd),
- FUNCTION(sec_mi2s),
- FUNCTION(sp_cmu),
- FUNCTION(spkr_i2s),
- FUNCTION(ter_mi2s),
- FUNCTION(tgu),
- FUNCTION(tsense_pwm1),
- FUNCTION(tsense_pwm2),
- FUNCTION(tsif1),
- FUNCTION(tsif2),
- FUNCTION(uim1),
- FUNCTION(uim2),
- FUNCTION(uim_batt),
- FUNCTION(usb0_phy),
- FUNCTION(usb1_phy),
- FUNCTION(usb2phy_ac),
- FUNCTION(vfr_1),
- FUNCTION(vsense_trigger),
- FUNCTION(wlan1_adc),
- FUNCTION(wlan2_adc),
- FUNCTION(wmss_reset),
+static const struct pinfunction sc8180x_functions[] = {
+ MSM_PIN_FUNCTION(adsp_ext),
+ MSM_PIN_FUNCTION(agera_pll),
+ MSM_PIN_FUNCTION(aoss_cti),
+ MSM_PIN_FUNCTION(atest_char),
+ MSM_PIN_FUNCTION(atest_tsens),
+ MSM_PIN_FUNCTION(atest_tsens2),
+ MSM_PIN_FUNCTION(atest_usb0),
+ MSM_PIN_FUNCTION(atest_usb1),
+ MSM_PIN_FUNCTION(atest_usb2),
+ MSM_PIN_FUNCTION(atest_usb3),
+ MSM_PIN_FUNCTION(atest_usb4),
+ MSM_PIN_FUNCTION(audio_ref),
+ MSM_PIN_FUNCTION(btfm_slimbus),
+ MSM_PIN_FUNCTION(cam_mclk),
+ MSM_PIN_FUNCTION(cci_async),
+ MSM_PIN_FUNCTION(cci_i2c),
+ MSM_PIN_FUNCTION(cci_timer0),
+ MSM_PIN_FUNCTION(cci_timer1),
+ MSM_PIN_FUNCTION(cci_timer2),
+ MSM_PIN_FUNCTION(cci_timer3),
+ MSM_PIN_FUNCTION(cci_timer4),
+ MSM_PIN_FUNCTION(cci_timer5),
+ MSM_PIN_FUNCTION(cci_timer6),
+ MSM_PIN_FUNCTION(cci_timer7),
+ MSM_PIN_FUNCTION(cci_timer8),
+ MSM_PIN_FUNCTION(cci_timer9),
+ MSM_PIN_FUNCTION(cri_trng),
+ MSM_PIN_FUNCTION(dbg_out),
+ MSM_PIN_FUNCTION(ddr_bist),
+ MSM_PIN_FUNCTION(ddr_pxi),
+ MSM_PIN_FUNCTION(debug_hot),
+ MSM_PIN_FUNCTION(dp_hot),
+ MSM_PIN_FUNCTION(edp_hot),
+ MSM_PIN_FUNCTION(edp_lcd),
+ MSM_PIN_FUNCTION(emac_phy),
+ MSM_PIN_FUNCTION(emac_pps),
+ MSM_PIN_FUNCTION(gcc_gp1),
+ MSM_PIN_FUNCTION(gcc_gp2),
+ MSM_PIN_FUNCTION(gcc_gp3),
+ MSM_PIN_FUNCTION(gcc_gp4),
+ MSM_PIN_FUNCTION(gcc_gp5),
+ MSM_PIN_FUNCTION(gpio),
+ MSM_PIN_FUNCTION(gps),
+ MSM_PIN_FUNCTION(grfc),
+ MSM_PIN_FUNCTION(hs1_mi2s),
+ MSM_PIN_FUNCTION(hs2_mi2s),
+ MSM_PIN_FUNCTION(hs3_mi2s),
+ MSM_PIN_FUNCTION(jitter_bist),
+ MSM_PIN_FUNCTION(lpass_slimbus),
+ MSM_PIN_FUNCTION(m_voc),
+ MSM_PIN_FUNCTION(mdp_vsync),
+ MSM_PIN_FUNCTION(mdp_vsync0),
+ MSM_PIN_FUNCTION(mdp_vsync1),
+ MSM_PIN_FUNCTION(mdp_vsync2),
+ MSM_PIN_FUNCTION(mdp_vsync3),
+ MSM_PIN_FUNCTION(mdp_vsync4),
+ MSM_PIN_FUNCTION(mdp_vsync5),
+ MSM_PIN_FUNCTION(mss_lte),
+ MSM_PIN_FUNCTION(nav_pps),
+ MSM_PIN_FUNCTION(pa_indicator),
+ MSM_PIN_FUNCTION(pci_e0),
+ MSM_PIN_FUNCTION(pci_e1),
+ MSM_PIN_FUNCTION(pci_e2),
+ MSM_PIN_FUNCTION(pci_e3),
+ MSM_PIN_FUNCTION(phase_flag),
+ MSM_PIN_FUNCTION(pll_bist),
+ MSM_PIN_FUNCTION(pll_bypassnl),
+ MSM_PIN_FUNCTION(pll_reset),
+ MSM_PIN_FUNCTION(pri_mi2s),
+ MSM_PIN_FUNCTION(pri_mi2s_ws),
+ MSM_PIN_FUNCTION(prng_rosc),
+ MSM_PIN_FUNCTION(qdss_cti),
+ MSM_PIN_FUNCTION(qdss_gpio),
+ MSM_PIN_FUNCTION(qlink),
+ MSM_PIN_FUNCTION(qspi0),
+ MSM_PIN_FUNCTION(qspi0_clk),
+ MSM_PIN_FUNCTION(qspi0_cs),
+ MSM_PIN_FUNCTION(qspi1),
+ MSM_PIN_FUNCTION(qspi1_clk),
+ MSM_PIN_FUNCTION(qspi1_cs),
+ MSM_PIN_FUNCTION(qua_mi2s),
+ MSM_PIN_FUNCTION(qup0),
+ MSM_PIN_FUNCTION(qup1),
+ MSM_PIN_FUNCTION(qup2),
+ MSM_PIN_FUNCTION(qup3),
+ MSM_PIN_FUNCTION(qup4),
+ MSM_PIN_FUNCTION(qup5),
+ MSM_PIN_FUNCTION(qup6),
+ MSM_PIN_FUNCTION(qup7),
+ MSM_PIN_FUNCTION(qup8),
+ MSM_PIN_FUNCTION(qup9),
+ MSM_PIN_FUNCTION(qup10),
+ MSM_PIN_FUNCTION(qup11),
+ MSM_PIN_FUNCTION(qup12),
+ MSM_PIN_FUNCTION(qup13),
+ MSM_PIN_FUNCTION(qup14),
+ MSM_PIN_FUNCTION(qup15),
+ MSM_PIN_FUNCTION(qup16),
+ MSM_PIN_FUNCTION(qup17),
+ MSM_PIN_FUNCTION(qup18),
+ MSM_PIN_FUNCTION(qup19),
+ MSM_PIN_FUNCTION(qup_l4),
+ MSM_PIN_FUNCTION(qup_l5),
+ MSM_PIN_FUNCTION(qup_l6),
+ MSM_PIN_FUNCTION(rgmii),
+ MSM_PIN_FUNCTION(sd_write),
+ MSM_PIN_FUNCTION(sdc4),
+ MSM_PIN_FUNCTION(sdc4_clk),
+ MSM_PIN_FUNCTION(sdc4_cmd),
+ MSM_PIN_FUNCTION(sec_mi2s),
+ MSM_PIN_FUNCTION(sp_cmu),
+ MSM_PIN_FUNCTION(spkr_i2s),
+ MSM_PIN_FUNCTION(ter_mi2s),
+ MSM_PIN_FUNCTION(tgu),
+ MSM_PIN_FUNCTION(tsense_pwm1),
+ MSM_PIN_FUNCTION(tsense_pwm2),
+ MSM_PIN_FUNCTION(tsif1),
+ MSM_PIN_FUNCTION(tsif2),
+ MSM_PIN_FUNCTION(uim1),
+ MSM_PIN_FUNCTION(uim2),
+ MSM_PIN_FUNCTION(uim_batt),
+ MSM_PIN_FUNCTION(usb0_phy),
+ MSM_PIN_FUNCTION(usb1_phy),
+ MSM_PIN_FUNCTION(usb2phy_ac),
+ MSM_PIN_FUNCTION(vfr_1),
+ MSM_PIN_FUNCTION(vsense_trigger),
+ MSM_PIN_FUNCTION(wlan1_adc),
+ MSM_PIN_FUNCTION(wlan2_adc),
+ MSM_PIN_FUNCTION(wmss_reset),
};
/* Every pin is maintained as a single group, and missing or non-existing pin
@@ -1630,7 +1622,8 @@ static const struct msm_pinctrl_soc_data sc8180x_acpi_pinctrl = {
static int sc8180x_pinctrl_add_tile_resources(struct platform_device *pdev)
{
int nres_num = pdev->num_resources + ARRAY_SIZE(sc8180x_tiles) - 1;
- struct resource *mres, *nres, *res;
+ struct resource *mres = NULL;
+ struct resource *nres, *res;
int i, ret;
/*
@@ -1657,6 +1650,9 @@ static int sc8180x_pinctrl_add_tile_resources(struct platform_device *pdev)
*res++ = *r;
}
+ if (!mres)
+ return -EINVAL;
+
/* Append tile memory resources */
for (i = 0; i < ARRAY_SIZE(sc8180x_tiles); i++, res++) {
const struct tile_info *info = &sc8180x_tile_info[i];