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authorLinus Torvalds <torvalds@linux-foundation.org>2023-11-03 19:15:19 -1000
committerLinus Torvalds <torvalds@linux-foundation.org>2023-11-03 19:15:19 -1000
commit90b0c2b2edd1adff742c621e246562fbefa11b70 (patch)
treef9e877c51959e1c4a96379b15acd50fe28587aad /drivers/pinctrl/tegra
parentbe47c8e326c2375200473e442f3481c386a955c4 (diff)
parent63bffc2d3a99eaabc786c513eea71be3f597f175 (diff)
Merge tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "No pin control core changes this time. New drivers: - Realtek RTD family pin control driver and RTD1619B, RTD1319D and RTD1315E subdrivers - Nuvoton NPCM8xx combined pin control and GPIO driver - Amlogic T7 pin control driver - Renesas RZ/G3S pin control driver Improvements: - A number of additional UART groups added to the Mediatek MT7981 driver - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125 and SDM660 - Extra GPIO banks for the Sunxi H616 - MLSP I2C6 function support in Qualcomm MSM8226 - Some __counted_by() annotations for dynamic arrays - Ongoing work to make remove() return void - LSBC groups and functions in the Renesas R8A7778" * tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits) pinctrl: Use device_get_match_data() dt-bindings: pinctrl: qcom,sa8775p-tlmm: add missing wakeup-parent dt-bindings: pinctrl: nuvoton,npcm845: Add missing additionalProperties on gpio child nodes dt-bindings: pinctrl: brcm: Ensure all child node properties are documented pinctrl: renesas: rzn1: Convert to platform remove callback returning void pinctrl: renesas: rzg2l: Add RZ/G3S support dt-bindings: pinctrl: renesas: Document RZ/G3S SoC pinctrl: renesas: rzg2l: Add support for different DS values on different groups pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets pinctrl: renesas: rzg2l: Index all registers based on port offset pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request() pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions pinctrl: intel: fetch community only when we need it pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case pinctrl: cherryview: Convert to platform remove callback returning void pinctrl: sprd-sc9860: Convert to platform remove callback returning void pinctrl: qcom/msm: Convert to platform remove callback returning void pinctrl: qcom/lpi: Convert to platform remove callback returning void ...
Diffstat (limited to 'drivers/pinctrl/tegra')
-rw-r--r--drivers/pinctrl/tegra/pinctrl-tegra.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index 734c71ef005b..6bf8db424bec 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -120,7 +120,7 @@ static int tegra_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
/* EINVAL=missing, which is fine since it's optional */
if (ret != -EINVAL)
dev_err(dev,
- "could not parse property nvidia,function\n");
+ "%pOF: could not parse property nvidia,function\n", np);
function = NULL;
}
@@ -134,8 +134,8 @@ static int tegra_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
goto exit;
/* EINVAL=missing, which is fine since it's optional */
} else if (ret != -EINVAL) {
- dev_err(dev, "could not parse property %s\n",
- cfg_params[i].property);
+ dev_err(dev, "%pOF: could not parse property %s\n",
+ np, cfg_params[i].property);
}
}
@@ -146,7 +146,7 @@ static int tegra_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
reserve++;
ret = of_property_count_strings(np, "nvidia,pins");
if (ret < 0) {
- dev_err(dev, "could not parse property nvidia,pins\n");
+ dev_err(dev, "%pOF: could not parse property nvidia,pins\n", np);
goto exit;
}
reserve *= ret;