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authorLinus Torvalds <torvalds@linux-foundation.org>2017-09-05 11:40:38 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2017-09-05 11:40:38 -0700
commitb88f55774f20c0c306e0a95d22ca9ab5f08187c7 (patch)
tree43331d7646c8fbfa27deefebbba43d47bf0c71ea /drivers/spi/spi-omap2-mcspi.c
parent16a832a21f4e2c8b089935429efa646b626b9e82 (diff)
parentecb478bf866b8450c724958815e8d46b97c1b113 (diff)
Merge tag 'spi-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown: "A fairly quiet release for the SPI subsystem: - Move to using IDR for allocating bus numbers - Modernisation of the ep93xx driver, removing a lot of open coding and using the framework more - The tools have been moved to use the standard tools build system and an install target added (there will be a fairly trivial conflict with tip resulting from the changes in the main tools Makefile) - A refactoring of the Qualcomm QUP driver which enables new variants to be supported - Explicit support for the Freescale i.MX53 and i.MX6 SPI, Renesas R-Car H3 and Rockchip RV1108 controllers" * tag 'spi-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (71 commits) spi: spi-falcon: drop check of boot select spi: imx: fix use of native chip-selects with devicetree spi: pl022: constify amba_id spi: imx: fix little-endian build spi: omap: Allocate bus number from spi framework spi: Kernel coding style fixes spi: imx: dynamic burst length adjust for PIO mode spi: Pick spi bus number from Linux idr or spi alias spi: rockchip: configure CTRLR1 according to size and data frame spi: altera: Consolidate TX/RX data register access spi: altera: Switch to SPI core transfer queue management spi: rockchip: add compatible string for rv1108 spi spi: qup: fix 64-bit build warning spi: qup: hide warning for uninitialized variable spi: spi-ep93xx: use the default master transfer queueing mechanism spi: spi-ep93xx: remove private data 'current_msg' spi: spi-ep93xx: pass the spi_master pointer around spi: spi-ep93xx: absorb the interrupt enable/disable helpers spi: spi-ep93xx: add spi master prepare_transfer_hardware() spi: spi-ep93xx: use 32-bit read/write for all registers ...
Diffstat (limited to 'drivers/spi/spi-omap2-mcspi.c')
-rw-r--r--drivers/spi/spi-omap2-mcspi.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index e048268d8ba2..9bf64e6eca9b 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -1338,7 +1338,6 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
struct resource *r;
int status = 0, i;
u32 regs_offset = 0;
- static int bus_num = 1;
struct device_node *node = pdev->dev.of_node;
const struct of_device_id *match;
@@ -1374,14 +1373,11 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
of_property_read_u32(node, "ti,spi-num-cs", &num_cs);
master->num_chipselect = num_cs;
- master->bus_num = bus_num++;
if (of_get_property(node, "ti,pindir-d0-out-d1-in", NULL))
mcspi->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN;
} else {
pdata = dev_get_platdata(&pdev->dev);
master->num_chipselect = pdata->num_cs;
- if (pdev->id != -1)
- master->bus_num = pdev->id;
mcspi->pin_dir = pdata->pin_dir;
}
regs_offset = pdata->regs_offset;