diff options
| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-08-13 17:06:00 +0100 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-08-20 12:54:43 +0100 |
| commit | 83856aaab45da0fd34f94aac0371ba80668c1dbc (patch) | |
| tree | a28217a737f17bfde52775b43cee3cf178e75dbc /drivers/staging/iio | |
| parent | 14a4d22ead0d9c01a6d7e9cb7f1d321dd29d354b (diff) | |
staging: iio: frequency: ad9832: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition. Whilst here, move the marking to cover
the whole union. That has no functional affect, but makes it slightly
easier to see what is going on.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220813160600.1157169-1-jic23@kernel.org
Diffstat (limited to 'drivers/staging/iio')
| -rw-r--r-- | drivers/staging/iio/frequency/ad9832.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/frequency/ad9832.c index f43464db618a..6f9eebd6c7ee 100644 --- a/drivers/staging/iio/frequency/ad9832.c +++ b/drivers/staging/iio/frequency/ad9832.c @@ -112,10 +112,10 @@ struct ad9832_state { * transfer buffers to live in their own cache lines. */ union { - __be16 freq_data[4]____cacheline_aligned; + __be16 freq_data[4]; __be16 phase_data[2]; __be16 data; - }; + } __aligned(IIO_DMA_MINALIGN); }; static unsigned long ad9832_calc_freqreg(unsigned long mclk, unsigned long fout) |